CN109617594B - Instruction image transmission system and method of frequency division multiple access and time division multiple access mixed system - Google Patents

Instruction image transmission system and method of frequency division multiple access and time division multiple access mixed system Download PDF

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CN109617594B
CN109617594B CN201811550977.5A CN201811550977A CN109617594B CN 109617594 B CN109617594 B CN 109617594B CN 201811550977 A CN201811550977 A CN 201811550977A CN 109617594 B CN109617594 B CN 109617594B
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downlink
uplink
signal processing
transmitting
radio frequency
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CN109617594A (en
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程鹏
李庆
付雷
徐伟
潘望
王晨
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Xi'an Standard Information Technology Co ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B7/00Radio transmission systems, i.e. using radiation field
    • H04B7/14Relay systems
    • H04B7/15Active relay systems
    • H04B7/185Space-based or airborne stations; Stations for satellite systems
    • H04B7/18502Airborne stations
    • H04B7/18506Communications with or from aircraft, i.e. aeronautical mobile service
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B7/00Radio transmission systems, i.e. using radiation field
    • H04B7/14Relay systems
    • H04B7/15Active relay systems
    • H04B7/185Space-based or airborne stations; Stations for satellite systems
    • H04B7/1851Systems using a satellite or space-based relay
    • H04B7/18515Transmission equipment in satellites or space-based relays

Abstract

The invention provides a system and a method for wireless transmission of instruction images in a mixed system of frequency division multiple access and time division multiple access. The uplink signal processing module processes the instruction data to form an uplink transmitting signal, and the uplink transmitting signal is sequentially transmitted to the downlink signal processing module through a transmitting channel of the uplink radio frequency module and a receiving channel of the downlink radio frequency module; the downlink signal processing module processes a plurality of paths of image data to form a plurality of paths of downlink transmitting signals, and the downlink transmitting signals are sequentially transmitted to the uplink signal processing module through a transmitting channel of the downlink radio frequency module and a receiving channel of the uplink radio frequency module. The invention adopts an asymmetric system, namely an uplink adopts a time division multiple access system and a downlink adopts a frequency division multiple access system, thereby realizing the parallel transmission of multi-channel instruction data and image data.

Description

Instruction image transmission system and method of frequency division multiple access and time division multiple access mixed system
Technical Field
The invention relates to wireless communication transmission of data and images, in particular to a system and a method for wirelessly transmitting instruction images of a frequency division multiple access and time division multiple access mixed system.
Background
At present, an instruction image wireless transmission system is used for transmitting data and image wireless information in the flying process of a missile or an unmanned aerial vehicle.
At present, a general data and image wireless transmission system in the market transmits instruction data and image data in a time division multiple access mode, can only realize the transmission of single-path data and images, needs a plurality of sets of equipment to work together when simultaneously performing wireless transmission on a plurality of target images, and has the disadvantages of high system cost, large volume, high power consumption and high cooperative control difficulty.
Disclosure of Invention
Aiming at the problems in the prior art, the invention provides a system and a method for wireless transmission of instruction images in a frequency division multiple access and time division multiple access mixed system, which can realize the multichannel simultaneous transmission of data and images.
The invention is realized by the following technical scheme:
the up run adopts time division multiple access system to transmit instruction data, and the down run adopts frequency division multiple access system to transmit image data.
Preferably, one path of instruction data is transmitted in an uplink mode, and four paths of image data are transmitted in a parallel mode in a downlink mode.
Preferably, the uplink signal transmission process specifically includes: the uplink signal processing module performs framing, channel coding, modulation and up-conversion processing on the instruction data to form an uplink transmitting signal and transmits the uplink transmitting signal to a transmitting channel of the uplink radio frequency module; the transmitting channel of the uplink radio frequency module receives one path of uplink transmitting signal sent by the uplink signal processing module, carries out filtering and amplification, then receives the uplink transmitting signal through the receiving channel of the downlink radio frequency module and sends the uplink transmitting signal to the downlink signal processing module, and the downlink signal processing module carries out down-conversion, demodulation, channel decoding, frame decoding and protocol analysis processing on the received uplink transmitting signal to obtain instruction data;
the downlink signal transmission process specifically comprises: the downlink signal processing module carries out image compression coding, framing, channel coding, modulation and up-conversion processing on a plurality of paths of image data to form a plurality of paths of downlink transmitting signals and transmits the downlink transmitting signals to a transmitting channel of the downlink radio frequency module; the transmitting channel of the downlink radio frequency module receives a plurality of downlink transmitting signals sent by the downlink signal processing module, filters and amplifies the downlink transmitting signals, and then the downlink transmitting signals are received by the receiving channel of the uplink radio frequency module and sent to the uplink signal processing module; the uplink signal processing module carries out down-conversion, demodulation, channel decoding, frame decoding and image decompression on a plurality of received downlink transmitting signals to complete a plurality of paths of parallel image display.
The instruction image wireless transmission system of the frequency division multiple access and time division multiple access mixed system comprises an uplink signal processing module, an uplink radio frequency module, a downlink signal processing module and a downlink radio frequency module;
the uplink signal processing module performs framing, channel coding, modulation and up-conversion processing on the instruction data to form an uplink transmitting signal and transmits the uplink transmitting signal to a transmitting channel of the uplink radio frequency module; the uplink signal processing module also receives a plurality of downlink transmitting signals sent by a receiving channel of the uplink radio frequency module, and completes a plurality of parallel image display after down-conversion, demodulation, channel decoding, frame decoding and image decompression;
the transmitting channel of the uplink radio frequency module receives one path of uplink transmitting signal sent by the uplink signal processing module, and the uplink transmitting signal is filtered and amplified and then sent to the receiving channel of the downlink radio frequency module; a receiving channel of the uplink radio frequency module receives a plurality of downlink transmitting signals sent by a transmitting channel of the downlink radio frequency module and sends the downlink transmitting signals to the uplink signal processing module;
the downlink signal processing module carries out image compression coding, framing, channel coding, modulation and up-conversion processing on a plurality of paths of image data to form a plurality of paths of downlink transmitting signals and transmits the downlink transmitting signals to a transmitting channel of the downlink radio frequency module; the downlink signal processing module also receives a path of uplink signal sent by a receiving channel of the downlink radio frequency module, and performs down-conversion, demodulation, channel decoding, frame decoding and protocol analysis processing to obtain instruction data;
a transmitting channel of the downlink radio frequency module receives a plurality of downlink transmitting signals sent by the downlink signal processing module, and the downlink transmitting signals are filtered and amplified and then sent to a receiving channel of the uplink radio frequency module; and the receiving channel of the downlink radio frequency module receives one path of uplink transmitting signal sent by the transmitting channel of the uplink radio frequency module and sends the uplink transmitting signal to the downlink signal processing module.
Preferably, both the uplink signal processing module and the downlink signal processing module adopt
AD9361+ FPGA + DSP architecture.
Preferably, the plurality of downlink transmission signals are 4 parallel PAL gray scale image signals.
Preferably, the uplink signal processing module adopts 4 AD9361 chips for receiving and transmitting input and output signals, and 2K 7 series FPGAs and 4 DSPs for signal processing operation.
Preferably, the downlink signal processing module adopts 1 AD9361 chip to transmit and receive input and output signals, and 1 FPGA and 1 DSP of the a7 series to perform signal processing operation.
Preferably, the uplink signal processing module and the downlink signal processing module adopt J30-21ZKP, J30-15ZKP, J30-9ZKP and SMP-JHD connectors; the uplink radio frequency module and the downlink radio frequency module adopt J30-9ZKP and SMA-KFB2 connectors.
Preferably, the uplink signal processing module and the downlink signal processing module and the external interface are a path of asynchronous RS422 communication interface.
Compared with the prior art, the invention has the following beneficial technical effects:
the invention comprehensively utilizes the respective advantages of the time division multiple access and the frequency division multiple access, adopts an asymmetric system, namely an uplink adopts the time division multiple access system and a downlink adopts the frequency division multiple access system, thereby realizing the parallel transmission of the multi-path instruction data and the image data, reducing the complexity of system equipment when the multi-path instruction data and the image data are transmitted in parallel, increasing the real-time property of the cooperative control of the system, and reducing the cost and the power consumption of the system by multiplexing the equipment. The invention can carry out high-reliability transmission on the burst instruction data, can simultaneously transmit multi-channel image data in parallel and has excellent and stable performance.
Drawings
FIG. 1 is a block diagram of a surface equipment system;
FIG. 2 is a block diagram of an onboard equipment system;
FIG. 3 is a block diagram of the hardware design of an uplink signal processing module;
FIG. 4 is a block diagram of a downlink signal processing module hardware design;
fig. 5 is a circuit diagram of video acquisition hardware.
Detailed Description
The present invention will now be described in further detail with reference to specific examples, which are intended to be illustrative, but not limiting, of the invention.
Uplink communication adopts a time division multiple access mode to transmit a control instruction with small data volume; when image data with large data volume is transmitted in a downlink manner, if a time division multiple access manner is adopted, the data transmission rate is too high, the requirement on the gain of a system is overlarge, the complexity of equipment is increased, and the cost performance is low. The present invention utilizes the advantages of both time division multiple access and frequency division multiple access and adopts asymmetrical system, i.e., the uplink adopts time division multiple access system and the downlink adopts frequency division multiple access system, so as to realize the parallel transmission of multiple paths of command data and image data.
The specific signal transmission process of the invention is as follows:
the uplink signal transmission process specifically includes: the uplink signal processing module performs framing, channel coding, modulation and up-conversion processing on the instruction data to form an uplink transmitting signal and transmits the uplink transmitting signal to a transmitting channel of the uplink radio frequency module; the transmitting channel of the uplink radio frequency module receives one path of uplink transmitting signal sent by the uplink signal processing module, carries out filtering and amplification, then receives the uplink transmitting signal through the receiving channel of the downlink radio frequency module and sends the uplink transmitting signal to the downlink signal processing module, and the downlink signal processing module carries out down-conversion, demodulation, channel decoding, frame decoding and protocol analysis processing on the received uplink transmitting signal to obtain instruction data;
the downlink signal transmission process specifically comprises: the downlink signal processing module carries out image compression coding, framing, channel coding, modulation and up-conversion processing on a plurality of paths of image data to form a plurality of paths of downlink transmitting signals and transmits the downlink transmitting signals to a transmitting channel of the downlink radio frequency module; the transmitting channel of the downlink radio frequency module receives a plurality of downlink transmitting signals sent by the downlink signal processing module, filters and amplifies the downlink transmitting signals, and then the downlink transmitting signals are received by the receiving channel of the uplink radio frequency module and sent to the uplink signal processing module; the uplink signal processing module carries out down-conversion, demodulation, channel decoding, frame decoding and image decompression on a plurality of received downlink transmitting signals to complete a plurality of paths of parallel image display.
In this embodiment, four paths of instruction data are simultaneously transmitted in the uplink, and four paths of image data are transmitted in the downlink. The signal processing module and the radio frequency module are independently designed, the two independent antennas are used for receiving and transmitting radio frequency signals, and the communication frequency band and the bandwidth can be reconstructed.
The instruction image wireless transmission system of the frequency division multiple access and time division multiple access hybrid system comprises ground equipment and airborne equipment, wherein the system block diagram of the ground equipment is shown in figure 1, and the system block diagram of the airborne equipment is shown in figure 2. The ground equipment comprises an uplink signal processing module and an uplink radio frequency module, and the airborne equipment comprises a downlink signal processing module and a downlink radio frequency module.
The uplink signal processing module receives RS422 data, and sends signals to a transmitting channel of the uplink radio frequency module through framing, channel coding, modulation and up-conversion; the uplink signal processing module receives 4 paths of downlink transmitting signals sent by a transmitting channel of the downlink radio frequency module, and completes 4 paths of parallel PAL gray level image display after down-conversion, demodulation, channel decoding, frame decoding and image decompression respectively. As shown in fig. 3, the hardware circuit of the uplink signal processing module includes an FPGA, an AD9361, a DSP, a clock circuit, a power supply circuit, a FLASH circuit, and an RS422 circuit, and the main devices and functions used by each circuit are shown in table 1.
TABLE 1 hardware circuit composition of uplink signal processing module
Hardware circuit Main device Function(s)
FPGA XC7K325TFFG900 Protocol parsing, channel coding and decoding and QPSK modulation and demodulation
AD9361 AD9361BBCZ Modulation and demodulation of baseband signals to radio frequency signals
DSP TMS320DM368 Image decompression
Clock circuit TDNCAN-40.00MHz Generating a 40Mhz clock
Power supply circuit LTM4608AIV#PBF Generating individual module power
FLASH circuit N25Q128A13ESE40E Storing FPGA and DSP parameters
RS422 ADM3490ARZ RS422 level and LVCOMS33 level conversion
The transmitting channel of the uplink radio frequency module receives 1 uplink transmitting signal sent by the uplink signal processing module, completes filtering and amplification of the uplink transmitting signal, and then sends the uplink transmitting signal to the downlink signal processing module through the receiving channel of the downlink radio frequency module; and a receiving channel of the uplink radio frequency module receives 4 paths of downlink transmitting signals sent by the downlink radio frequency transmitting module. The hardware circuit of the uplink radio frequency module comprises a filter circuit and a power amplifier circuit; the filter circuit filters the signal and suppresses out-of-band signals; the power amplifier circuit amplifies the filtered signals, and the main devices and functions of each circuit are shown in table 2.
TABLE 2 hardware circuit composition of uplink RF module
Hardware circuit Main device Function(s)
Receiving power amplifier SBB-5089Z Signal gain 45dB
Receiving preselection filter 1 MB3818-100K8HA Broadband filter with center frequency of 3818Mhz
Receiving preselection filter 2 MB3908-100K8HA Broadband filter with center frequency of 3908Mhz
Receiving preselection filter 3 MB3998-100K8HA Broadband filter with center frequency of 3998Mhz
Reception preselection filter 4 MB4088-100K8HA Center frequency 4088Mhz broadband filter
Transmitting power amplifier TGA2975-SM Maximum transmit power of 30dBm
Transmission filter MB3766-300K8HA Broadband filter with center frequency of 3766Mhz
The downlink signal processing module sends 4 downlink transmitting signals to a transmitting channel of the downlink radio frequency module through image compression coding, framing, channel coding, modulation and up-conversion; the downlink signal processing module also receives 1 uplink transmitted signal sent by a receiving channel of the downlink radio frequency module, and obtains instruction data through down-conversion, demodulation, channel decoding, frame decoding and protocol analysis processing. As shown in fig. 4, the hardware circuits include FPGA, AD9361, DSP, clock circuit, power circuit, FLASH circuit and RS422 circuit, and the main devices and functions of each circuit are shown in table 3.
Table 3 downlink signal processing module hardware circuit composition
Figure BDA0001910628860000061
Figure BDA0001910628860000071
The transmitting channel of the downlink radio frequency module receives 4 downlink transmitting signals sent by the downlink signal processing module, and after filtering and amplification, the 4 downlink transmitting signals are sent to the uplink signal processing module through the receiving channel of the uplink radio frequency module; and the receiving channel of the downlink radio frequency module receives the 1 path of uplink transmitting signals sent by the transmitting channel of the uplink radio frequency module. The downlink radio frequency module hardware is provided with a filter circuit and a power amplifier circuit, and the filter circuit filters the input signal of the downlink signal processing module and suppresses the signal outside the bandwidth; the power amplifier circuit amplifies the filtered signals and improves the transmitting power. The downlink radio frequency module hardware consists of a receiving preselection filter and a power amplifier, and the main devices and functions of each circuit are shown in table 4.
Table 4 downlink rf module hardware circuit composition
Hardware circuit Main device Function(s)
Power amplifier TGA2975-SM Maximum transmit power of 30dBm
Receiving preselection filter MB3766-300K8HA Broadband filter with center frequency of 3766Mhz
FIG. 5 is a hardware circuit diagram of the present invention.
The product is in the communication test in static environment, and ground equipment and airborne equipment adopt the radio frequency line to connect, can realize four airborne equipment image transmission simultaneously, specifically can carry out the node extension according to user's demand.
The design requirement of the wireless communication transmission system is determined as the basis for designing and producing the wireless communication transmission system.

Claims (3)

1. The instruction image wireless transmission system of the frequency division multiple access and time division multiple access mixed system is characterized by comprising an uplink signal processing module, an uplink radio frequency module, a downlink signal processing module and a downlink radio frequency module;
the uplink signal processing module performs framing, channel coding, modulation and up-conversion processing on the instruction data to form an uplink transmitting signal and transmits the uplink transmitting signal to a transmitting channel of the uplink radio frequency module; the uplink signal processing module also receives a plurality of downlink transmitting signals sent by a receiving channel of the uplink radio frequency module, and completes a plurality of parallel image display after down-conversion, demodulation, channel decoding, frame decoding and image decompression;
the transmitting channel of the uplink radio frequency module receives one path of uplink transmitting signal sent by the uplink signal processing module, and the uplink transmitting signal is filtered and amplified and then sent to the receiving channel of the downlink radio frequency module; a receiving channel of the uplink radio frequency module receives a plurality of downlink transmitting signals sent by a transmitting channel of the downlink radio frequency module and sends the downlink transmitting signals to the uplink signal processing module;
the downlink signal processing module carries out image compression coding, framing, channel coding, modulation and up-conversion processing on a plurality of paths of image data to form a plurality of paths of downlink transmitting signals and transmits the downlink transmitting signals to a transmitting channel of the downlink radio frequency module; the downlink signal processing module also receives a path of uplink signal sent by a receiving channel of the downlink radio frequency module, and performs down-conversion, demodulation, channel decoding, frame decoding and protocol analysis processing to obtain instruction data;
a transmitting channel of the downlink radio frequency module receives a plurality of downlink transmitting signals sent by the downlink signal processing module, and the downlink transmitting signals are filtered and amplified and then sent to a receiving channel of the uplink radio frequency module; a receiving channel of the downlink radio frequency module receives one path of uplink transmitting signals sent by a transmitting channel of the uplink radio frequency module and sends the uplink transmitting signals to the downlink signal processing module;
the uplink signal processing module and the downlink signal processing module both adopt AD9361+ FPGA + DSP architectures;
the plurality of downlink transmitting signals are 4 paths of parallel PAL gray level image signals;
the uplink signal processing module adopts 4 AD9361 chips to receive and transmit input and output signals, and 2K 7 series of FPGA and 4 DSP chips to perform signal processing operation;
the downlink signal processing module adopts 1 AD9361 chip to receive and transmit input and output signals, and 1 FPGA and 1 DSP of an A7 series carry out signal processing operation;
the uplink signal processing module and the downlink signal processing module adopt J30-21ZKP, J30-15ZKP, J30-9ZKP and SMP-JHD connectors; the uplink radio frequency module and the downlink radio frequency module adopt J30-9ZKP and SMA-KFB2 connectors.
2. The system according to claim 1, wherein the uplink signal processing module and the downlink signal processing module are an asynchronous RS422 communication interface with an external interface.
3. The method for wireless transmission of command images in a mixed system of frequency division multiple access and time division multiple access is characterized in that, based on the system of claim 1, the uplink adopts the time division multiple access system to transmit command data, and the downlink adopts the frequency division multiple access system to transmit image data;
one path of instruction data is transmitted in an uplink mode, and four paths of image data are transmitted in a parallel mode in a downlink mode;
the uplink signal transmission process specifically includes: the uplink signal processing module performs framing, channel coding, modulation and up-conversion processing on the instruction data to form an uplink transmitting signal and transmits the uplink transmitting signal to a transmitting channel of the uplink radio frequency module; the transmitting channel of the uplink radio frequency module receives one path of uplink transmitting signal sent by the uplink signal processing module, carries out filtering and amplification, then receives the uplink transmitting signal through the receiving channel of the downlink radio frequency module and sends the uplink transmitting signal to the downlink signal processing module, and the downlink signal processing module carries out down-conversion, demodulation, channel decoding, frame decoding and protocol analysis processing on the received uplink transmitting signal to obtain instruction data;
the downlink signal transmission process specifically comprises: the downlink signal processing module carries out image compression coding, framing, channel coding, modulation and up-conversion processing on a plurality of paths of image data to form a plurality of paths of downlink transmitting signals and transmits the downlink transmitting signals to a transmitting channel of the downlink radio frequency module; the transmitting channel of the downlink radio frequency module receives a plurality of downlink transmitting signals sent by the downlink signal processing module, filters and amplifies the downlink transmitting signals, and then the downlink transmitting signals are received by the receiving channel of the uplink radio frequency module and sent to the uplink signal processing module; the uplink signal processing module carries out down-conversion, demodulation, channel decoding, frame decoding and image decompression on a plurality of received downlink transmitting signals to complete a plurality of paths of parallel image display.
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