CN109615069B - Circuit structure of neural network with asynchronous transmission characteristic - Google Patents
Circuit structure of neural network with asynchronous transmission characteristic Download PDFInfo
- Publication number
- CN109615069B CN109615069B CN201811436694.8A CN201811436694A CN109615069B CN 109615069 B CN109615069 B CN 109615069B CN 201811436694 A CN201811436694 A CN 201811436694A CN 109615069 B CN109615069 B CN 109615069B
- Authority
- CN
- China
- Prior art keywords
- neural network
- module
- asynchronous
- output
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000013528 artificial neural network Methods 0.000 title claims abstract description 93
- 230000005540 biological transmission Effects 0.000 title claims abstract description 18
- 238000012549 training Methods 0.000 claims abstract description 27
- 230000001360 synchronised effect Effects 0.000 claims abstract description 24
- 238000012360 testing method Methods 0.000 claims abstract description 5
- 210000002569 neuron Anatomy 0.000 claims description 33
- 238000000034 method Methods 0.000 claims description 10
- 210000004205 output neuron Anatomy 0.000 claims description 4
- 238000004364 calculation method Methods 0.000 claims description 2
- 210000002364 input neuron Anatomy 0.000 claims description 2
- 238000003062 neural network model Methods 0.000 claims description 2
- 210000004556 brain Anatomy 0.000 abstract description 9
- 238000013461 design Methods 0.000 abstract description 3
- 230000006870 function Effects 0.000 description 8
- 238000011160 research Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 3
- 230000005284 excitation Effects 0.000 description 3
- 230000004913 activation Effects 0.000 description 1
- 238000013473 artificial intelligence Methods 0.000 description 1
- 230000007177 brain activity Effects 0.000 description 1
- 238000004422 calculation algorithm Methods 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 239000003814 drug Substances 0.000 description 1
- 230000010365 information processing Effects 0.000 description 1
- 210000005036 nerve Anatomy 0.000 description 1
- 238000003909 pattern recognition Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N3/00—Computing arrangements based on biological models
- G06N3/02—Neural networks
- G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
- G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N3/00—Computing arrangements based on biological models
- G06N3/02—Neural networks
- G06N3/04—Architecture, e.g. interconnection topology
- G06N3/045—Combinations of networks
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N3/00—Computing arrangements based on biological models
- G06N3/02—Neural networks
- G06N3/08—Learning methods
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Health & Medical Sciences (AREA)
- Life Sciences & Earth Sciences (AREA)
- Biomedical Technology (AREA)
- Biophysics (AREA)
- General Health & Medical Sciences (AREA)
- Data Mining & Analysis (AREA)
- Evolutionary Computation (AREA)
- Computational Linguistics (AREA)
- Molecular Biology (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Software Systems (AREA)
- Artificial Intelligence (AREA)
- Neurology (AREA)
- Feedback Control In General (AREA)
Abstract
The invention discloses a circuit structure of a neural network with asynchronous transmission characteristics, which is divided into six parts: the system comprises a working master control module, an input module, a synchronous neural network unit module, a neural network asynchronous control unit module, an output module and a comparison judging module, wherein the neural network asynchronous control unit module comprises delay control and node control. These six modules constitute the whole of the test design. After the neural network is in a standard working state by utilizing the training set to train the neural network part, inputting data to generate a result in the synchronous working state, enabling the trained synchronous neural network unit module to enter an asynchronous working state through the neural network asynchronous control unit module, inputting the data again, transmitting the result to the output module, and finally comparing the obtained result with the training set to achieve the aim of simulating the brain neural network asynchronous work.
Description
Technical Field
The invention relates to a circuit structure of a neural network with an asynchronous transmission characteristic, belongs to the technical field of artificial neural networks, and particularly relates to a circuit structure for optimizing the neural network.
Background
Artificial neural networks (Artificial Neural Network, ANN) are a growing research hotspot in the area of artificial intelligence since the 80 s of the 20 th century. The human brain nerve cell network is abstracted from the information processing perspective, a certain simple model is built, and different networks are formed according to different connection modes. Also commonly referred to in engineering and academia as neural networks or neural-like networks. A neural network is an operational model, which is formed by interconnecting a large number of nodes (or neurons). Each node represents a specific output function, called the excitation function (activation function). The connection between each two nodes represents a weight, called a weight, for the signal passing through the connection, which corresponds to the memory of the artificial neural network. The output of the network is different according to the connection mode of the network, the weight value and the excitation function. The network itself is usually an approximation to some algorithm or function in nature, and may also be an expression of a logic policy.
In recent decades, the research work of artificial neural networks has been in progress, and the artificial neural networks have been developed, which have successfully solved many practical problems that are difficult to solve by modern computers in the fields of pattern recognition, intelligent robots, automatic control, predictive estimation, biology, medicine, economy, etc., and have shown good intelligent characteristics.
An integrated circuit (Integrated Circuit) is a circuit with specific functions that integrates a number of commonly used electronic components, such as resistors, capacitors, transistors, etc., and the wiring between these components, through semiconductor processes.
The artificial neural network circuit of the present invention performs the task given under the condition of stable synchronous transmission of the unified dominant of the clock signal, but the real brain does not have the clock signal, that is, the neural network in the human brain does not have the excitation of the clock signal, so that the performance of each task or brain activity cannot be transmitted in a synchronous manner. In order to simulate the asynchronous transmission condition and the result thereof, the invention provides the scheme, and the analysis, comparison and research are carried out on the result of synchronous transmission and the result of asynchronous transmission which are different from each other based on the design of a digital integrated circuit, so that the invention lays a road for future research.
Disclosure of Invention
The technical scheme of the invention is a neural network and a circuit design method for simulating the asynchronous transmission working state of the human brain, which is similar to that of the human brain.
The technical scheme adopted by the invention is a circuit structure of a neural network with asynchronous transmission characteristics, and the circuit structure is divided into six modules: the system comprises a working master control module, an input module, a synchronous neural network unit module, a neural network asynchronous control unit module, an output module and a comparison judging module; the working master control module is respectively connected with the input module, the neural network asynchronous control unit module, the synchronous neural network unit module, the output module and the comparison judging module, and the neural network asynchronous control unit module is connected with the synchronous neural network unit module; the neural network asynchronous control unit module comprises delay control and node control, an input module, a synchronous neural network unit module, and an output module which is connected with the comparison judging module sequentially; these six modules constitute the whole of the circuit structure.
After the neural network is trained by the synchronous neural network unit module through the training set, the neural network is enabled to obtain a standard working state, input data are input to generate a result in the synchronous working state, then the neural network asynchronous control unit module is driven, the neural network is enabled to enter an asynchronous transmission circuit, the data are input again to enable the neural network to enter the working state, finally the obtained result is compared with the training set, and the purpose of brain-simulating neural network asynchronous work is achieved.
The specific steps of the circuit structure are as follows:
s1, training the constructed neural network through a training set to obtain a trained synchronous neural network sample, and inputting data to obtain a transmission result;
s2, starting a neural network asynchronous control module to set controllable and operable time delay of a certain indefinite network, and controlling a node in a neural network asynchronous control unit to randomly control whether a certain node performs calculation or not;
s3, after a controlled asynchronous neural network sample is obtained, inputting data into the constructed neural network again, and obtaining an asynchronous transmission result by changing controllable delay and node operation through a neural network asynchronous control unit;
s4, obtaining a normal training set and the training set after the test of the neural network asynchronous control unit, comparing the training set with the training set in the output data comparison module, and outputting a result.
The aim of the scheme is to realize further research on the neural network simulation of human brain, and further realize brain-simulating function of the neural network chip. The last output flow control module of the method is summarized by the total contents of the four steps S1, S2, S3 and S4.
The neural network asynchronous control mentioned by the scheme can enable the trained neural network to enter an asynchronous working state imitating brain, and the asynchronism has uncertainty and randomness and can imitate the brain nerve working process.
Drawings
FIG. 1 is a schematic diagram of a test structure;
FIG. 2 is a schematic diagram of the operation of an asynchronous control module.
Detailed Description
The invention will be further described with reference to the accompanying drawings.
A schematic diagram of the test structure for this method is shown in fig. 1. The uppermost work master control module of the whole structure has the function of controlling the operation and adjustment of the whole structure. And secondly, inputting the module, and temporarily storing the input data in the module. And transmitting the result generated by the training neural network under the synchronous working state by using the training set to an output module. After the synchronous working state is finished, under the action of the neural network asynchronous control module, the delay and the node working state are changed, so that the neural network enters the asynchronous working state, and meanwhile, an output result is output to the output module. Finally, comparing the results of the two modules.
The structure of the neural network asynchronous control module is described by using a constructed single hidden layer feedforward network as shown in fig. 2 (the neural network asynchronous control module can not only control the structure). The constructed neural network structure model is a network structure with d input neurons, l output neurons and q hidden neurons. Wherein y is j Output signal of j-th output layer, x i For the input signal of the ith input layer, the threshold value of the jth neuron of the output layer is θ j Representing the value of the broad of the h neuron of the hidden layer by gamma h And (3) representing. The connection weight between the ith neuron of the input layer and the hidden h neuron is v ih The connection weight between the h neuron of the hidden layer and the j neuron of the output layer is omega hj . The input received by the hidden layer h neuron isThe j-th neuron of the output layer receives the input +.> Wherein b h Is the output of the hidden h neuron. />
And training the constructed neural network model through a training set, namely adjusting the connection weight among neurons and the threshold value of each functional neuron according to training data to obtain a trained neural network sample.
The model built as a whole in fig. 2 is an asynchronous control module. Delay control, i.e. delay of an indefinite network of controllable, operatable nature by changing the connection between certain neurons, e.g. delay control, controls the connection of b2 hidden layer neurons to y1 output neurons a certain time, even if beta 1 =ω 21 b 1 The transmission delay of the data increases; the node control controls the working state of a certain indefinite node to make the node process or not process the signal and transmit the information to the next layer, for example, the node control controls the node of the b2 hidden layer neuron to make the data received by the output layer neuron of the node control the node to be
Claims (6)
1. A circuit structure of a neural network having an asynchronous transfer characteristic, characterized in that: the circuit structure is divided into six modules: the system comprises a working master control module, an input module, a synchronous neural network unit module, a neural network asynchronous control unit module, an output module and a comparison judging module; the working master control module is respectively connected with the input module, the neural network asynchronous control unit module, the synchronous neural network unit module, the output module and the comparison judging module, and the neural network asynchronous control unit module is connected with the synchronous neural network unit module; the neural network asynchronous control unit module comprises delay control and node control, an input module, a synchronous neural network unit module, and an output module which is connected with the comparison judging module sequentially; the six modules form the whole circuit structure;
after the neural network is trained by the synchronous neural network unit module by using the training set, the neural network obtains a standard working state, data is input to generate a result in the synchronous working state, then the neural network asynchronous control unit module is driven to enable the neural network to enter an asynchronous transmission circuit, the data is input again to enable the neural network to enter the working state, and finally the obtained result is compared with the training set, so that the aim of the brain-simulating neural network asynchronous work is achieved;
the specific steps of the circuit structure are as follows,
s1, training the constructed neural network through a training set to obtain a trained synchronous neural network sample, and inputting data to obtain a transmission result;
s2, starting a neural network asynchronous control module to set controllable and operable time delay of a certain indefinite network, and controlling a node in a neural network asynchronous control unit to randomly control whether a certain node performs calculation or not;
s3, after a controlled asynchronous neural network sample is obtained, inputting data into the constructed neural network again, and obtaining an asynchronous transmission result by changing controllable delay and node operation through a neural network asynchronous control unit;
s4, obtaining a normal training set and the training set after the test of the neural network asynchronous control unit, comparing the training set with the training set in the output data comparison module, and outputting a result.
2. A circuit configuration of a neural network having asynchronous transfer characteristics according to claim 1, wherein: the work master control module has the function of controlling the operation and adjustment of the whole structure.
3. A circuit configuration of a neural network having asynchronous transfer characteristics according to claim 1, wherein: the input module is used for temporarily storing the input data in the module; transmitting a result generated by using the training set to train the neural network in a synchronous working state to an output module; after the synchronous working state is finished, under the action of the neural network asynchronous control module, the delay and the node working state are changed, so that the neural network enters the asynchronous working state, and meanwhile, an output result is output to the output module; and comparing the results of the working master control module and the input module.
4. A circuit configuration of a neural network having asynchronous transfer characteristics according to claim 1, wherein: the constructed neural network structure model is a network structure with d input neurons, l output neurons and q hidden neurons; wherein y is j Output signal of j-th output layer, x i For the input signal of the ith input layer, the threshold value of the jth neuron of the output layer is θ j Representing the value of the broad of the h neuron of the hidden layer by gamma h A representation; the connection weight between the ith neuron of the input layer and the hidden h neuron is v ih The connection weight between the h neuron of the hidden layer and the j neuron of the output layer is omega hj The method comprises the steps of carrying out a first treatment on the surface of the The input received by the hidden layer h neuron isThe j-th neuron of the output layer receives the input asWherein b h Is the output of the hidden h neuron.
5. The circuit configuration of a neural network with asynchronous transfer characteristics of claim 4, wherein: and training the constructed neural network model through a training set, namely adjusting the connection weight among neurons and the threshold value of each functional neuron according to training data to obtain a trained neural network sample.
6. The circuit configuration of a neural network with asynchronous transfer characteristics of claim 4, wherein: delay lineTime control controls the connection between b2 hidden layer neurons to y1 output neurons at a time, even if beta 1 =ω 21 b 1 The transmission delay of the data increases; the node control controls the working state of a certain indefinite node to make the node process or not process the signal and transmit the information to the next layer, and the node control controls the node of the b2 hidden layer neuron to make the data received by the output layer neuron as follows
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201811436694.8A CN109615069B (en) | 2018-11-28 | 2018-11-28 | Circuit structure of neural network with asynchronous transmission characteristic |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201811436694.8A CN109615069B (en) | 2018-11-28 | 2018-11-28 | Circuit structure of neural network with asynchronous transmission characteristic |
Publications (2)
Publication Number | Publication Date |
---|---|
CN109615069A CN109615069A (en) | 2019-04-12 |
CN109615069B true CN109615069B (en) | 2023-04-25 |
Family
ID=66004825
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201811436694.8A Active CN109615069B (en) | 2018-11-28 | 2018-11-28 | Circuit structure of neural network with asynchronous transmission characteristic |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN109615069B (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110956258B (en) * | 2019-12-17 | 2023-05-16 | 深圳鲲云信息科技有限公司 | Neural network acceleration circuit and method |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CA2867968A1 (en) * | 2014-10-17 | 2016-04-17 | Seyed Mojaba Smma Mohammadian Abkenar | Cloud computing: neural network processor |
CN107018184A (en) * | 2017-03-28 | 2017-08-04 | 华中科技大学 | Distributed deep neural network cluster packet synchronization optimization method and system |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8738554B2 (en) * | 2011-09-16 | 2014-05-27 | International Business Machines Corporation | Event-driven universal neural network circuit |
-
2018
- 2018-11-28 CN CN201811436694.8A patent/CN109615069B/en active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CA2867968A1 (en) * | 2014-10-17 | 2016-04-17 | Seyed Mojaba Smma Mohammadian Abkenar | Cloud computing: neural network processor |
CN107018184A (en) * | 2017-03-28 | 2017-08-04 | 华中科技大学 | Distributed deep neural network cluster packet synchronization optimization method and system |
Also Published As
Publication number | Publication date |
---|---|
CN109615069A (en) | 2019-04-12 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8738554B2 (en) | Event-driven universal neural network circuit | |
Alspector et al. | Performance of a stochastic learning microchip | |
Shi et al. | Development of a neuromorphic computing system | |
KR20210127133A (en) | elastic neural network | |
US11429857B2 (en) | Secure voice signature communications system using local and remote neural network devices | |
Tong et al. | Robust control invariance of probabilistic Boolean control networks via event-triggered control | |
CN105701540B (en) | A kind of self-generating neutral net construction method | |
CN111814333B (en) | Singular Lur' e network cluster synchronization containment node selection method | |
Hu et al. | Multisynchronization of interconnected memristor-based impulsive neural networks with fuzzy hybrid control | |
Liu et al. | Training radial basis function networks with particle swarms | |
CN113807040A (en) | Optimal design method for microwave circuit | |
CN116468114A (en) | Federal learning method and related device | |
CN111340194B (en) | Pulse convolution neural network neural morphology hardware and image identification method thereof | |
CN109615069B (en) | Circuit structure of neural network with asynchronous transmission characteristic | |
CN109635942B (en) | Brain excitation state and inhibition state imitation working state neural network circuit structure and method | |
Baird et al. | A neural network associative memory for handwritten character recognition using multiple Chua characters | |
CN115800274B (en) | 5G distribution network feeder automation self-adaptation method, device and storage medium | |
Tang et al. | A model of the neuron based on dendrite mechanisms | |
Fox | Massively parallel neural computation | |
Duan et al. | Finite-time synchronization of delayed competitive neural networks with different time scales | |
CN116560731A (en) | Data processing method and related device thereof | |
TWI730452B (en) | Stereo artificial neural network system | |
Ann et al. | Possibility of hybrid multilayered perceptron neural network realisation on FPGA and its challenges | |
Hassan et al. | A spiking neural network controller design with VHDL based on SSO algorithm for inverted pendulum | |
Wei et al. | The research and application of image recognition based on improved BP algorithm |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
CB03 | Change of inventor or designer information |
Inventor after: Geng Shuqin Inventor after: Zhang Yan Inventor after: Yang Caijuan Inventor after: Hou Ligang Inventor after: Peng Xiaohong Inventor before: Hou Ligang Inventor before: Zhang Yan Inventor before: Yang Caijuan Inventor before: Geng Shuqin Inventor before: Peng Xiaohong |
|
CB03 | Change of inventor or designer information | ||
GR01 | Patent grant | ||
GR01 | Patent grant |