CN109600928B

CN109600928B - Manufacturing method of circuit board and stacking structure applied to manufacturing method

Info

Publication number: CN109600928B
Application number: CN201710916841.0A
Authority: CN
Inventors: 廖伯轩
Original assignee: Unimicron Technology Corp
Current assignee: Unimicron Technology Corp
Priority date: 2017-09-30
Filing date: 2017-09-30
Publication date: 2021-04-02
Anticipated expiration: 2037-09-30
Also published as: CN109600928A

Abstract

The invention discloses a manufacturing method of a circuit board and a stacking structure applied to manufacturing the same, wherein the manufacturing method of the circuit board comprises the following steps: forming a plurality of concave structures on the transfer printing layer; forming a dielectric layer on the transfer layer to form a stacked structure, wherein the dielectric layer is at least embedded with the recessed structure; pressing the stacked structure on the substrate to make the dielectric layer contact the substrate; patterning the dielectric layer, wherein the patterning of the dielectric layer comprises exposing the stack structure with a transfer layer therebetween; and removing the transfer layer after the exposure process is completed. Therefore, the invention controls the rough area ratio of the concave structure through the convex structure of the transfer printing layer, thereby increasing the contact area between the conductive circuit and the dielectric layer, further improving the bonding force between the conductive circuit and the dielectric layer to shrink the line width of the conductive circuit, and avoiding the problem that the circuit board generates bubbles in the subsequent process due to the separation of the conductive circuit and the dielectric layer.

Description

Manufacturing method of circuit board and stacking structure applied to manufacturing method

Technical Field

The present invention relates to a circuit board, and more particularly, to a circuit board with a transfer layer.

Background

The circuit board is a part required by electronic devices (electronic devices) such as mobile phones, computers, digital cameras and the like and/or household appliances such as televisions, washing machines, refrigerators and the like at present. In detail, the circuit board can support and mount various electronic components (electronic components) such as a chip (chip), a passive component (passive component), an active component (active component), and a micro-electro-mechanical Systems (MEMS) on the circuit board. Therefore, the current can be transmitted to the electronic element through the circuit board, and the electronic device and/or the household appliance can be operated.

Disclosure of Invention

The invention aims to provide a manufacturing method of a circuit board, which can increase the contact area between a conductive circuit and a dielectric layer, further improve the bonding force between the conductive circuit and the dielectric layer so as to shrink the line width of the conductive circuit, and avoid the problem that the circuit board generates bubbles in the subsequent process due to the separation of the conductive circuit and the dielectric layer.

According to an embodiment of the present invention, a method for manufacturing a circuit board includes forming a plurality of recess structures on a transfer layer; forming a dielectric layer on the transfer layer to form a stacked structure, wherein the dielectric layer is at least embedded with the recessed structure; pressing the stacked structure on the substrate to make the dielectric layer of the stacked structure contact the substrate; patterning the dielectric layer, wherein the patterning of the dielectric layer comprises exposing the stack structure with a transfer layer therebetween; and removing the transfer layer after the exposure process is completed.

In one or more embodiments of the present invention, the forming the plurality of recessed structures on the transfer layer includes: forming a thin film structure on a substrate to form a transfer layer; and forming a pattern on the thin film structure by using a transfer printing process to form a plurality of concave structures.

In one or more embodiments of the present invention, a method of manufacturing a circuit board further includes: after forming the pattern on the thin-film structure of the transfer layer, the thin-film structure is cured.

In one or more embodiments of the present invention, the forming of the dielectric layer on the transfer layer is performed by transferring the plurality of recessed structures to form a plurality of protruding structures on a side of the dielectric layer close to the transfer layer.

In one or more embodiments of the present invention, a method of manufacturing a circuit board further includes: before the stacked structure is laminated on the substrate, a first circuit layer is formed on the substrate. The stacked structure is laminated on the substrate, so that the first circuit layer is embedded in the dielectric layer of the stacked structure.

In one or more embodiments of the present invention, the patterned dielectric layer comprises: before removing the transfer layer, an exposure process forms an exposed region and a non-exposed region on the dielectric layer of the stacked structure. After removing the transfer layer, the exposed dielectric layer is subjected to a developing process.

In one or more embodiments of the present invention, a method of manufacturing a circuit board further includes: a second line layer is formed over the patterned dielectric layer. The second circuit layer is at least embedded with the exposed region of the dielectric layer.

In one or more embodiments of the present invention, the refractive index of the dielectric layer is substantially the same as the refractive index of the transfer layer.

In one or more embodiments of the present invention, the plurality of concave structures are formed on the transfer layer in a multi-dimensional arrangement.

According to another embodiment of the present invention, a stacked structure is applied to manufacturing a circuit board. The stacked structure includes a transfer layer and a dielectric layer. The transfer layer comprises a substrate and a film structure. The film structure is arranged on the substrate and is provided with a plurality of concave structures which are arranged in a multidimensional way. The dielectric layer is arranged on the transfer printing layer and at least positioned in the plurality of sunken structures of the thin film structure, so that the dielectric layer is at least embedded with the plurality of sunken structures on the thin film structure.

In summary, in the present invention, since the protrusion structure of the dielectric layer is complementary to the recess structure of the transfer layer by the transfer process, the protrusion structure has substantially the same Roughness Area Ratio (RSAR) as the recess structure. Therefore, the rough area ratio of the concave structure is controlled by the convex structure of the transfer printing layer, so that the contact area between the conductive circuit and the dielectric layer can be increased, the bonding force between the conductive circuit and the dielectric layer is further improved, the line width of the conductive circuit and the dielectric layer is further reduced, and the problem that the circuit board generates bubbles (Blister) in the subsequent process due to the separation of the conductive circuit and the dielectric layer is avoided.

Drawings

In order to make the aforementioned and other objects, features, and advantages of the present invention comprehensible, embodiments accompanied with figures are described as follows:

fig. 1 to 12 are cross-sectional views of a circuit board at different intermediate stages of manufacturing, respectively, according to an embodiment of the present invention.

Fig. 13 to 14 are sectional views of a circuit board according to another embodiment of the present invention at different intermediate stages of manufacturing, respectively.

Detailed Description

The following description will provide many different embodiments or examples for implementing the subject matter of the present invention. Specific examples of components and arrangements are discussed below to simplify the present disclosure. Of course, these descriptions are only partial examples and the present invention is not limited thereto. For example, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact, as well as embodiments in which other features may be formed between the first and second features, in which case the first and second features may not be in direct contact. In addition, the present invention may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and configurations discussed.

Spatially relative terms, such as "below," "lower," "upper," and the like, may be used herein for convenience in describing the relationship of one element or feature to another element or feature in the figures. Spatially relative terms are intended to encompass other orientations of the device in use or operation in addition to the orientation depicted in the figures. That is, when the device is oriented differently than the figures (rotated 90 degrees or at other orientations), the spatially relative terms used herein should be interpreted accordingly.

Please refer to fig. 1 to 12. Fig. 1 to 12 respectively show cross-sectional views of a circuit board 1 (indicated in fig. 12) at different intermediate stages of manufacture according to an embodiment of the invention.

As shown in fig. 1, a substrate 120 is provided. Then, a thin film structure 122 is formed on the substrate 120 to form the transfer layer 12. That is, the transfer layer 12 of the present embodiment includes a substrate 120 and a thin film structure 122, and is applied to manufacture the circuit board 1. In the present embodiment, the method for forming the thin film structure 122 on the substrate 120 may include a coating process, a deposition process, or any other suitable process. For example, the deposition process may include a spin Coating (spin Coating) process, a slot Coating (slot Coating) process, a Gravure Coating (Gravure Coating) process, a roll Coating (Comma Coating) process, a Physical Vapor Deposition (PVD) process, or any other suitable process. In the present embodiment, the material of the substrate 120 includes Polyethylene terephthalate (PET), but the invention is not limited to this material.

In the present embodiment, the thin film structure 122 is illustrated as a single layer structure. However, in other embodiments, the thin-film structure 122 may be a multilayer structure. The material of the thin film structure 122 of the present invention includes epoxy resin (epoxy), polymethyl methacrylate resin (aromatic resin) or Cyclic Olefin (Cyclic-Olefin), and the thickness thereof is substantially less than 5 micrometers (μm), but the present invention is not limited by the material and the thickness range. The refractive index of the thin-film structure 122 of the present embodiment and the refractive index of the substrate 120 have the following relationship:

1≥n_PET/n_A≥0.995；

wherein n is_PETIs defined as the refractive index of the substrate 120, and n_ADefined as the refractive index of thin-film structure 122. However, the refractive index of the substrate 120 and the refractive index of the thin film structure 122 are not limited to the above relationship, and any other suitable relationship can be applied in the present invention.

As shown in fig. 2, after the transfer layer 12 is formed, a plurality of concave structures 1220 are formed on the thin film structure 122 of the transfer layer 12. Specifically, the present embodiment utilizes the transfer process P1 to form the pattern P on the thin-film structure 122 to form a plurality of recessed structures 1220. For example, in the transfer process P1 of the present embodiment, a microstructure having a pattern P is first fabricated on a mother board (not shown), and the pattern P on the mother board is then transferred onto the thin film structure 122 to form a recessed structure 1220 complementary to the microstructure of the mother board.

The concave structures 1220 of the present embodiment are formed on the thin film structure 122 of the transfer layer 12 in a multi-dimensional arrangement uniformly and regularly with repetition. The multi-dimensional arrangement is a recessed structure 1220 having bottom bits 1222 and top bits 1224 arranged in a staggered manner. The top 1224 of the recessed feature 1220 has a first height H1 relative to the substrate 120, and the first height H1 is substantially less than 5 μm. The top portion 1224 of the recess 1220 has a second height H2 relative to the bottom portion 1222, and the ratio of the second height H2 to the first height H1 is substantially between 0.05 and 0.5. The top bits 1224 of adjacent recessed structures 1220 have a first distance D1 and a second distance D2. In the present embodiment, the first distance D1 is substantially the same as the second distance D2. In other embodiments, the first distance D1 may be different from the second distance D2, so as to form the densely and densely distributed concave structures 1220.

Further, two inner walls 1226 of one of two adjacent recessed structures 1220 are at a first angle a1, and two inner walls 1226 of the other are at a second angle a 2. In the present embodiment, the first angle a1 is substantially the same as the second angle a2 and is substantially between 45 ° and 135 °. In other embodiments, the first angle a1 may be different than the second angle a 2. In some embodiments, the Roughness Area Ratio (RSAR) of the recess 1220 is substantially between 1.1 and 2.6.

As shown in fig. 3, after forming the pattern P on the thin-film structure 122 of the transfer layer 12, the thin-film structure 122 is cured by a curing process P2. In some embodiments, the curing process P2 may comprise a thermal curing process or a photo curing process.

As shown in fig. 4, after curing the thin-film structure 122, the dielectric layer 14 is formed on the thin-film structure 122 of the transfer layer 12 to collectively form the stacked structure 10. That is, the stacked structure 10 includes a transfer layer 12 and a dielectric layer 14. Further, the dielectric layer 14 is formed on the transfer layer 12 such that the recessed structures 1220 on the transfer layer 12 are transferred to form a plurality of complementary protruding structures 140 on the side of the dielectric layer 14 close to the transfer layer 12. The protrusion structures 140 are uniformly distributed on the dielectric layer 14, have a linear profile in cross section (as shown by two sidewalls 148 in fig. 4), and are at least located in the plurality of recess structures 1220 of the thin-film structure 122, so that the dielectric layer 14 is at least embedded with the recess structures 1220 on the transfer layer 12 through the protrusion structures 140.

In the present embodiment, the method for forming the Dielectric layer 14 on the transfer layer 12 may include a coating process, and the material of the Dielectric layer 14 is a photosensitive Dielectric material (PID), but the invention is not limited to the above processes and materials. In some embodiments, the refractive index of the dielectric layer 14 and the refractive index of the thin film structure 122 of the transfer layer 12 have the following relationship:

1≥n_A/n_PID≥0.998；

wherein n is_PIDDefined as the refractive index of the dielectric layer 14, and n_ADefined as the refractive index of thin-film structure 122. In the present embodiment, the refractive index of the dielectric layer 14 is substantially the same as the refractive index of the transfer layer 12. However, the dielectric of the present inventionThe refractive index of the layer 14 and the refractive index of the thin-film structure 122 are not limited to the above relationship, and any other suitable relationship can be applied in the present invention.

Since the protrusion structures 140 of the dielectric layer 14 are complementary to the recess structures 1220 of the transfer layer 12, the protrusion structures 140 have substantially the same roughness area ratio as the mother substrate and the recess structures 1220, and have the same surface profile as the mother substrate. In some embodiments, the roughness area ratio of the protrusion 140 of the dielectric layer 14 is substantially between 1.1 and 2.6. In detail, if the roughness area ratio of the dielectric layer 14 to the surface of the substrate 16 is greater than 2.6, fine lines to be formed in the subsequent process are not easily formed on the surface. On the other hand, if the roughness area ratio of the surface of the dielectric layer 14 relative to the substrate 16 is less than 1.1, the surface may not provide enough contact area to provide the bonding force between the dielectric layer 14 and the circuit to be formed in the subsequent process, and the dielectric layer 14 is separated from the circuit in the subsequent process, thereby causing the problem of blistering (Blister) of the circuit board 1.

Therefore, the present embodiment can form the protruding structure 140 complementary to the recessed structure 1220 of the transfer layer 12 on the dielectric layer 14 by means of transfer printing, so as to control the roughness/area ratio of the recessed structure 1220. Through the mother board and the recess 1220 of the transfer layer 12, the roughness area ratio of the protrusion 140 of the present embodiment can be controlled within a range of about 1.1 to about 2.6, so as to improve the bonding force between the thin line to be formed and the dielectric layer 14 in the subsequent process, and avoid the foaming problem caused by the subsequent baking process to the circuit board 1.

As shown in fig. 5, a substrate 16 is provided. The substrate 16 of the present embodiment has a first surface 160 and a second surface 162 opposite to each other, and may be a ceramic plate, a metal plate, an organic plate, or any other suitable structure. Next, the first circuit layer 18 is formed on the first surface 160 and the second surface 162 of the substrate 16, respectively. Then, after the stacked structure 10 is formed, the stacked structure 10 is pressed on the first surface 160 and the second surface 162 of the substrate 16, respectively, such that the dielectric layer 14 of the stacked structure 10 contacts the first surface 160 and the second surface 162 of the substrate 16, and the first circuit layer 18 is embedded in the dielectric layer 14 of the stacked structure 10, respectively. In the present embodiment, the method for pressing the stacked structure 10 onto the substrate 16 includes a vacuum lamination process, but the invention is not limited to this process. In addition, the machine used in the vacuum lamination process of the present embodiment may include a batch type single-stage laminator or a batch type multi-stage vacuum laminator.

As shown in fig. 6, after the stacked structure 10 is laminated on the substrate 16, the dielectric layer 14 is patterned. In the present embodiment, the stacked structure 10 is exposed through the transfer layer 12 by the exposure process P3 to form an exposed region 142 and a non-exposed region 144 on the dielectric layer 14' of the stacked structure 10. For example, the machines used in the exposure process P3 of the present embodiment may include a Direct Imaging (DI) machine, a Laser Direct Imaging (LDI) machine, a Stepper (Stepper) machine, a Contact exposure (Contact) machine, or any other suitable machine. Since the refractive index of the dielectric layer 14 and the refractive index of the transfer layer 12 in this embodiment are substantially the same and matched, the transfer layer 12 does not affect the patterning of the dielectric layer 14 during the exposure process P3, and thus the exposed regions 142 and the non-exposed regions 144 on the design can be formed on the dielectric layer 14'.

As shown in fig. 7, after the exposure process P3 is performed on the stacked structure 10, the transfer layer 12 is removed to expose the exposed dielectric layer 14'. That is, on the exposed dielectric layer 14', the protrusion structures 140 complementary to the recess structures 1220 of the transfer layer 12 are exposed. Therefore, the present embodiment does not need to form an uneven rough structure on the surface of the exposed dielectric layer 14' opposite to the substrate 16 by an additional etching process, so that the related etching process (e.g., wet etching process) can be omitted, thereby simplifying the manufacturing process and reducing the manufacturing cost.

As shown in fig. 8, after removal of the transfer layer 12, the exposed dielectric layer 14' is subjected to a development process P4 to form a patterned dielectric layer 14 ". Further, the present embodiment removes the non-exposed regions 144 and leaves the exposed regions 142 of the dielectric layer 14' by a developing process P4 to form the via holes 146 and the patterned dielectric layer 14 ″. The first circuit layer 18 is exposed through the via hole 146. Then, after the development process P4 is completed, a curing process is utilized to cure the patterned dielectric layer 14 ". In some embodiments, the curing process of the present embodiments may comprise a thermal curing process, a photo curing process, a combination of the above processes, or any other suitable process.

As shown in fig. 9, after forming the patterned dielectric layer 14 ", a second line layer 19 is formed over the patterned dielectric layer 14" and in the via hole 146 and contacting the first line layer 18. The second circuit layer 19 is at least embedded with the protrusion 140 on the exposed region 142 of the dielectric layer 14'. In the present embodiment, the method of forming the second circuit layer 19 on the patterned dielectric layer 14 ″ includes an electroplating process, but the present invention is not limited thereto. In the present embodiment, the material of the second circuit layer 19 includes copper (Cu). In some embodiments, the material of the second circuit layer 19 may be aluminum (Al), but the invention is not limited to this material, and any other suitable material may be applied to the invention.

Since the roughness area ratio of the protrusion structure 140 in this embodiment is controlled to be substantially between 1.1 and 2.6, the contact area between the second circuit layer 19 and the patterned dielectric layer 14 "can be increased, and the bonding force between the second circuit layer 19 and the patterned dielectric layer 14" can be improved, so as to reduce the chance of mutual separation between the second circuit layer 19 and the patterned dielectric layer 14 "due to insufficient bonding force.

As shown in fig. 10, after forming the second wiring layer 19, a photoresist layer 17 is formed on the second wiring layer 19. The photoresist layer 17 of the present embodiment is at least disposed corresponding to the first circuit layer 18 and has a plurality of openings 170 to expose a portion of the second circuit layer 19. The photoresist layer 17 protects the portion of the second circuit layer 19 covered by the photoresist layer 17. Next, the portion of the second circuit layer 19 exposed by the opening 170 of the photoresist layer 17 is etched by the etching process P5.

As shown in fig. 11, after the etching process P5 is completed, the second circuit layer 19 is patterned to form the first conductive traces 190 and the second conductive traces 192.

As shown in fig. 12, after the first conductive traces 190 and the second conductive traces 192 are formed, the photoresist layer 17 is removed, thereby completing the circuit board 1 of the present embodiment. In detail, the first conductive trace 190 is at least located in the via hole 146 and connected to the first trace layer 18. The second conductive traces 192 are disposed on the exposed portion 142 of the dielectric layer 14' and are electrically isolated from the first conductive traces 190. By controlling the roughness/area ratio of the protrusion 140 in this embodiment, the contact area between the second conductive lines 192 and the patterned dielectric layer 14 "can be increased, thereby improving the bonding force between the second conductive lines 192 and the patterned dielectric layer 14" to shrink the line width thereof, and avoiding the problem of blistering of the circuit board 1 in the subsequent process due to the separation of the second conductive lines 192 and the patterned dielectric layer 14 ". For example, the line width of the second conductive lines 192 formed in the subsequent processes of the present embodiment may be smaller than 30 μm.

In addition, in the present embodiment, the protrusion structures 140 on the patterned dielectric layer 14 ″ are exposed between the first conductive lines 190 and the second conductive lines 192, so that other structures may be contacted in the subsequent process, and the bonding force between the patterned dielectric layer 14 ″ and other structures formed subsequently may be improved, so as to reduce the possibility of the circuit board 1 generating defects due to the separation of the structures.

Please refer to fig. 13. Fig. 13 shows a cross-sectional view of a stacked structure 20 according to another embodiment of the invention. As shown in fig. 13, the stacked structure 20 of the present embodiment includes a transfer layer 22 and a dielectric layer 24. The transfer layer 22 of the stacked structure 20 further includes a substrate 120 and a thin film structure 222. The structure, function and connection relationship of these elements are substantially the same as those of the stacked structure 10 shown in fig. 1 to 4, so that reference can be made to the above description, and further description is omitted here. It is to be noted here that the present embodiment differs from the embodiment shown in fig. 1 to 4 in that the inner wall 2226 of the recessed structure 2220 of the transfer layer 22 in the present embodiment has a curved profile recessed toward the base material 120, and does not have a straight profile as shown by the inner wall 1226 in the cross-sectional view of fig. 2.

The recessed structures 2220 of the present embodiment are uniformly and regularly formed on the thin film structure 222 of the transfer layer 22 in a multi-dimensional arrangement. The multi-dimensional arrangement described above means that the recess 2220 has bottom bits 2222 and top bits 2224 arranged in a staggered manner. The top portion 2224 of the recessed feature 2220 has a first height H3 relative to the substrate 120, and the first height H3 is substantially less than 5 micrometers (μm). The top portion 2224 of the recessed structure 2220 has a second height H4 relative to the bottom portion 2222, and the ratio of the second height H4 to the first height H3 is substantially between 0.05 and 0.5. The top portions 2224 of the adjacent recessed structures 2220 have a first distance D3 and a second distance D4. In the present embodiment, the first distance D3 is substantially the same as the second distance D4. In other embodiments, the first distance D3 may be different from the second distance D4, so as to form the densely-spaced concave structures 2220. In some embodiments, the Roughness Area Ratio (RSAR) of the recess structure 2220 is substantially between 1.1 and 2.6.

Since the protrusion structures 240 of the dielectric layer 24 are complementary to the recess structures 2220 of the transfer layer 22, the protrusion structures 240 have substantially the same roughness area ratio and surface profile as the mother substrate and the recess structures 2220. In some embodiments, the roughness area ratio of the protrusion structure 240 of the dielectric layer 24 is substantially between 1.1 and 2.6. In detail, if the roughness area ratio of the dielectric layer 24 to the surface of the substrate 16 is greater than 2.6, fine lines to be formed in the subsequent process are not easily formed on the surface. On the other hand, if the roughness area ratio of the dielectric layer 24 to the surface of the substrate 16 is less than 1.1, the surface may not provide a sufficient contact area to improve the bonding force between the dielectric layer 24 and the circuit to be formed in the subsequent process, so that the dielectric layer 24 may be separated from the circuit in the subsequent process, thereby causing the problem of blistering of the circuit board 2.

Therefore, the present embodiment may form the protrusion structure 240 complementary to the recess structure 2220 (see fig. 13) of the transfer layer 22 on the dielectric layer 24 by means of transfer so as to control the roughness area ratio of the protrusion structure 240 by the recess structure 2220 of the transfer layer 22. Thus, due to the recessed structure 2220 of the transfer layer 22, the roughness area ratio of the protruding structure 240 of the present embodiment can be controlled within a range of about 1.1 to about 2.6, so as to improve the combination of the fine line to be formed in the subsequent process and the dielectric layer 24, and avoid the problem of blistering (Blister) of the circuit board 2 caused by the subsequent baking process.

In addition, it should be noted that the process steps in the present embodiment between the different intermediate manufacturing stages shown in fig. 13 to 14 are substantially the same as the process steps shown in fig. 5 to 11, and therefore, the related description may refer to the foregoing paragraphs and will not be repeated herein.

Please refer to fig. 14. Fig. 14 shows a cross-sectional view of the circuit board 2 according to another embodiment of the present invention. As shown in fig. 14, the circuit board 2 of the present embodiment includes a substrate 16, a first wiring layer 18, a patterned dielectric layer 24 ", first conductive wirings 190, and second conductive wirings 192. The structure, function and connection relationship of these elements are substantially the same as those of the circuit board 1 shown in fig. 1 to 12, so that reference can be made to the above description, and further description is omitted here. It is noted here that the present embodiment differs from the embodiment shown in fig. 1 to 12 in that in the present embodiment, the protrusion structure 240 located on the dielectric layer 24 has a curved profile protruding away from the substrate 16, rather than having a straight profile as shown by the protrusion structure 240 in the cross-sectional view of fig. 12. Therefore, the present embodiment replaces the protrusion structure 140 shown in fig. 10 with the protrusion structure 240.

By controlling the roughness area ratio of the protrusion structure 240 in this embodiment, the contact area between the second conductive trace 192 and the dielectric layer 24 can be increased, and thus the bonding force between the second conductive trace 192 and the dielectric layer 24 is increased to shrink the line width thereof, and the problem of blistering (Blister) of the circuit board 1 caused by the subsequent process is avoided. For example, the line width of the second conductive lines 192 formed in the subsequent processes of the present embodiment may be smaller than 30 μm.

The foregoing features of the various embodiments may provide those skilled in the art with a better understanding of various aspects of the invention. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions and alterations herein without departing from the spirit and scope of the present disclosure.

Claims

1. A method of manufacturing a circuit board, comprising:

forming a thin film structure on a substrate to form a transfer layer;

forming a pattern on the thin film structure by using a transfer printing process to form a plurality of concave structures, wherein the concave structures are uniformly and regularly formed on the thin film structure in a multi-dimensional arrangement mode;

forming a dielectric layer on the transfer printing layer to form a stack structure, wherein the dielectric layer is at least embedded with the plurality of concave structures;

pressing the stacked structure on a substrate so that the dielectric layer contacts the substrate;

patterning the dielectric layer, and the patterning the dielectric layer comprises:

performing an exposure process on the stacked structure through the transfer layer; and

removing the transfer layer after the exposure process is completed.

2. The method for manufacturing a circuit board according to claim 1, further comprising:

after the forming the pattern on the thin film structure, curing the thin film structure by using a curing process.

3. The method of claim 1, wherein the forming the dielectric layer on the transfer layer is such that the plurality of recessed structures are transferred to form a plurality of protruding structures on a side of the dielectric layer adjacent to the transfer layer.

4. The method for manufacturing a circuit board according to claim 1, further comprising:

forming a first circuit layer on the substrate before the laminating the stacked structure on the substrate, wherein the laminating the stacked structure on the substrate is to embed the first circuit layer in the dielectric layer.

5. The method of manufacturing a circuit board of claim 1, wherein the patterning the dielectric layer comprises:

before the removing of the transfer printing layer, forming an exposed area and a non-exposed area on the dielectric layer by the exposure process; and

after the removing the transfer layer, performing a developing process on the exposed dielectric layer.

6. The method for manufacturing a circuit board according to claim 5, further comprising:

forming a second line layer on the patterned dielectric layer, wherein the second line layer is at least mutually embedded with the exposed region of the dielectric layer.

7. The method of manufacturing a circuit board according to claim 1, wherein a refractive index of the dielectric layer is substantially the same as a refractive index of the transfer layer.

8. A stacked structure for manufacturing a circuit board, the stacked structure comprising a transfer layer, comprising:

a substrate; and

the thin film structure is arranged on the substrate and is provided with a plurality of concave structures which are arranged in a multidimensional way, wherein the concave structures are uniformly and regularly formed on the thin film structure in a multidimensional way, and two straight inner walls of at least one of the concave structures are clamped to form a sharp corner; and

and the dielectric layer is arranged on the transfer printing layer and is at least positioned in the plurality of sunken structures of the thin film structure, so that the dielectric layer is at least embedded with the plurality of sunken structures.