CN109600133B - Circuit capable of avoiding damage of overvoltage - Google Patents
Circuit capable of avoiding damage of overvoltage Download PDFInfo
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- CN109600133B CN109600133B CN201710915197.5A CN201710915197A CN109600133B CN 109600133 B CN109600133 B CN 109600133B CN 201710915197 A CN201710915197 A CN 201710915197A CN 109600133 B CN109600133 B CN 109600133B
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- circuit
- protected
- signal
- protection circuit
- protection
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/007—Fail-safe circuits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/52—Circuit arrangements for protecting such amplifiers
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Emergency Protection Circuit Devices (AREA)
- Protection Of Static Devices (AREA)
Abstract
The application discloses a circuit capable of avoiding damage of overvoltage. Specifically, the present invention discloses a circuit capable of avoiding overvoltage damage at operation start and/or stop moments, wherein one embodiment of the circuit comprises a protected circuit and a protection circuit. The protected circuit receives a supply voltage to operate and comprises: a protected component, wherein a withstand voltage of the protected component is less than the supply voltage; and at least one operation switch for enabling or disabling the protected circuit according to an enable signal. The protection circuit is coupled to the protected component and starts to operate before a transition of the enable signal to protect the protected circuit from damage caused by an overvoltage, wherein the overvoltage is greater than the withstand voltage of the protected component.
Description
Technical Field
The present invention relates to protection circuits, and more particularly to circuits that can avoid overvoltage damage during operation start and/or stop moments.
Background
In designing a circuit (e.g., an operational amplifier or a bias circuit) for an electronic device, in order to achieve better performance with lower power consumption and less circuit area, a lower voltage-resistant but better performance component is used in the main signal path of the circuit, however, because the voltage resistance of the component is lower, the voltage received by the component may exceed the upper limit of the voltage resistance of the component at the moment of switching/supplying power or when abnormal voltage interference is received, thereby causing reduced lifetime or damage of the component. To avoid the above problems, some prior art devices provide a common voltage protection circuit for the non-voltage-resistant devices, however, such a voltage protection circuit may reduce the performance of the protected circuit or cause leakage.
Disclosure of Invention
It is an object of the present invention to provide a circuit which is capable of avoiding overvoltage damage at the moment of starting and/or stopping operation, thereby protecting low withstand voltage components in the circuit.
The invention discloses a circuit capable of avoiding damage caused by overvoltage, and one embodiment of the circuit comprises a protected circuit and a protection circuit. The protected circuit is used for generating at least one output signal according to at least one input signal, receives a power supply voltage to operate, and comprises: a protected component for receiving the at least one input signal, wherein a withstand voltage of the protected component is less than the supply voltage; and at least one operation switch for enabling or disabling the protected circuit according to an enable signal. The protection circuit is coupled between a first end and a second end of the protected component, wherein the first end is used for receiving the at least one input signal, and the protection circuit starts to operate according to a switch signal before the conversion of the enabling signal so as to protect the protected component from being damaged by an overvoltage, and the overvoltage is larger than the withstand voltage of the protected component.
Another embodiment of the circuit capable of avoiding overvoltage damage of the present invention includes a protected circuit and a protection circuit. The protected circuit receives a supply voltage to operate and comprises: a protected component, wherein a withstand voltage of the protected component is less than the supply voltage; and at least one operation switch for enabling or disabling the protected circuit according to an enable signal. The protection circuit is coupled to the protected component, and the protection circuit starts to operate according to a switch signal before a transition of the enable signal so as to protect the protected component from an overvoltage, wherein the overvoltage is greater than the withstand voltage of the protected component.
In an embodiment of the present invention, the protection circuit continuously protects the protected component during the supply of the power supply voltage, regardless of whether the protected component is enabled or not.
In an embodiment of the present invention, the protection circuit includes at least one protection switch for enabling or disabling the protection circuit according to the switch signal, wherein the protection circuit is enabled before the transition of the enable signal.
The features, implementation and functions of the present invention are described in detail below with reference to the preferred embodiments of the present invention.
Drawings
FIG. 1 shows an embodiment of a circuit capable of avoiding over-voltage damage according to the present invention;
FIG. 2 shows an embodiment of the protected circuit and the protection circuit of FIG. 1;
FIG. 3 shows another embodiment of the protected circuit and the protection circuit of FIG. 1;
FIG. 4 shows another embodiment of the protected circuit and the protection circuit of FIG. 1;
FIG. 5 shows an embodiment of the control circuit of FIG. 1; and
fig. 6 shows a timing diagram of the signals of fig. 5 and circuit states associated with the signals.
Detailed Description
The following terms of the description refer to the conventional terms in the art, and as the description of the present invention, some terms are described or defined, and the explanation of the terms in this section is based on the description or definition of the present invention.
The invention discloses a circuit, which can enable a protection circuit in the circuit or maintain the operation of the protection circuit before a protected circuit in the circuit is enabled and/or disabled, thereby avoiding damage to low voltage withstand components in the protected circuit caused by overvoltage at the moment of starting and/or disabling.
Fig. 1 shows an embodiment of the circuit of the present invention. As shown in fig. 1, the circuit 100 of the present invention includes a protected circuit 110, a protection circuit 120 and a control circuit 130. The protected circuit 110 receives a supply voltage V DD To operate and includes a protected component and at least one operating switch (as shown in the embodiments of fig. 2-4). The withstand voltage of the protected components of the protected circuit 110 is less than the supply voltage; generally, withstand voltage refers to an upper voltage limit that a protected device can tolerate, in other words, voltages exceeding the upper voltage limit may damage the protected device or shorten the life of the protected device. At least one operation switch of the protected circuit 110 is configured to enable or disable the protected circuit 110 according to an enable signal, and the protected circuit 110 may receive an overvoltage greater than one or more withstand voltages of the protected components at the moment of being enabled or disabled, so that protection of the protection circuit 120 is required. The protection circuit 120 is coupled to the protected component of the protection circuit 110, andstarting operation before a transition of the enable signal to protect the protected component from the overvoltage, the transition of the enable signal being from disabling the protected circuit 110 to enabling the protected circuit 110 (or from a disable level to an enable level) and/or being from enabling the protected circuit 110 to disabling the protected circuit 110 (or from an enable level to a disable level); in one embodiment, the protection circuit 120 starts or stops operating according to a switching signal (shown by a dotted line in fig. 1), thereby providing protection during operation, wherein the switching signal depends on the enable signal (shown in fig. 6); in another embodiment, the protection circuit 120 is continuously operated to provide protection at all times, when the switching signal is not necessary, or the switching signal is maintained unchanged regardless of the enable signal. The control circuit 130 is configured to generate the enable signal and optionally the switch signal, and one embodiment of the control circuit 130 includes a timing generation circuit (as shown in the embodiment of fig. 5) or an equivalent circuit thereof.
Fig. 2 shows an embodiment of the protected circuit 110 and the protection circuit 120 of fig. 1. As shown in fig. 2, the protected circuit 110 is a folded operational amplifier (folded cascade operational amplifier) for receiving a differential input signal (V IN +、V IN (-) to generate a differential output signal (V) OUT +、V OUT (-), the protected circuit 110 includes: a pair of transistors 210 (PMOS transistors M1 and M2 of fig. 2) for receiving the differential signal; and a plurality of operation switches 220 (PMOS transistors M4, M11, M12 of FIG. 2) for receiving an enable signal POWDB to enable or disable the protected circuit 110. To improve performance, the transistor pair 210 has high performance but low withstand voltage and is therefore easily damaged by an overvoltage, so the transistor pair 210 needs to be protected as a protected device. The protection circuit 120 includes a plurality of transistors (PMOS transistors MP1 and MP2 of fig. 2) coupled between the signal input terminal (gate) and the signal output terminal (drain) of the transistor pair 210; the protection circuit 120 starts to operate before the transition of the enable signal POWDB (i.e., the transistors MP1 and MP2 of FIG. 2 are used as protection switches and are turned on before the transition of the enable signal POWDB) To limit the voltage across each transistor of the transistor pair 210 at the moment the protected circuit 110 is enabled and/or disabled, thereby protecting the transistor pair 210 from damage caused by an overvoltage; in addition, the protection circuit 120 is enabled or disabled according to the switching signal powb_protection, and provides the protection function during the enabled period, and the switching signal powb_protection can be generated by the control circuit 130 of fig. 5 or the equivalent circuit thereof. Since the control and operation of the other circuits of the folded op-amp of fig. 2 (i.e., transistors M3, M5-M10, M13-M16 and their connections) are well known in the art, details thereof are omitted herein.
Fig. 3 shows another embodiment of the protected circuit 110 and the protection circuit 120 of fig. 1. Compared to fig. 2, the protection circuit 120 of fig. 3 further includes a transistor MD1 and a transistor MD2, wherein the transistor MD1 and the transistor MD2 are diode-connected transistors, and serve as voltage limiting devices for determining a voltage difference between the signal input terminal and the signal output terminal of the transistor pair 210 when the protection circuit 120 provides protection, such that the voltage difference is not greater than a voltage resistance of any transistor of the transistor pair 210; in addition, in one embodiment, the protection circuit 120 of fig. 3 is enabled or disabled according to the switch signal powb_protection, and provides a protection function during the enabled period; in another embodiment, the protection circuit 120 of FIG. 3 receives the supply voltage V at the protected circuit 110 DD Thereafter, the protection function is continuously provided according to the switch signal POWB_protection (i.e. the switch signal POWB_protection is kept unchanged to continuously turn on the transistors MP1 and MP2, regardless of whether the protected circuit 110 is enabled) until the power supply voltage V DD The transistors MP1 and MP2 and the switch signal can be omitted.
Fig. 4 shows another embodiment of the protected circuit 110 and the protection circuit 120 of fig. 1. As shown in FIG. 4, the protected circuit 110 is a bias circuit, receiving a bias voltage V B And comprises: a transistor 410 (PMOS transistor MB2 of fig. 4 as a protected component); and an operation switch 420 (NMOS transistor MB4 of FIG. 4) for receiving an enable signal POWD (which corresponds to the inverse of the enable signal POWDB)Number) to enable or disable the protected circuit 110. To improve performance, the transistor 410 has high performance but low withstand voltage and is therefore easily damaged by an overvoltage, so the transistor 410 needs to be protected as a protected device. The protection circuit 120 includes a transistor (PMOS transistor MP1 of fig. 4) coupled between the gate and the drain of the transistor 410; the protection circuit 120 starts to operate before the transition of the enable signal POWD (i.e., the transistor MP1 of FIG. 2 is turned on before the transition of the enable signal POWD) to protect the transistor 410 from damage caused by an overvoltage when the protected circuit 110 is enabled and/or disabled; in addition, the protection circuit 120 is enabled or disabled according to the switching signal powb_protection, and provides a protection function during the enabled period, and the switching signal powb_protection can be generated by the control circuit 130 of fig. 5 or the equivalent circuit thereof. Since the control and operation of the other circuits of the bias circuit of fig. 4 (i.e., transistors MB1, MB3, MB5, MB6 and their connections) are well known in the art, the relevant details are omitted here.
It is noted that in the foregoing embodiments, the withstand voltage (e.g., higher than the supply voltage V) of each unprotected transistor (e.g., transistors M3, M5-M10, and M13-M16 of FIGS. 2 and 3, and transistors MB1 and MB 3-MB 6 of FIG. 4) DD ) Higher than the withstand voltage (e.g., lower than the supply voltage V) of the protected component (e.g., transistor pair 210 of fig. 2 and 3, and transistor MB2 of fig. 4) DD ) However, this is not a limitation of the practice of the invention, as implementation is possible. It should be noted that although the protection circuit 120 is coupled between the gate and the drain of the protected device in the embodiments of fig. 2 to 4, this is not a limitation of the implementation of the present invention; the protection circuit of the present invention may be coupled to both ends of any device/circuit to be protected to achieve a protection effect, for example, when the protected device is a transistor, the protection circuit of the present invention may be coupled between the drain and the source of the transistor.
Fig. 5 shows an embodiment of the control circuit 130 of fig. 1. As shown in fig. 5, the control circuit 130 includes a delay circuit 510, a first logic gate 520 and a second logic gate 530. The delay circuit 510 is used for delaying the output of a control signal POW for a predetermined time to generate a delay signal DS. The first logic gate 520 includes: an OR gate 522 for generating an inverted enable signal POWD according to the delay signal DS and the control signal POW; and an inverter 524 for generating the enable signal POWDB according to the inverted enable signal POWD. The second logic gate 530 includes: a NAND gate 532 for generating an inverse switch signal POW_protection according to the delay signal DS and the control signal POW; and an inverter 534 for generating the switching signal POWB_protect according to the inverted switching signal POW_protect. The timing diagrams of the signals and the states of the protected circuit 110 and the protection circuit 120 associated with the signals are shown in fig. 6, wherein POWB is an inverse signal of the control signal POW, and the marks "on" and "off" represent the states of the circuits as "enable" and "disable", respectively. Note that depending on implementation requirements (e.g., when the operation switches and/or protection switches of fig. 2-4 are made of NMOS), the inverter 524 and/or the inverter 534 of fig. 5 may be omitted, where the enable signal is POWD and/or the switch signal is pow_protect. It is further noted that the enable signal and/or the switching signal may be generated by a known or self-developed circuit equivalent to the control circuit 130 by a person of ordinary skill in the art; alternatively, other known or self-developed circuits may be used by those of ordinary skill in the art to generate the enable signal and/or the switch signal, so long as the switch signal generated by the other circuits enables the protection circuit prior to the transition of the enable signal.
It should be noted that, where possible, one of ordinary skill in the art may selectively implement some or all of the features of any one of the embodiments described above, or may selectively implement some or all of the features of any combination of the embodiments described above, thereby increasing the flexibility in implementing the invention. Note that the inventor can determine the transistor types (e.g., PMOS and NMOS) of the operation switch and the protection circuit according to his needs.
In summary, the circuit of the present invention can avoid the damage to the low voltage device in the circuit caused by the overvoltage at the starting moment, so that the circuit of the present invention can achieve better circuit performance through the low voltage device and ensure the reliability and the service life of the low voltage device. In addition, the circuit protection design of the invention is advantageous, and the circuit of the invention can be manufactured by adopting a common standard CMOS (complementary metal oxide semiconductor) process without particularly considering the voltage withstanding degree of the low voltage withstanding component.
Although the embodiments of the present invention have been described above, the present invention is not limited thereto, and those skilled in the art can make various changes to the technical features of the present invention according to the explicit or implicit disclosure of the present invention, and all such changes may be made within the scope of the present invention, that is, the scope of the present invention is defined by the claims of the present invention.
[ symbolic description ]
100. Circuit capable of avoiding over-voltage damage at operation starting and stopping moments
110. Protected circuit
120. Protection circuit
130. Control circuit
V DD Supply voltage
210. Transistor pair (protected component)
220. Transistor (operation switch)
M1-M16 transistors
MP1, MP2 transistor (protection switch)
V IN +、V IN -differential input signals
V OUT +、V OUT -differential output signal
POWDB Enable Signal
POWB_protect switch signal
MD1, MD2 transistors (Voltage limiting component)
410. Transistor (protected component)
420. Transistor (operation switch)
MB1 to MB6 transistors
MP1 transistor (protection switch)
V B Bias voltage
510. Delay circuit
520. First logic gate circuit
522. OR gate (OR gate)
524. Inverter with a high-speed circuit
530. Second logic gate circuit
532. NAND gate (NAND gate)
534. Inverter with a high-speed circuit
POW control signal
DS delay signal
POWD inverting enable signal
POW_protection inverse switch signal
The on circuit is enabled
The off circuit is disabled
Claims (10)
1. A circuit capable of avoiding damage from overvoltage, comprising:
a protected circuit for generating at least one output signal according to at least one input signal, the protected circuit receiving a supply voltage for operation, comprising:
a protected component for receiving the at least one input signal; and
at least one operation switch for enabling or disabling the protected circuit according to an enable signal; and
the protection circuit is coupled between a first end and a second end of the protected component, wherein the first end is used for receiving the at least one input signal, and the protection circuit starts to operate according to a switching signal before the conversion of the enabling signal so as to protect the protected component from being damaged by overvoltage which is larger than a withstand voltage of the protected component.
2. The circuit of claim 1, wherein the protected device is a transistor pair, the first terminal is two gates of the transistor pair, and the second terminal is two drains or two sources of the transistor pair.
3. The circuit of claim 1, wherein the protection circuit comprises a protection switch that enables or disables the protection circuit based on the switching signal to enable the protection circuit prior to the transition of the enable signal.
4. The circuit of claim 3, wherein the protection circuit further comprises at least one voltage limiting element for limiting a voltage between the first and second ends of the protected element.
5. The circuit capable of avoiding overvoltage damage according to claim 3, further comprising: a control circuit for generating the enable signal and the switch signal according to a control signal.
6. The circuit capable of avoiding overvoltage damage according to claim 5, wherein the control circuit comprises:
a delay circuit for generating a delay signal according to the control signal;
a first logic gate for generating the enable signal according to the delay signal and the control signal; and
and a second logic gate for generating the switching signal according to the delay signal and the control signal, wherein the second logic gate is different from the first logic gate.
7. A circuit capable of avoiding damage from overvoltage, comprising:
a protected circuit for receiving a supply voltage for operation, comprising:
a protected component; and
at least one operation switch for enabling or disabling the protected circuit according to an enable signal; and
a protection circuit coupled to the protected component, the protection circuit operating according to a switching signal before a transition of the enable signal to protect the protected component from an overvoltage, wherein the overvoltage is greater than a withstand voltage of the protected component, the protection circuit comprising at least one protection switch enabling or disabling the protection circuit according to the switching signal, the switching signal enabling the protection circuit before the transition of the enable signal; and
a control circuit for generating the enable signal and the switch signal according to a control signal.
8. The circuit of claim 7, wherein the protection circuit is continuously operated during a supply period of the supply voltage.
9. The circuit of claim 7, wherein the protection circuit is coupled between a first terminal and a second terminal of the protected device, the protected device is a transistor pair, the first terminal is two gates of the transistor pair, and the second terminal is two drains or two sources of the transistor pair.
10. The circuit of claim 9, wherein the protection circuit is coupled between a first end and a second end of the protected component, the protection circuit further comprising at least one voltage limiting component for limiting a voltage between the first end and the second end of the protected component.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710915197.5A CN109600133B (en) | 2017-09-30 | 2017-09-30 | Circuit capable of avoiding damage of overvoltage |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710915197.5A CN109600133B (en) | 2017-09-30 | 2017-09-30 | Circuit capable of avoiding damage of overvoltage |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109600133A CN109600133A (en) | 2019-04-09 |
| CN109600133B true CN109600133B (en) | 2023-05-12 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201710915197.5A Active CN109600133B (en) | 2017-09-30 | 2017-09-30 | Circuit capable of avoiding damage of overvoltage |
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Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8325453B2 (en) * | 2009-05-28 | 2012-12-04 | Qualcomm, Incorporated | Short-circuit protection for switched output stages |
| JP5863027B2 (en) * | 2011-02-14 | 2016-02-16 | ローム株式会社 | Semiconductor device, switching regulator, TV |
| CN103973237B (en) * | 2014-04-30 | 2017-02-22 | 广州钧衡微电子科技有限公司 | Staging overvoltage protection circuit of power amplifier |
| TWM500388U (en) * | 2014-12-30 | 2015-05-01 | Universal Global Scient Ind Co | An overvoltage protection circuit |
| CN106655109B (en) * | 2017-02-09 | 2019-03-26 | 圣邦微电子（北京）股份有限公司 | Protection circuit against input over-voltage applied to integrated circuit |
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2017
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| Publication number | Publication date |
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| CN109600133A (en) | 2019-04-09 |
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