CN109599063B - Em drive circuit of 7T2C - Google Patents
Em drive circuit of 7T2C Download PDFInfo
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- CN109599063B CN109599063B CN201811471850.4A CN201811471850A CN109599063B CN 109599063 B CN109599063 B CN 109599063B CN 201811471850 A CN201811471850 A CN 201811471850A CN 109599063 B CN109599063 B CN 109599063B
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- 239000010409 thin film Substances 0.000 claims abstract description 52
- 239000003990 capacitor Substances 0.000 claims abstract description 19
- 238000010586 diagram Methods 0.000 description 11
- 239000011159 matrix material Substances 0.000 description 8
- 229920001621 AMOLED Polymers 0.000 description 3
- 238000000034 method Methods 0.000 description 2
- 238000004088 simulation Methods 0.000 description 2
- 230000004075 alteration Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
- 238000000844 transformation Methods 0.000 description 1
Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
- G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Electroluminescent Light Sources (AREA)
Abstract
The invention relates to an Em driving circuit of 7T2C, which comprises thin film transistors T11, T12, T13, T14, T15, T16, T17 and capacitors C10 and C12; the control end of the T11 is connected with the drain end of the T13, the source end is connected with the driving voltage VGH, and the drain end is connected with the Em signal output end; the control end of the T12 is connected with the drain end of the T16, the source end is connected with the drain end of the T11, and the drain end is connected with the driving voltage VGL; the control end of the T13 is connected with the input end of the clock signal Eck1, the source end is connected with the input end of the Em-1 signal, and the drain end is connected with the control end of the T15; the control end of the T14 is connected with the drain electrode of the T16, the source electrode is connected with the drain end of the T13, and the drain end is connected with the driving voltage VGL; the source end of the T15 is connected with the drain end of the T16, and the drain end is connected with the driving voltage VGL; the control end of the T16 is connected with the drain end of the T17, and the source end is connected with the driving voltage VGH; the control end of the T17 is connected to the drain end of the T13, and the source end is connected to the driving voltage VGL. The OLED pixel driving circuit meets the requirement of an OLED pixel driving circuit, and meanwhile, the Em driving circuit is simple in structure.
Description
Technical Field
The invention relates to the field of OLED display, in particular to an Em driving circuit of 7T 2C.
Background
The organic light emitting diodes (Organic Light Emitting Diode, OLED) can be classified into Passive Matrix driving (PMOLED) and Active Matrix driving (AMOLED) according to driving methods. The PMOLED does not emit light when data is not written, and emits light only during data writing. The driving mode has simple structure, low cost and easy design, and is mainly suitable for medium and small-sized displays.
Finally, AM represents Active Matrix, and is referred to as Passive Matrix, and refers to the driving mode of each OLED pixel. In the Passive Matrix, the control of each pixel is realized through a complex electrode network, so that the charge and discharge of a certain pixel are realized, and in general, the control mode of the Passive Matrix is relatively slow, and the control precision is slightly low. Unlike Passive Matrix, active Matrix has TFTs and capacitance layers added to each LED, so that when a certain row and a certain column are energized to activate the intersected pixel, the capacitance layers in the pixel can maintain a charged state between two refreshes, thereby realizing faster and more accurate pixel light emission control.
Since the voltage VDD on the AMOLED panel is connected between each pixel, a current flows through the voltage VDD when driving light emission. Considering that the VDD metal line itself has impedance, there is a voltage drop, so that VDD of each pixel may be different, resulting in a current difference between different pixels. In this way, the currents flowing through the OLEDs are different, and the brightness generated is also different, so that the AMOLED panel is not uniform. In addition, due to the influence of the process, the threshold voltages of the tfts in each pixel are different, and even if the same value of the voltage Vdata is provided, the currents generated by the tfts still have differences, which also causes non-uniformity of the panel. Therefore, OLED pixel driving circuits with compensation circuit structures are generally used in the current mass products, but the requirements for GIP (Gate in Panel) driving using compensation circuits are more and more complex, which requires not only Scan GIP circuits (i.e., GIP circuits in LCDs) but also Em driving circuits, which have higher requirements for design than Scan circuits.
In view of this, how to design an Em driving circuit for a pixel compensation circuit is critical to the effective application of the OLED internal compensation circuit.
Disclosure of Invention
Therefore, it is necessary to provide an Em driving circuit of 7T2C to solve the problem that the existing OLED pixel driving circuit has high requirement for the Em driving circuit.
To achieve the above object, the inventors provide an Em driving circuit of 7T2C, including thin film transistors T11, T12, T13, T14, T15, T16, T17 and capacitors C10, C12;
the control end of the thin film transistor T11 is connected with the drain end of the T13, the source end is connected with the driving voltage VGH, and the drain end is connected with the Em signal output end;
the control end of the thin film transistor T12 is connected with the drain end of the T16, the source end is connected with the drain end of the T11, and the drain end is connected with the driving voltage VGL;
the control end of the thin film transistor T13 is connected with the input end of the clock signal Eck1, the source end is connected with the signal input end of Em-1, and the drain end is connected with the control end of the T15;
the control end of the thin film transistor T14 is connected with the drain electrode of the T16, the source electrode is connected with the drain end of the T13, and the drain end is connected with the driving voltage VGL;
the source end of the thin film transistor T15 is connected to the drain end of the T16, and the drain end is connected to the driving voltage VGL;
the control end of the thin film transistor T16 is connected to the drain end of the T17, and the source end of the thin film transistor T16 is connected to the driving voltage VGH;
the control end of the thin film transistor T17 is connected to the drain end of the T13, and the source end is connected to the driving voltage VGL;
one end of the capacitor C10 is connected with the input end of the clock signal Eck2, and the other end of the capacitor C is connected with the control end of the T11;
one end of the capacitor C12 is connected to the input end of the clock signal Eck1, and the other end is connected to the control end of the T16.
Further preferably, the thin film transistors T11, T12, T13, T14, T15, T16, and T17 have N-type structures.
In contrast to the prior art, the above technical solution divides the operation timing of the Em driving circuit into three stages at a time by adopting the 7T2C architecture formed by the tfts T11, T12, T13, T14, T15, T16, T17 and the capacitors C10 and C12. In the first stage, T13 is opened, T11 is closed, C12 is coupled to enable T16 to be opened, then T14 and T12 are opened, and at the moment, the Em signal output end outputs low potential; in the second stage, T13 is closed, but at the moment, T14 and T12 are still open, and at the moment, the Em signal output end still outputs low potential; in the third stage, T13 is opened, then T11 is opened, and at the moment, the Em signal output end outputs high potential; the Em signals of all levels of the Em driving circuit can be normally output, the requirement of the OLED pixel driving circuit is met, and meanwhile, the Em driving circuit is simple in structure.
Drawings
FIG. 1 is a schematic diagram of an Em driving circuit of 7T2C according to an embodiment;
FIG. 2 is a schematic diagram illustrating the operation timing of the Em driving circuit of 7T2C according to the embodiment;
FIG. 3 is a schematic diagram of a first stage of the Em driving circuit of 7T2C according to the embodiment;
FIG. 4 is a schematic diagram of a second stage of the Em driving circuit of 7T2C according to the embodiment;
FIG. 5 is a schematic diagram of a third stage of the Em driving circuit of 7T2C according to the embodiment;
fig. 6 is a schematic diagram of simulation results of an Em driving circuit of 7T2C according to an embodiment.
Detailed Description
In order to describe the technical content, constructional features, achieved objects and effects of the technical solution in detail, the following description is made in connection with the specific embodiments in conjunction with the accompanying drawings.
Referring to fig. 1, the Em driving circuit of 7T2C of the present embodiment includes thin film transistors T11, T12, T13, T14, T15, T16, T17 and capacitors C10, C12; the thin film transistors T11, T12, T13, T14, T15, T16 and T17 all adopt N-type structures.
The control end of the thin film transistor T11 is connected with the drain end of the T13, the source end is connected with the driving voltage VGH, and the drain end is connected with the Em signal output end;
the control end of the thin film transistor T12 is connected with the drain end of the T16, the source end is connected with the drain end of the T11, and the drain end is connected with the driving voltage VGL;
the control end of the thin film transistor T13 is connected with the input end of the clock signal Eck1, the source end is connected with the signal input end of Em-1, and the drain end is connected with the control end of the T15;
the control end of the thin film transistor T14 is connected with the drain electrode of the T16, the source electrode is connected with the drain end of the T13, and the drain end is connected with the driving voltage VGL;
the source end of the thin film transistor T15 is connected to the drain end of the T16, and the drain end is connected to the driving voltage VGL;
the control end of the thin film transistor T16 is connected to the drain end of the T17, and the source end of the thin film transistor T16 is connected to the driving voltage VGH;
the control end of the thin film transistor T17 is connected to the drain end of the T13, and the source end is connected to the driving voltage VGL;
one end of the capacitor C10 is connected with the input end of the clock signal Eck2, and the other end of the capacitor C is connected with the control end of the T11;
one end of the capacitor C12 is connected to the input end of the clock signal Eck1, and the other end is connected to the control end of the T16.
The 7T2C architecture is constructed by using thin film transistors T11, T12, T13, T14, T15, T16, T17 and capacitors C10, C12.
As shown in fig. 2, the operation timing diagram of the Em driving circuit of 7T2C, the 7T2C architecture divides the operation timing of the Em driving circuit into three stages at a time: a first stage t1, a second stage t2 and a third stage t3.
A schematic circuit diagram of the first stage of the Em driving circuit of 7T2C shown in fig. 3; in the first stage T1, the thin film transistor T13 is turned on, the Q point is at a low potential, at this time, the thin film transistor T11 is turned off, the C12 is coupled, i.e. the clock signal ECK1 is coupled to the K point, so that the thin film transistor T16 is turned on, at this time, the P point is at a high potential, and then the thin film transistors T14 and T12 are turned on, at this time, the Em signal output terminal outputs a low potential.
A circuit diagram of the second stage of the Em driving circuit of 7T2C shown in fig. 4; in the second stage T2, the thin film transistor T13 is turned off, but the P point is still at a high voltage, so that the thin film transistors T14 and T12 are still turned on, and the Em signal output terminal still outputs a low voltage.
A circuit schematic diagram of a third stage of the Em driving circuit of 7T2C shown in fig. 5; in the third stage T3, the clock signal Eck1 is again at a high potential, at this time, the thin film transistor T13 is turned on, the Q point is changed to a high potential, that is, the control terminal of T11 is at a high potential, and at this time, the source terminal of T11 is also at a high potential, so that in order to make T11 output a high potential, the capacitor C10 is coupled through the clock signal Eck2, and thus the thin film transistor T11 is turned on, and the Em signal output terminal outputs a high potential; at this time, the thin film transistor T15 is turned on, and the point P is pulled to a low potential, and at this time, the thin film transistors T14 and T12 are turned off.
As shown in the simulation result schematic diagram of the Em driving circuit of 7T2C in FIG. 6, em signals at all levels of the Em driving circuit can be normally output, so that the requirement of the OLED pixel driving circuit is met, and meanwhile, the Em driving circuit is simple in structure.
It should be noted that, although the foregoing embodiments have been described herein, the scope of the present invention is not limited thereby. Therefore, based on the innovative concepts of the present invention, alterations and modifications to the embodiments described herein, or equivalent structures or equivalent flow transformations made by the present description and drawings, apply the above technical solutions directly or indirectly to other relevant technical fields, all of which are included in the scope of protection of the present patent.
Claims (2)
1. An Em driving circuit of 7T2C is characterized by comprising thin film transistors T11, T12, T13, T14, T15, T16, T17 and capacitors C10 and C12;
the control end of the thin film transistor T11 is connected with the drain end of the T13, the source end is connected with the driving voltage VGH, and the drain end is connected with the Em signal output end;
the control end of the thin film transistor T12 is connected with the drain end of the T16, the source end is connected with the drain end of the T11, and the drain end is connected with the driving voltage VGL;
the control end of the thin film transistor T13 is connected with the input end of the clock signal Eck1, the source end is connected with the signal input end of Em-1, and the drain end is connected with the control end of the T15;
the control end of the thin film transistor T14 is connected with the drain electrode of the T16, the source electrode is connected with the drain end of the T13, and the drain end is connected with the driving voltage VGL;
the source end of the thin film transistor T15 is connected to the drain end of the T16, and the drain end is connected to the driving voltage VGL;
the control end of the thin film transistor T16 is connected to the drain end of the T17, and the source end of the thin film transistor T16 is connected to the driving voltage VGH;
the control end of the thin film transistor T17 is connected to the drain end of the T13, and the source end is connected to the driving voltage VGL;
one end of the capacitor C10 is connected with the input end of the clock signal Eck2, and the other end of the capacitor C is connected with the control end of the T11;
one end of the capacitor C12 is connected with the input end of the clock signal Eck1, and the other end of the capacitor C is connected with the control end of the T16;
the 7T2C architecture divides the operational timing of the Em driving circuit into three phases at a time: a first stage t1, a second stage t2, and a third stage t3;
in the first stage T1, the thin film transistor T13 is turned on, at this time, the thin film transistor T11 is turned off, and the capacitor C12 is coupled, so that the thin film transistor T16 is turned on, at this time, the point P is at a high potential, and then the thin film transistors T14 and T12 are turned on, at this time, the Em signal output terminal outputs a low potential;
in the second stage T2, the thin film transistor T13 is turned off, the thin film transistors T14 and T12 are still turned on, and the Em signal output terminal still outputs a low potential;
in the third stage T3, the clock signal Eck1 is high again, at this time, the thin film transistor T13 is turned on, the control terminal of T11 is also high, the source terminal of T11 is also high, the capacitor C10 is coupled by the clock signal Eck2, so that the thin film transistor T11 is turned on, and the Em signal output terminal outputs high potential; at this time, the thin film transistor T15 is turned on, and the thin film transistors T14 and T12 are turned off.
2. The Em driving circuit of claim 1, wherein said thin film transistors T11, T12, T13, T14, T15, T16, T17 are N-type structures.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201811471850.4A CN109599063B (en) | 2018-12-04 | 2018-12-04 | Em drive circuit of 7T2C |
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| CN201811471850.4A CN109599063B (en) | 2018-12-04 | 2018-12-04 | Em drive circuit of 7T2C |
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| CN109599063A CN109599063A (en) | 2019-04-09 |
| CN109599063B true CN109599063B (en) | 2024-04-12 |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105679271A (en) * | 2016-02-22 | 2016-06-15 | 友达光电股份有限公司 | Multiplexer and driving method thereof |
| CN107731143A (en) * | 2017-11-24 | 2018-02-23 | 武汉华星光电半导体显示技术有限公司 | Test circuit and method of testing, the displayer of displayer |
| CN209149787U (en) * | 2018-12-04 | 2019-07-23 | 福建华佳彩有限公司 | A kind of Em driving circuit of 7T2C |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW536691B (en) * | 2002-03-19 | 2003-06-11 | Au Optronics Corp | Drive circuit of display |
| TW582009B (en) * | 2002-06-28 | 2004-04-01 | Au Optronics Corp | Driving circuit of display device |
| CN105609029B (en) * | 2016-03-24 | 2019-10-01 | 深圳市华星光电技术有限公司 | Sense the system and AMOLED display device of AMOLED pixel driver characteristic |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105679271A (en) * | 2016-02-22 | 2016-06-15 | 友达光电股份有限公司 | Multiplexer and driving method thereof |
| CN107731143A (en) * | 2017-11-24 | 2018-02-23 | 武汉华星光电半导体显示技术有限公司 | Test circuit and method of testing, the displayer of displayer |
| CN209149787U (en) * | 2018-12-04 | 2019-07-23 | 福建华佳彩有限公司 | A kind of Em driving circuit of 7T2C |
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