CN109597570A - The method of high speed processing flash memory and equipment and readable storage medium storing program for executing based on this method - Google Patents
The method of high speed processing flash memory and equipment and readable storage medium storing program for executing based on this method Download PDFInfo
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- CN109597570A CN109597570A CN201811268116.8A CN201811268116A CN109597570A CN 109597570 A CN109597570 A CN 109597570A CN 201811268116 A CN201811268116 A CN 201811268116A CN 109597570 A CN109597570 A CN 109597570A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0614—Improving the reliability of storage systems
- G06F3/0616—Improving the reliability of storage systems in relation to life time, e.g. increasing Mean Time Between Failures [MTBF]
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0638—Organizing or formatting or addressing of data
- G06F3/064—Management of blocks
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0646—Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
- G06F3/0652—Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
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- General Physics & Mathematics (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
The invention discloses the formatting of Flash a kind of and initial methods, belong to computer field, comprising: the scanning bad block of Flash reads current bad block table from the EEPROM table of flash memory；Bad block is judged whether there is, if bad block, which is written in bad block list, and the bad block is rejected from sector；If not bad block；Retain in a sector；Bad block mapping table is updated, updated initialization bad block table is established in the EEPROM of memory bar；It updates after initializing bad block mapping table, establishes logical block/physical block mapping table；Logical block service condition is recorded in EEPROM；Piece of video segment table is established in EEPROM.The exemplary technical solution of the present invention, the operation being written while wiping can be realized in the formatting procedure of Flash, substantially increases the working efficiency of Flash format.
Description
Technical field
The invention belongs to computer field, the method for specifically a kind of high speed processing flash memory and setting based on this method
Standby and readable storage medium storing program for executing.
Background technique
Since flash memory technology comes out, spy charming with low power consuming, non-volatile, shatter-proof, high storage density etc. always
Property, in many portable devices, replaces Erasable Programmable Read Only Memory EPROM (EEPROM) gradually or battery powered deposit
Nowadays reservoir is even more since current semiconductor technology increasingly progresses greatly, the storage density and transmission speed of flash memory even more have prominent winged violent
Into growth, therefore flash memory can more replace the conventional storages media such as hard drives in many application aspects.
But due to the progress of science and technology, the market demand capacity of flash memory is increasing, so being allowed to execute to format needs
Section to be processed increases therewith with paging, and then the time for making to execute needed for formatting lengthens, and does not increase its life in manufacturer
In the case where producing equipment, then production capacity can be reduced because the time of formatting increases, and then increase production cost and marry again to disappearing
Fei Zhe allows consumer that can not exchange the commodity of high-quality for preferential price.
How to improve the execution efficiency of Flash format as a result, relevant manufactures as engaged in this industry want to study
Where improved direction.So related data is then collected, via more in view of considerable problem and factor existing for current environment
Side assesses and considers, and based on years of experience accumulated in this industry, and through continuous trial and modification, the beginning designs such lattice
The method of formula.
Summary of the invention
In order to solve above-mentioned deficiency in the prior art, the purpose of the present invention is to provide a kind of sides of high speed processing flash memory
Method and equipment and readable storage medium storing program for executing based on this method carry out write operation while executing erasing block in data procedures, into
Row concurrent operation has filled up a blank of current Flash format and initialization operation, has substantially increased Flash in format
Change and the working efficiency of initialization procedure, effectively shortens the time.
In order to solve the above-mentioned technical problem, the present invention adopts the following technical scheme:
A kind of method of high speed processing flash memory, including initialization flash information table, specifically comprise the following steps:
(11) it scans bad block: reading current bad block table from the EEPROM table of flash memory；
(12) bad block is judged whether there is, if bad block, which is written in bad block list, and by the fast block from sector
It rejects；If not bad block；Retain in a sector；
(13) bad block mapping table is updated, updated initialization bad block table is established in the EEPROM of memory bar；
(14) it updates after initializing bad block mapping table, establishes logical block/physical block mapping table；
(15) logical block service condition is recorded in EEPROM；
(16) piece of video segment table is established in EEPROM.
As advanced optimizing for above scheme, include the following steps:
(21 read initialization flash information table, and the flash information includes flash type and erasing block size；
(22) read-write and erasing treatment process, method particularly includes: it is wiped by block, writes current wiping:
(a)A piece selects CE, i >=1；
(b) each piece selects CE, including j page Page, j=1,2, and 3 ... .512；
(c) during read-write, CE1Start to execute erasing block command, removes CE1All CE in additioni(i ≠ 1) carries out simultaneously
Write Pagej, and write Pagej, it is incremented by write-in from j=1；
(d) work as CE1It wipes block to complete, CE1All CE in additioni(i ≠ 1), which is gone to, writes Pagej, j=k1, CE at this time2It opens
Begin to execute erasing block command；
(e)CE2Start to execute erasing block command, CE1Page is write in executionj, remove CE1、CE2All CE in additioniIt carries out simultaneously
Write Pagej, from j >=k1It is incremented by order write-in data；
(f) work as CE2It wipes block to complete, CE2All CE in additioni(i ≠ 2), which are gone to, writes Pagej, j=k2, CE at this time3It opens
Begin to execute erasing block command；
(g)CE3Start to execute erasing block command, CE1Page is write in executionj, CE2Page is write in executionj, remove CE1、CE2、CE3In addition
All CEiIt carries out writing Page simultaneouslyj, from j >=k2It is incremented by order write-in data；
……
(h) subsequent and so on, until the last one piece selects CEiErasing block command and erasure completion are executed；
(i) all pieces select while writing data.
As advanced optimizing for above scheme, the standard of bad block is judged whether there is are as follows: for a physical block
(BLOCK), corresponding 2 bytes indicate that the block has been block if two bytes are all FF；Otherwise the block is bad block.
As advanced optimizing for above scheme, every flash memory item is made of 8 Flash particle chips, and 8 Flash points
At 4 groups, CE signal is selected to be gated by 4 pieces respectively, every group of 2 chips, totally 8 LUN, the data-line width of each LUN are
8bit forms the data line of 64bit width.
As advanced optimizing for above scheme, physical block locations mapping table PhyBlockMap, PhyBlockMap are established
Each single item record the corresponding physical block locations of the logical block, each is defined as follows:
M83C:{ C3P1, C3P0, C2P1, C2P0, C2P1, C1P0, C1P1, C0P0 }
B0KB:{ C3P3, C3P2, C3P1, C3P0 ..., C0P3, C0P2, C0P1, C0P0 }
Wherein, it is x that each C P, which indicates that piece selects CE, and plane is the position of physical block on n, and length is 10.
As advanced optimizing for above scheme, physical block locations mapping table PhyBlockMap passes through logical block table
I2Cstream write-in.Logical block Table I 2Cstream is written by byte, and the byte being first written is located at highest order, and byte connects
After connecing, data flow is truncated in write-in table according to the length of each list item in video camera.
As advanced optimizing for above scheme, is sent to camera shooting and scan bad block command FC_SCAN_BLOCK, scan bad block
Result received by function GetStreaamData；Scanning sequency is as follows: CE0, Plane0, Block0 → CE0, Plane1,
Block0 → CE0, Plane2, Block0 → CE0, Plane3, Block0 → CE1, Plane0, Block0 → CE1, Plane1,
Block0 → CE1, Plane2, Block0 → CE1, Plane3, Block0 →
…
CE3, Plane0, Block547 → CE0, Plane1, Block547 → CE0, Plane2, Block547 → CE0,
Plane3, Block547.
The logical block that can be used is recorded with logical block table every time when shooting as advanced optimizing for above scheme；
The corresponding idle logical block number of each single item of logical block table, the length of logical block number is 10.
The present invention also provides a kind of equipment, characterized in that the equipment includes:
One or more processors；
Memory, for storing one or more programs,
When one or more of programs are executed by one or more of processors, so that one or more of places
The method for managing a kind of high speed processing flash memory that device is executed as described in 1-8 is any.
The present invention also provides the computer readable storage mediums for being stored with computer program, characterized in that the program quilt
A kind of method of high speed processing flash memory as described in 1-8 is any is realized when processor executes.
Compared with prior art, a kind of method of high speed processing flash memory of the invention and the equipment based on this method and readable
Storage medium has the beneficial effect that
1, the method for a kind of high speed processing flash memory of the invention executes in carrying out Flash format and initialization procedure
Write operation is carried out while wiping block, is carried out concurrent operation, has been filled up a sky of current Flash format and initialization operation
It is white, it substantially increases Flash and is formatting and the working efficiency of initialization procedure, effectively shorten the time.
2, the method for a kind of high speed processing flash memory of the invention, greatly reduces the time of first flash memory file system, guarantees
The stability of system furthermore it is possible to reduce the erasing move to flash memory substantially prolongs the service life of flash memory.
Detailed description of the invention
By reading a detailed description of non-restrictive embodiments in the light of the attached drawings below, the application's is other
Feature, objects and advantages will become more apparent upon:
Fig. 1 is a kind of flow diagram of the method for high speed processing flash memory of the present invention；
Fig. 2 is a structural schematic diagram of Flash memory bar in the embodiment of the present invention；
Fig. 3 is another structural schematic diagram of Flash memory bar in the embodiment of the present invention；
Fig. 4 is that Flash memory bar starts first erasing block schematic diagram in the embodiment of the present invention；
Specific embodiment
The application is described in further detail with reference to the accompanying drawings and examples.It is understood that this place is retouched
The specific embodiment stated is used only for explaining related invention, rather than the restriction to the invention.It also should be noted that in order to
Convenient for description, part relevant to invention is illustrated only in attached drawing.
It should be noted that in the absence of conflict, the features in the embodiments and the embodiments of the present application can phase
Mutually combination.The application is described in detail below with reference to the accompanying drawings and in conjunction with the embodiments.
A kind of method of high speed processing flash memory, including initialization flash information table, specifically comprise the following steps:
(11) it scans bad block: reading current bad block table from the EEPROM table of flash memory；
(12) bad block is judged whether there is, if bad block, which is written in bad block list, and by the fast block from sector
It rejects；If not bad block；Retain in a sector；
(13) bad block mapping table is updated, updated initialization bad block table is established in the EEPROM of memory bar；
(14) it updates after initializing bad block mapping table, establishes logical block/physical block mapping table；
(15) logical block service condition is recorded in EEPROM；
(16) piece of video segment table is established in EEPROM.
A kind of method of high speed processing flash memory, includes the following steps:
(21 read initialization flash information table, and the flash information includes flash type and erasing block size；
(22) read-write and erasing treatment process, method particularly includes: it is wiped by block, writes current wiping:
(a)A piece selects CE, i >=1；
(b) each piece selects CE, including j page Page, j=1,2, and 3 ... .512；
(c) during read-write, CE1Start to execute erasing block command, removes CE1All CE in additioni(i ≠ 1) carries out simultaneously
Write Pagej, and write Pagej, it is incremented by write-in from j=1；
(d) work as CE1It wipes block to complete, CE1All CE in additioni(i ≠ 1), which is gone to, writes Pagej, j=k1, CE at this time2It opens
Begin to execute erasing block command；
(e)CE2Start to execute erasing block command, CE1Page is write in executionj, remove CE1、CE2All CE in additioniIt carries out simultaneously
Write Pagej, from j >=k1It is incremented by order write-in data；
(f) work as CE2It wipes block to complete, CE2All CE in additioni(i ≠ 2), which are gone to, writes Pagej, j=k2, CE at this time3It opens
Begin to execute erasing block command；
(g)CE3Start to execute erasing block command, CE1Page is write in executionj, CE2Page is write in executionj, remove CE1、CE2、CE3In addition
All CEiIt carries out writing Page simultaneouslyj, from j >=k2It is incremented by order write-in data；
……
(h) subsequent and so on, until the last one piece selects CEiErasing block command and erasure completion are executed；
(i) all pieces select while writing data.
As advanced optimizing for above scheme, the standard of bad block is judged whether there is are as follows: for a physical block
(BLOCK), corresponding 2 bytes indicate that the block has been block if two bytes are all FF；Otherwise the block is bad block.
In this preferred embodiment, every flash memory item is made of 8 Flash particle chips, and 8 Flash are divided into 4 groups, respectively
CE signal is selected to be gated by 4 pieces, every group of 2 chips, totally 8 LUN, the data-line width of each LUN are 8bit, composition
The data line of 64bit width.
As advanced optimizing for above scheme, physical block locations mapping table PhyBlockMap, PhyBlockMap are established
Each single item record the corresponding physical block locations of the logical block, each is defined as follows:
M83C:{ C3P1, C3P0, C2P1, C2P0, C2P1, C1P0, C1P1, C0P0 }
B0KB:{ C3P3, C3P2, C3P1, C3P0 ..., C0P3, C0P2, C0P1, C0P0 }
Wherein, it is x that each C P, which indicates that piece selects CE, and plane is the position of physical block on n, and length is 10.
As advanced optimizing for above scheme, physical block locations mapping table PhyBlockMap passes through logical block table
I2Cstream write-in.Logical block Table I 2Cstream is written by byte, and the byte being first written is located at highest order, and byte connects
After connecing, data flow is truncated in write-in table according to the length of each list item in video camera.
As advanced optimizing for above scheme, is sent to camera shooting and scan bad block command FC_SCAN_BLOCK, scan bad block
Result received by function GetStreaamData；Scanning sequency is as follows: CE0, Plane0, Block0 → CE0, Plane1,
Block0 → CE0, Plane2, Block0 → CE0, Plane3, Block0 → CE1, Plane0, Block0 → CE1, Plane1,
Block0 → CE1, Plane2, Block0 → CE1, Plane3, Block0 →
…
CE3, Plane0, Block547 → CE0, Plane1, Block547 → CE0, Plane2, Block547 → CE0,
Plane3, Block547.
The logical block that can be used is recorded with logical block table every time when shooting as advanced optimizing for above scheme；
The corresponding idle logical block number of each single item of logical block table, the length of logical block number is 10.
Currently used flash memory Flash two types parameter information, by taking the Flash type of M83C and B0KB as an example the first
M83C is made of 4 logic units (LNU), and each LNU is made of 2planes, and each plane is by 524blocks group
At each block is made of 256pages.
Second of B0KB is made of 4 logic units (LNU), and each LNU is made of 4planes, each plane be by
548blocks composition, each block are made of 512pages.
A block in flash memory Flash luv space structure, is denoted as physical block, and size is 16384 × 256 (M83C)
Or 16384 × 512 (B0KB).The definition of logical block is: being grouped according to CE, respectively takes a physics from each plane, each lun
Block forms a logical block, and size is 16384 × 256 × 2 × 8 (M83C) or 16384 × 512 × 4 × 8 (B0KB).
The present invention also provides a kind of equipment, characterized in that the equipment includes:
One or more processors；
Memory, for storing one or more programs,
When one or more of programs are executed by one or more of processors, so that one or more of places
The method for managing a kind of high speed processing flash memory that device is executed as described in 1-8 is any.
The present invention also provides the computer readable storage mediums for being stored with computer program, characterized in that the program quilt
A kind of method of high speed processing flash memory as described in 1-8 is any is realized when processor executes.
Above description is only the preferred embodiment of the application and the explanation to institute's application technology principle.Those skilled in the art
Member is it should be appreciated that invention scope involved in the application, however it is not limited to technology made of the specific combination of above-mentioned technical characteristic
Scheme, while should also cover in the case where not departing from the inventive concept, it is carried out by above-mentioned technical characteristic or its equivalent feature
Any combination and the other technical solutions formed.Such as features described above has similar function with (but being not limited to) disclosed herein
Can technical characteristic replaced mutually and the technical solution that is formed.
Except for the technical features described in the specification, remaining technical characteristic is the known technology of those skilled in the art, is prominent
Innovative characteristics of the invention out, details are not described herein for remaining technical characteristic.
Claims (10)
1. a kind of method of high speed processing flash memory, which is characterized in that including initializing flash information table, specifically include following step
It is rapid:
(11) it scans bad block: reading current bad block table from the EEPROM table of flash memory；
(12) bad block is judged whether there is, if bad block, which is written in bad block list, and the bad block is picked from sector
It removes；If not bad block；Retain in a sector；
(13) bad block mapping table is updated, updated initialization bad block table is established in the EEPROM of memory bar；
(14) it updates after initializing bad block mapping table, establishes logical block/physical block mapping table；
(15) logical block service condition is recorded in EEPROM；
(16) piece of video segment table is established in EEPROM.
2. a kind of method of high speed processing flash memory according to claim 1, which comprises the steps of:
(21 read initialization flash information table, and the flash information includes flash type and erasing block size；
(22) read-write and erasing treatment process, method particularly includes: it is wiped by block, writes current wiping:
(a)A piece selects CE, and >=1；
(b) each piece selects CE, including j page Page, j=1,2, and 3 ... .512；
(c) during read-write, CE1Start to execute erasing block command, removes CE1All CE in additioni(i ≠ 1) is write simultaneously
Pagej, and write Pagej, it is incremented by write-in from j=1；
(d) work as CE1It wipes block to complete, CE1All CE in additioni(i ≠ 1), which is gone to, writes Pagej, j=k1, CE at this time2Start to hold
Row erasing block command；
(e)CW2Start to execute erasing block command, CE1Page is write in executionj, remove CE1、CE2All CE in additioniIt is write simultaneously
Pagej, from j >=k1It is incremented by order write-in data；
(f) work as CE2It wipes block to complete, CE2All CE in additioni(i ≠ 2), which are gone to, writes Pagej, j=k2, CE at this time3Start to hold
Row erasing block command；
(g)CE3Start to execute erasing block command, CE1Page is write in executionj, CE2Page is write in executionj, remove CE1、CE2、CE3Institute in addition
There is CEiIt carries out writing Page simultaneouslyj, from j >=k2It is incremented by order write-in data；
……
(h) subsequent and so on, until the last one piece selects CEiErasing block command and erasure completion are executed；
(i) all pieces select while writing data.
3. a kind of method of high speed processing flash memory according to claim 1, it is characterised in that: judge whether there is the mark of bad block
It is quasi- are as follows: for a physical block (BLOCK), corresponding 2 bytes indicate that the block has been block if two bytes are all FF；Otherwise should
Block is bad block.
4. a kind of method of high speed processing flash memory according to claim 2, it is characterised in that: every flash memory item is by 8
Flash particle chip composition, 8 Flash are divided into 4 groups, select CE signal to be gated by 4 pieces respectively, every group of 2 chips, and totally 8
The data-line width of a LUN, each LUN are 8bit, form the data line of 64bit width.
5. a kind of method of high speed processing flash memory according to claim 4, it is characterised in that: establish physical block locations mapping
The each single item of table PhyBlockMap, PhyBlockMap record the corresponding physical block locations of the logical block, each is defined as follows:
M83C:{ C3P1, C3P0, C2P1, C2P0, C2P1, C1P0, C1P1, C0P0 }
B0KB:{ C3P3, C3P2, C3P1, C3P0 ..., C0P3, C0P2, C0P1, C0P0 }
Wherein, it is x that each CXPn, which indicates that piece selects CE, and plane is the position of physical block on n, and length is 10.
6. a kind of method of high speed processing flash memory according to claim 4, it is characterised in that: physical block locations mapping table
PhyBlockMap is written by logical block Table I 2Cstream.Logical block Table I 2Cstream is written by byte, is first written
Byte is located at highest order, and after byte connection, data flow is truncated in write-in table according to the length of each list item in video camera.
7. a kind of method of high speed processing flash memory according to claim 4, it is characterised in that: send scanning bad block to camera shooting
FC_SCAN_BLOCK is ordered, the result for scanning bad block is received by function GetStreaamData；Scanning sequency is as follows: CE0,
Plane0, Block0 → CE0, Plane1, Block0 → CE0, Plane2, Block0 → CE0, Plane3, Block0 → CE1,
Plane0, Block0 → CE1, Plane1, Block0 → CE1, Plane2, Block0 → CE1, Plane3, Block0 →
…
CE3, Plane0, Block547 → CE0, Plane1, Block547 → CE0, Plane2, Block547 → CE0,
Plane3, Block547.
8. a kind of method of high speed processing flash memory according to claim 4, it is characterised in that: every time when shooting, use logic
Block table records the logical block that can be used；The corresponding idle logical block number of each single item of logical block table, logical block are compiled
Number length be 10.
9. a kind of equipment, characterized in that the equipment includes:
One or more processors；
Memory, for storing one or more programs,
When one or more of programs are executed by one or more of processors, so that one or more of processors
The method for executing a kind of high speed processing flash memory as described in 1-8 is any.
10. being stored with the computer readable storage medium of computer program, characterized in that the realization when program is executed by processor
A kind of method of high speed processing flash memory as described in 1-8 is any.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN110457233A (en) * | 2019-08-10 | 2019-11-15 | 深圳市德名利电子有限公司 | A kind of flash memory management method and device and equipment based on mixed size unit |
| CN110993014A (en) * | 2019-11-20 | 2020-04-10 | 深圳忆联信息系统有限公司 | Behavior test method and device of SSD in idle state, computer equipment and storage medium |
| CN111949198A (en) * | 2019-05-16 | 2020-11-17 | 北京兆易创新科技股份有限公司 | Bad block management method and device and storage equipment |
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| CN110993014B (en) * | 2019-11-20 | 2021-07-13 | 深圳忆联信息系统有限公司 | Behavior test method and device of SSD in idle state, computer equipment and storage medium |
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Address after: Fuhuang New Vision Building, No. 77 Wutaishan Road, Baohe Economic Development Zone, Hefei City, Anhui Province, 230051 Patentee after: Hefei Zhongke Junda Vision Technology Co.,Ltd. Address before: 230088 Room 107, Building 3, Tiandao 10 Software Park, Hefei High-tech Zone, Anhui Province Patentee before: HEFEI FUHUANG JUNDA HIGH-TECH INFORMATION TECHNOLOGY Co.,Ltd. |