CN109582624A - A kind of configurable multichannel IO direct linkage type microprocessor system - Google Patents

A kind of configurable multichannel IO direct linkage type microprocessor system Download PDF

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Publication number
CN109582624A
CN109582624A CN201811396264.8A CN201811396264A CN109582624A CN 109582624 A CN109582624 A CN 109582624A CN 201811396264 A CN201811396264 A CN 201811396264A CN 109582624 A CN109582624 A CN 109582624A
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China
Prior art keywords
bus
micro
microprocessor system
linkage type
direct linkage
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CN201811396264.8A
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Chinese (zh)
Inventor
牛英山
唐虹
王爽
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CETC 4 Research Institute
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CETC 4 Research Institute
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Priority to CN201811396264.8A priority Critical patent/CN109582624A/en
Publication of CN109582624A publication Critical patent/CN109582624A/en
Pending legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4063Device-to-bus coupling
    • G06F13/4068Electrical coupling
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Microcomputers (AREA)

Abstract

The present invention relates to a kind of configurable multichannel IO direct linkage type microprocessor system, including micro-processor kernel, memory module, voltage transformation module, micro-processor kernel connects external device by AXI bus, ahb bus, APB bus.The system proposes that user directly can carry out multi-class, multiple groups bus to micro-processor kernel and connect, and microprocessor peripheral hardware is directly connected with micro-processor kernel by different bus interface.The system can realize that micro-processor kernel is not influenced the control of microprocessor peripheral hardware, read-write by other modules.

Description

A kind of configurable multichannel IO direct linkage type microprocessor system
Technical field
The invention belongs to configurable microprocessor technical field, specifically a kind of configurable multichannel IO direct linkage type is micro- Processor system.
Background technique
The central processing unit that microprocessor is made of a piece of or several large scale integrated circuit.These circuits execute The function of control unit and arithmetic and logical unit (ALU).Microprocessor can complete instruction fetch, execute instruction, and with extraneous memory The operation such as information is exchanged with logical block, is the operation control part of microcontroller.
In traditional microprocessor system designs, microprocessor can only account for the pocket in chip.Other parts are then Generate for memory, clock and distribute logic, system bus and peripheral hardware etc..It, will be micro- in traditional microprocessor system designs Bus architecture, Peripheral Interface and the function of processor are constrained, bus types that a microcontroller possesses and quantity compared with It is few, and micro-processor kernel can only provide AXI bus or ahb bus, after AXI bus or ahb bus are converted by bus bridge Microprocessor peripheral hardware is controlled, therefore causes bus peripheral hardware is not abundant enough not to be able to satisfy all application scenarios.Simultaneously as Conventional microprocessor system bus architecture, when a bus path is occupied in bus architecture, other bus paths can not It uses.
Summary of the invention
It is an object of the present invention to provide a kind of configurable, multichannels, IO direct linkage type microprocessor system, can be by directly right Micro-processor kernel carries out multi-class, the direct-connected interconnection of multiple groups bus, forms bus matrix network, all bus interface are directly connected It is connected to outside microprocessor system.The microprocessor system can be directly direct-connected with the progress of the peripheral hardware of each type, does not need to pass through The conversion of bus bridge, to overcome the defect of above-mentioned conventional microcontroller system.
Present invention technical solution used for the above purpose is: a kind of configurable micro- place of multichannel IO direct linkage type Device system, including micro-processor kernel, memory module, voltage transformation module are managed, micro-processor kernel passes through AXI bus, AHB Bus, APB bus connect external device, and micro-processor kernel is enabled to respond the request or output control of multiple external devices simultaneously System instruction.
The voltage transformation module is used to carry out voltage conversion to the voltage of input, is powered for micro-processor kernel.
The memory module uses Flash or RAM, for code and configurator needed for storage system starting.
The AXI bus, ahb bus, APB bus interface be it is expansible.
The AXI bus, ahb bus, APB bus quantity X, Y, Z be not fixed.
The external device is AXI external device, AHB external device, APB external device, and passes through universal input/defeated Exit port GPIO is connected to input/output (i/o) buffer PAD.
The invention has the following beneficial effects and advantage:
1. all peripheral hardwares can be directly connected with kernel by corresponding bus interface;
2. the operation of checkbus is not influenced by other peripheral hardwares in;
3. scalability enhances, the type and number of peripheral hardware can change according to different application scenarios, answer according to different With adding different peripheral hardwares to respective bus.
4. improving bus efficiency, micro-processor kernel does not influence micro-processor kernel to it to the Read-write Catrol of peripheral module The control of his peripheral hardware.
Detailed description of the invention
Fig. 1 is configurable multichannel IO direct linkage type microprocessor system structural schematic diagram of the invention;
Fig. 2 is specific embodiment schematic diagram;
Wherein, 1: micro-processor kernel, 2: memory, 3: voltage conversion, 4:X group AXI bus, 5:Y group ahb bus, 6:Z Group APB bus.
Specific embodiment
The present invention is described in further detail with reference to the accompanying drawings and embodiments.
As shown in Figure 1, the present invention provides a kind of configurable multichannel IO direct linkage type microprocessor system, which is suitble to Various types of microprocessors, design method are directly to be attached micro-processor kernel with the different classes of bus of multiple groups, Peripheral hardware is connected by direct-connected bus port with processor cores.
The peripheral hardware being connected in advance with micro-processor kernel is directly corresponding with microprocessor by peripheral port by bus port Bus port be connected, can realize that more peripheral hardwares, multichannel are directly connect with microprocessor by the method for the invention.
In the present invention, there are micro-processor kernel, memory, voltage conversion in the part that designed microprocessor system includes Module, X group AXI bus, Y group ahb bus, (wherein, X, Y, Z are the integer more than or equal to 0 to Z group APB bus, can be according to tool Body requires to do corresponding adjustment), but it is not limited to above section, and the type of bus and quantity do not fix, it can be according to peripheral hardware It is required that doing the adjustment of corresponding number, have reached maximized direct-connected.
There are many total class of the peripheral hardware for the microprocessor system that the present invention designs, and a kind of peripheral hardware knot is devised in specific embodiment Structure, but method designed by the present invention is not limited to such structure.
As shown in Fig. 2, peripheral hardware includes: micro-processor kernel, memory, voltage transformation module, X group in specific embodiment AXI bus, Y group ahb bus, Z group APB bus, general I/O port GPIO, input/output (i/o) buffer PAD, m group AXI are total Line peripheral hardware, n group ahb bus peripheral hardware, q group APB bus peripheral hardware (wherein, m, n, q are the integer more than or equal to 0).Microprocessor Kernel uses ARM Cortex-M3, and ARM Cortex-M3 kernel connects peripheral hardware device by AXI bus, ahb bus, APB bus Part, external device are connected to input/output (i/o) buffer PAD by general I/O port GPIO.Voltage transformation module LDO will External 3.3V voltage is converted to power supply of the 1.8V and 3.3V for ARM Cortex-M3 kernel and PAD.Memory uses Flash and SRAM, micro process can be started by flash storage or SRAM.
By corresponding bus interface, the micro-processor kernel into piece is sent always the different types of bus peripheral hardware of microprocessor Line request, after bus request is identified, kernel issues address and controls information to indicate the type of transmission and should respond External device.
Traditional microprocessor system requires there was only 1 module drive bus at any time, i.e., outer by one when bus If other peripheral hardwares can not occupy bus after occupying.Example: when APB bus peripheral hardware 1 and ahb bus peripheral hardware 1 generate data interaction, Micro-processor kernel cannot operate peripheral hardware, however, method designed by the present invention can make APB bus peripheral hardware 1 and AHB When 1 data of bus peripheral hardware are handled, control of the micro-processor kernel to peripheral hardware is not influenced.User can be according to different outer simultaneously If type, directly peripheral hardware is connected with corresponding bus port, improves microprocessor work efficiency.

Claims (6)

1. a kind of configurable multichannel IO direct linkage type microprocessor system, including micro-processor kernel, memory module, voltage Conversion module, it is characterised in that: micro-processor kernel connects external device by AXI bus, ahb bus, APB bus, so that Micro-processor kernel can respond the request or output control instruction of multiple external devices simultaneously.
2. a kind of configurable multichannel IO direct linkage type microprocessor system according to claim 1, it is characterised in that: institute Voltage transformation module is stated for carrying out voltage conversion to the voltage of input, is powered for micro-processor kernel.
3. a kind of configurable multichannel IO direct linkage type microprocessor system according to claim 1, it is characterised in that: institute Memory module is stated using Flash or RAM, for code and configurator needed for storage system starting.
4. a kind of configurable multichannel IO direct linkage type microprocessor system according to claim 1, it is characterised in that: institute State AXI bus, ahb bus, APB bus interface be it is expansible.
5. a kind of configurable multichannel IO direct linkage type microprocessor system according to claim 1, it is characterised in that: institute State AXI bus, ahb bus, APB bus quantity X, Y, Z be not fixed.
6. a kind of configurable multichannel IO direct linkage type microprocessor system according to claim 1, it is characterised in that: institute Stating external device is AXI external device, AHB external device, APB external device, and passes through general input/output port GPIO It is connected to input/output (i/o) buffer PAD.
CN201811396264.8A 2018-11-22 2018-11-22 A kind of configurable multichannel IO direct linkage type microprocessor system Pending CN109582624A (en)

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CN201811396264.8A CN109582624A (en) 2018-11-22 2018-11-22 A kind of configurable multichannel IO direct linkage type microprocessor system

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112612746A (en) * 2020-12-18 2021-04-06 中国电子科技集团公司第四十七研究所 Reconfigurable microprocessor system based on memory interconnection

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Publication number Priority date Publication date Assignee Title
US5805843A (en) * 1996-02-01 1998-09-08 Qualcomm Incorporated Microprocessor bus interface unit for interfacing an N-bit microprocessor bus to an M-bit memory device
CN104061931A (en) * 2014-05-21 2014-09-24 中国民航大学 FPGA-based miniature portable multi-sensor attitude detection system
CN105677609A (en) * 2016-01-04 2016-06-15 上海华力创通半导体有限公司 Bus structure of SoC system
CN105791770A (en) * 2016-03-14 2016-07-20 路亮 ARM9-based embedded video acquisition system

Patent Citations (4)

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Publication number Priority date Publication date Assignee Title
US5805843A (en) * 1996-02-01 1998-09-08 Qualcomm Incorporated Microprocessor bus interface unit for interfacing an N-bit microprocessor bus to an M-bit memory device
CN104061931A (en) * 2014-05-21 2014-09-24 中国民航大学 FPGA-based miniature portable multi-sensor attitude detection system
CN105677609A (en) * 2016-01-04 2016-06-15 上海华力创通半导体有限公司 Bus structure of SoC system
CN105791770A (en) * 2016-03-14 2016-07-20 路亮 ARM9-based embedded video acquisition system

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Title
吕为工等: "《嵌入式计算机系统设计》", 31 March 2017 *
李剑: ""优化的ARM总线AXI-AHB-APB架构"", 《电子科学技术》 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112612746A (en) * 2020-12-18 2021-04-06 中国电子科技集团公司第四十七研究所 Reconfigurable microprocessor system based on memory interconnection

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Application publication date: 20190405