CN109542517A - A kind of pipeline dynamic configuration system and method for load based on instruction - Google Patents
A kind of pipeline dynamic configuration system and method for load based on instruction Download PDFInfo
- Publication number
- CN109542517A CN109542517A CN201811432113.3A CN201811432113A CN109542517A CN 109542517 A CN109542517 A CN 109542517A CN 201811432113 A CN201811432113 A CN 201811432113A CN 109542517 A CN109542517 A CN 109542517A
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- signal
- instruction
- pipeline
- assembly line
- icount
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- 238000000034 method Methods 0.000 title claims abstract description 10
- 230000008520 organization Effects 0.000 claims abstract description 14
- 238000010276 construction Methods 0.000 claims abstract description 8
- 238000004519 manufacturing process Methods 0.000 claims description 7
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 7
- 230000005540 biological transmission Effects 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 6
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3867—Concurrent instruction execution, e.g. pipeline, look ahead using instruction pipelines
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
The present invention relates to a kind of pipeline dynamics of load based on instruction to configure system and method, and system includes: instruction load counter input connection processor, output end connection streamline series switch；Pipeline series switch, connection streamline construction module；Pipeline organization module link order memory；Processor link order memory, connection streamline construction module；Method includes: that instruction load counter takes out IA and control signal from processor, it is counted and exports ICount signal, it is sent to pipeline series switch, judge corresponding assembly line rank, and corresponding pipelined switch signal PSwitch is exported to pipeline organization module, pipeline organization module carries out switch control to assembly line.The present invention is counted by the address to fetched instruction, control signal, the rank of decision instruction load, and when instructing load high, mostly unlatching assembly line opens assembly line when instructing load low less, reduces the unnecessary power consumption of processor.
Description
Technical field
The present invention relates to instruction pipeline field, specifically a kind of pipeline dynamic of load based on instruction configures system
System and method.
Background technique
In high performance microprocessor system, as instruction fetch is more and more frequent in application, more flowing water number of lines
Higher and higher instruction throughput can be brought, but the increase of flowing water number of lines also brings increasing considerably for chip temperature.
Excessively high temperature brings fatal threat to the stability of system.If this threat occurs in military affairs, economy etc. concerning the people
Raw field will be catastrophic.If for higher application demand, and the unconfined item number for increasing assembly line, it can band
Come excessively high temperature and higher power consumption.Therefore, the emphasis problem that power consumption is future processor design how is reduced.
Currently, the contradiction of the high instruction throughput and low-power consumption of balance, mainly takes the structure of fixed strip number assembly line, not
There is the basic contradiction solved between the two.
Summary of the invention
In view of the deficiencies of the prior art, the pipeline dynamic that the present invention provides a kind of load based on instruction configures system and side
Method solves the problem of that there are contradictions to balance between high instruction throughput and low-power consumption.
Present invention technical solution used for the above purpose is:
A kind of pipeline dynamic configuration system of load based on instruction, comprising:
Load counter, including input terminal and output end are instructed, the input terminal connects processor, takes out from processor
IA and control signal, and ICount signal, the output end are counted and exported to IA and control signal
ICount signal is sent pipeline series switch by connection streamline series switch；
Pipeline series switch, connection streamline construction module, according to instruction load counter send ICount signal,
Judge corresponding assembly line rank, and exports corresponding pipelined switch signal PSwitch to pipeline organization module；
Pipeline organization module, link order memory are transferred instruction from command memory, and are executed；Receive flowing water
Wiretap signal PSwitch, and assembly line is switched according to pipelined switch signal PSwitch；
Processor, link order memory send IA to command memory；Connection streamline construction module, to
Pipeline organization sends IA and control signal.
Further, instruction load counter includes:
Location counter, acquisition instructions address export count value according to the clock cycle, as ICount signal out；
Timer exports clock signal to location counter.
Further, pipelined switch signal PSwitch includes several positions, each is corresponded with a level production line.
A kind of pipeline dynamic configuration method of the pipeline dynamic configuration system of load based on instruction, comprising:
Instruction load counter takes out IA and control signal from processor, and to IA and control signal
ICount signal is counted and exported, pipeline series switch is sent by ICount signal, according to instruction load counter
The ICount signal of transmission judges corresponding assembly line rank, and exports corresponding pipelined switch signal PSwitch to flowing water
Cable architecture module；Pipeline organization module receives assembly line switching signal PSwitch, and according to the pipelined switch signal
PSwitch carries out switch control to assembly line.
Further, the ICount signal sent according to instruction load counter, judges that corresponding assembly line rank includes:
Assembly line rank is set, and is each rank distribution counting value, forms the corresponding relationship of count value and rank, the meter
Numberical range is 0~100；
The count value and corresponding relationship of the ICount signal sent according to instruction load counter export current count value pair
The assembly line rank answered.
The invention has the following beneficial effects and advantage:
1. the present invention is counted by the address to fetched instruction, control signal, the upper-lower hierarchy of decision instruction load,
When instructing load high, mostly unlatching assembly line opens assembly line when instructing load low less.
2. the present invention can close specified assembly line from physical layer, to reduce the unnecessary expense of processor, drop
Low-power consumption.
Detailed description of the invention
Fig. 1 is system construction drawing of the invention；
Fig. 2 is instruction load counter modular structure block diagram of the invention；
Fig. 3 is 3 level production line status diagrams of the invention；
Fig. 4 is 5 level production line status diagrams of the invention.
Specific embodiment
In order to make the foregoing objectives, features and advantages of the present invention clearer and more comprehensible, with reference to the accompanying drawing to the present invention
Specific embodiment be described in detail.Many details are explained in the following description in order to fully understand this hair
It is bright.But the present invention can be implemented in many other ways than those described herein, and those skilled in the art can not disobey
Similar improvement is done in the case where back invention intension, therefore the present invention is not limited to the specific embodiments disclosed below.
Unless otherwise defined, all technical and scientific terms used herein and belong to technical field of the invention
The normally understood meaning of technical staff is identical.It is specific that description is intended merely in the term used in the description of invention herein
Embodiment purpose, it is not intended that in limitation the present invention.
It is as shown in Figure 1 system construction drawing of the invention.
The pipeline dynamic of load configures system, including instruction load counter module based on instruction, to fetched instruction
Address, control signal are counted, and the frequency of current instruction fetch is calculated；Pipeline series switch module, according to instruction load
The count results viewing pipeline selection signal of counter module is to pipeline organization, pipeline organization module, according to assembly line
Selection signal opens and closes corresponding assembly line.
Instruction load counter module counts the address of fetched instruction, control signal, and count results are passed through
ICount signal is given to pipeline series switch module.
The ICount that pipeline series switch module is exported according to instruction load counter module, judgement will open several streams
Pipelined switch signal PSwitch is passed out to pipeline organization by waterline.
Pipeline organization module includes 1~N assembly line, the PSwitch signal control that pipeline series switch module generates
Make the on or off of every assembly line.
It is illustrated in figure 2 instruction load counter modular structure block diagram of the invention.
Location counter, acquisition instructions address export count value according to the clock cycle, as ICount signal out；Periodically
Device exports clock signal to location counter.
Embodiment:
With reference to the accompanying drawing, with a specific example, the present invention is described in further detail.
In the example, pipeline series are 3~5 grades；The value of ICount is 0~100, is indicated within 100 clock cycle,
The number of instruction fetch；PSwitch is 5, each corresponds to a level production line.The relationship of ICount and PSwitch such as 1 institute of table
Show.
Instruction fetch number and pipeline series relationship in 1 unit time of table
It is illustrated in figure 33 level production line status diagrams of the invention.
The address of instruction controls in signal instruction counter, while timer starts timing, when 100 clock weeks of timing
When the phase, the current count value of location counter is ICount.ICount signal is sent to pipeline series switch module, according to table
Instruction fetch number and pipeline series relationship in unit time in 1, if the value of ICount is between 41~60, flowing water at this time
Line opens 3 grades.
It is illustrated in figure 45 level production line status diagrams of the invention.
If the value of ICount is between 81~100, assembly line opens 5 grades at this time.To realize based on instruction
The case where load, automatically configures pipeline series, the i.e. dynamic setting of assembly line.
According to the value of PSwitch signal, assembly line is opened or closed, the corresponding relationship of PSwitch and pipeline state is such as
Shown in table 2.
The corresponding relationship of table 2 PSwitch and pipeline state
When a certain position of PSwitch is 1, corresponding pipeline stages are opened；It is corresponding when a certain position of PSwitch is 0
Pipeline stages close.
Claims (6)
1. a kind of pipeline dynamic of load based on instruction configures system characterized by comprising
Load counter, including input terminal and output end are instructed, the input terminal connects processor, and instruction is taken out from processor
Address and control signal, and ICount signal, the output end connection are counted and exported to IA and control signal
ICount signal is sent pipeline series switch by pipeline series switch；
Pipeline series switch, connection streamline construction module, according to the ICount signal that instruction load counter is sent, judgement
Corresponding assembly line rank, and corresponding pipelined switch signal PSwitch is exported to pipeline organization module；
Pipeline organization module, link order memory are transferred instruction from command memory, and are executed；Assembly line is received to open
OFF signal PSwitch, and assembly line is switched according to pipelined switch signal PSwitch；
Processor, link order memory send IA to command memory；Connection streamline construction module, Xiang Liushui
Cable architecture sends IA and control signal.
2. the pipeline dynamic of load based on instruction according to claim 1 configures system, it is characterised in that: described instruction
Load counter includes:
Location counter, acquisition instructions address export count value according to the clock cycle, as ICount signal out；
Timer exports clock signal to location counter.
3. the pipeline dynamic of load based on instruction according to claim 1 configures system, it is characterised in that: the basis
The ICount signal for instructing load counter to send, judges that corresponding assembly line rank includes:
Assembly line rank is set, and is each rank distribution counting value, forms the corresponding relationship of count value and rank, the count value
Range is 0~100；
Count value according to the ICount signal of instruction load counter transmission is corresponding with corresponding relationship output current count value
Assembly line rank.
4. the pipeline dynamic of load based on instruction according to claim 1 configures system, it is characterised in that: the flowing water
Wiretap signal PSwitch includes several positions, each is corresponded with a level production line.
5. the pipeline dynamic configuration method of any one system according to claim 1~4, it is characterised in that: include:
Instruction load counter takes out IA and control signal from processor, and carries out to IA and control signal
ICount signal is counted and exported, pipeline series switch is sent by ICount signal, is sent according to instruction load counter
ICount signal, judge corresponding assembly line rank, and export corresponding pipelined switch signal PSwitch to flowing water knot
Structure module；Pipeline organization module receives assembly line switching signal PSwitch, and according to pipelined switch signal PSwitch
Switch control is carried out to assembly line.
6. pipeline dynamic configuration method according to claim 5, it is characterised in that: described according to instruction load counter
The ICount signal of transmission judges that corresponding assembly line rank includes:
Assembly line rank is set, and is each rank distribution counting value, forms the corresponding relationship of count value and rank, the count value
Range is 0~100；
Count value according to the ICount signal of instruction load counter transmission is corresponding with corresponding relationship output current count value
Assembly line rank.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811432113.3A CN109542517B (en) | 2018-11-28 | 2018-11-28 | Pipeline dynamic configuration system and method based on instruction load |
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| CN201811432113.3A CN109542517B (en) | 2018-11-28 | 2018-11-28 | Pipeline dynamic configuration system and method based on instruction load |
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| Publication Number | Publication Date |
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| CN109542517A true CN109542517A (en) | 2019-03-29 |
| CN109542517B CN109542517B (en) | 2023-07-18 |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5704054A (en) * | 1995-05-09 | 1997-12-30 | Yale University | Counterflow pipeline processor architecture for semi-custom application specific IC's |
| US20090164812A1 (en) * | 2007-12-19 | 2009-06-25 | Capps Jr Louis B | Dynamic processor reconfiguration for low power without reducing performance based on workload execution characteristics |
| CN102033737A (en) * | 2010-06-13 | 2011-04-27 | 苏州和迈微电子技术有限公司 | Embedded system oriented multi-stage flowing water digital signal processor system structure |
-
2018
- 2018-11-28 CN CN201811432113.3A patent/CN109542517B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5704054A (en) * | 1995-05-09 | 1997-12-30 | Yale University | Counterflow pipeline processor architecture for semi-custom application specific IC's |
| US20090164812A1 (en) * | 2007-12-19 | 2009-06-25 | Capps Jr Louis B | Dynamic processor reconfiguration for low power without reducing performance based on workload execution characteristics |
| CN102033737A (en) * | 2010-06-13 | 2011-04-27 | 苏州和迈微电子技术有限公司 | Embedded system oriented multi-stage flowing water digital signal processor system structure |
Non-Patent Citations (1)
| Title |
|---|
| 陈智勇: "基于FPGA的流水线微处理器设计", 《微计算机信息》 * |
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