CN109525531B - Demodulation module, demodulation circuit and high-frequency card reader - Google Patents
Demodulation module, demodulation circuit and high-frequency card reader Download PDFInfo
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Abstract
The invention discloses a demodulation module, a demodulation circuit and a high frequencyThe demodulation module comprises an I path signal input end, a Q path signal input end, a demodulation result output end, a standard waveform generation circuit, an I path correlator group, a Q path correlator group and a digital demodulation circuit; the correlation intervals of the I path of correlator group and the Q path of correlator group are n x T; the I path correlator group and the Q path correlator group respectively comprise 2nEach correlator is used for performing cross-correlation calculation on two signals input by the signal input end and the standard waveform input end and outputting a calculation result to a correlation result output end; standard waveform generating circuit for generating 2nA standard waveform; the digital demodulation circuit is used for identifying the correlation result output end which is larger than a preset threshold value in all the values input by the correlation result output end as a target output end and outputting the standard waveform corresponding to the target output end to the demodulation result output end; the invention improves the signal-to-noise ratio range of the demodulated signal of the card reader.
Description
Technical Field
The invention relates to the technical field of high-frequency card readers, in particular to a demodulation module and a demodulation circuit for an ISO 14443A card and a high-frequency card reader.
Background
Contactless cards, which are currently widely used in the fields of payment, door entry, etc., have several international standards such as ISO14443 in a high frequency band of 13.56MHz (megahertz). The high-frequency card reader is a device for exchanging data with a contactless card, and comprises a demodulation circuit inside, wherein the demodulation circuit is used for demodulating a modulation signal sent by the card so as to restore original data.
Generally, the waveform of a modulation signal received by a high-frequency card reader varies according to different working environments, and factors such as the distance of a receiving distance, interference on a channel and the like all affect the signal-to-noise ratio of the modulation signal. Currently, for ISO 14443A cards, a commonly used demodulation circuit generally includes an IQ (in-phase quadrature) signal generation circuit and a demodulation module, and specifically, an IQ signal generation circuit generates a received modulation signal into two paths, I and Q, signals, and then a demodulation module demodulates the I and Q signals to determine whether the received modulation signal of each bit (bit) period represents '0' or '1'.
The IQ signal generation circuit is specifically configured to sample, filter, amplify, and quantize the received modulated signal to obtain an output discrete digital sequence, which ideally includes two sequences, sequence D (sequence D) and sequence E (sequence E) in ISO/IEC FDIS 1444302 (standard document of ISO 14443A card), where sequence D indicates that the received data of the 1 bit period is logic '1' and sequence E indicates that the received data of the 1 bit period is logic '0'. As shown in fig. 1 and fig. 2, the first half bit period of sequence D is a subcarrier modulated waveform, which is referred to as Symbol a, the second half bit period of sequence D is not modulated, which is referred to as Symbol B, and the first half bit period of sequence E is Symbol B and the second half bit period is Symbol a. That is, when the received modulated signal receives 1 a + B waveform in 1 bit period, the demodulated result is '1', and when the received modulated signal receives 1B + a waveform, the demodulated result is '0'.
Because the input signal is often damaged too much in the transmission process, the effective signal in the modulated signal received by the high-frequency card reader is weaker, and the demodulation capability of the existing demodulation module for the low signal-to-noise ratio signal is weaker, in the face of such a situation, Symbol a is easily identified as Symbol B in error, so that the demodulation result is in error.
Disclosure of Invention
The invention aims to overcome the defects that the demodulation capability of a demodulation module in a high-frequency card reader to a modulation signal with a low signal-to-noise ratio is weaker, and particularly the demodulation is easy to make mistakes when an effective signal received by the high-frequency card reader is weaker due to overlarge loss in the transmission process of an input signal in the prior art, and provides the demodulation module, the demodulation circuit and the high-frequency card reader for the ISO 14443A type card, which can effectively improve the demodulation capability of the high-frequency card reader to the signal with the low signal-to-noise ratio.
The invention solves the technical problems through the following technical scheme:
the invention provides a demodulation module which is characterized by comprising an I path signal input end, a Q path signal input end, a demodulation result output end, a standard waveform generation circuit, an I path correlator group, a Q path correlator group and a digital demodulation circuit;
the I-path signal input end is used for being electrically connected with an I-path signal output end of an external IQ signal generation circuit, the Q-path signal input end is used for being electrically connected with a Q-path signal output end of the IQ signal generation circuit, the IQ signal generation circuit is used for generating an I-path signal sequence and a Q-path signal sequence from a modulation signal sent by an ISO 14443A card, and the bit periods of the I-path signal sequence and the Q-path signal sequence are set to be T;
the correlation intervals of the I path of correlator group and the Q path of correlator group are n x T, and n is a natural number greater than 1;
the I path correlator group and the Q path correlator group respectively comprise 2nEach correlator comprises a signal input end, a standard waveform input end and a correlation result output end, each correlator is used for performing cross-correlation calculation on two signals input by the signal input end and the standard waveform input end and outputting a calculation result to the correlation result output end, and the correlation result output end is output to the digital demodulation circuit;
the standard waveform generation circuit is used for generating 2nA standard waveform having a time width of n x T, 2nThe standard waveforms respectively correspond to ideal waveforms of all conditions of n bit periods of the I-path signal sequence or the Q-path signal sequence one by one;
the digital demodulation circuit is used for identifying the correlation result output end which is greater than a preset threshold value in all the values input by the correlation result output end as a target output end, and the digital demodulation circuit is also used for outputting the standard waveform connected with the correlator corresponding to the target output end to the demodulation result output end;
all signal input ends of the I-path correlator group are electrically connected with the I-path signal input end, and all signal input ends of the Q-path correlator group are electrically connected with the Q-path signal input end;
2 is describednA standard waveform and the station of the I-way correlator groupThe standard waveform input ends are electrically connected in a one-to-one correspondence manner; 2 is describednAnd the standard waveforms are electrically connected with all the standard waveform input ends of the Q-way correlator group in a one-to-one correspondence mode.
In the scheme, the larger the absolute value obtained by the correlator through cross-correlation calculation is, the higher the similarity degree of two signals input by a signal input end and a standard waveform input end of the correlator is. For 2 in the I way correlator setnA correlator, each correlator having a standard waveform input connected to a standard waveform, 2nThe correlators are connected in one-to-one mode 2nDifferent standard waveforms. The scheme aims at 2 of I-path signal sequence input by I-path signal input endnThe cross-correlation calculation can be carried out on all possible waveform conditions, and similarly, the Q-path correlator group also can be used for generating 2 x 2 aiming at the modulation signal of one n-bit periodnThe calculation results are output to the digital demodulation circuit in a unified way, and the digital demodulation circuit judges and identifies to determine 2 x 2nAnd if the calculation result output by any correlator in the correlators exceeds a preset threshold, the data represented by the received modulation signal is the same as the standard waveform corresponding to the correlator, so that the modulation of the modulation signal is realized.
In the scheme, based on the principle that the autocorrelation result of the effective waveform is in direct proportion to the length of the relevant interval and the correlation result of the noise is irrelevant to the length of the relevant interval, the length of the relevant interval is reasonably expanded according to the signal-to-noise ratio of the modulation signal, so that the cross-correlation calculation result of the effective signal in the modulation signal is enhanced, and the demodulation capability of the demodulation module on the modulation signal with low signal-to-noise ratio is finally enhanced.
In the scheme, the correlation intervals of the I path correlator group and the Q path correlator group are both more than or equal to 2 bit periods, through the setting of the correlation intervals, the correlation result of the Symbol A signal is continuously increased along with the elongation of the correlation intervals, namely, the situation that demodulation fails because the calculation result of the cross-correlation calculation in the original 1 bit period is smaller than a preset threshold value is faced, in the scheme, the cross-correlation calculation of two signals is continuously carried out in the 2 nd bit period, the calculation results are continuously accumulated, the correlation results of noise in a modulation signal are not continuously accumulated, the calculation results are accumulated until the cross-correlation calculation of the whole correlation interval, namely n bit periods is completed, and further the final calculation result exceeds the preset threshold value, so that the modulation signal which fails to demodulate due to weak effective signals passes through a demodulation module provided by the scheme is realized, and the calculation result of the cross-correlation calculation can be effectively enhanced to be, and finally, the signal-to-noise ratio range of the signal which can be demodulated by the card reader is improved.
Preferably, when the two signals are subjected to the cross-correlation calculation, more than or equal to 16 sampling points are adopted per bit period for the cross-correlation calculation.
Preferably, n is 2.
In the scheme, n is 2, that is, the correlation interval is 2 bit periods, at this time, the standard waveform generation circuit generates 4 standard waveforms, the I-path correlator group and the Q-path correlator group respectively include 4 correlators, and the digital demodulation circuit receives 8 calculation results to perform identification and judgment.
Preferably, the standard waveform generating circuit is configured to generate 4 standard waveforms, the time width of each standard waveform is 2 bit periods, the 4 standard waveforms are respectively logic '00', logic '01', logic '10' and logic '11', and the standard waveforms are formed by combining a sequence D and/or a sequence E.
According to the scheme, according to the standard document of ISO/IEC FDIS 1444302, the standard waveform corresponding to logic '00' is formed by connecting a sequence E with another sequence E, the standard waveform corresponding to logic '01' is formed by connecting a sequence E with another sequence E, the standard waveform corresponding to logic '10' is formed by connecting a sequence D with another sequence E, and the standard waveform corresponding to logic '11' is formed by connecting a sequence D with another sequence D.
In the scheme, 4 standard waveforms are respectively input to the standard waveform input ends of 8 correlators, the 8 correlators respectively perform cross-correlation calculation on the signal accessed from the signal input end of the correlators and the accessed standard waveforms to finally obtain 8 calculation results, the digital demodulation circuit judges which one of the 8 calculation results exceeds a preset threshold value, the standard waveform accessed by the exceeding correlator is the signal most similar to the modulation signal, and the standard waveform is the demodulated waveform.
Preferably, the digital demodulation circuit identifies once every 2 bit periods to obtain the target output.
In the scheme, the digital demodulation circuit adopts the synchronous clock to sample and judge the received calculation result, the sampling period is consistent with the length of the relevant interval, the sampling point is aligned with the bit period of the modulation signal, and the arrangement of the sampling point ensures that the digital demodulation circuit can sample the calculation result of the whole relevant period of the cross-correlation calculation.
Preferably, n is 3, the standard waveform generating circuit is configured to generate 8 standard waveforms, the time width of the standard waveform is 3 bit periods, and the 8 standard waveforms are respectively logic '000', logic '001', logic '010', logic '011', logic '100', logic '101', logic '110' and logic '111', and the standard waveforms are formed by combining sequences D and/or sequences E.
In the scheme, n is 3, that is, the correlation interval is 3 bit periods, at this time, the standard waveform generation circuit generates 8 standard waveforms, the I-path correlator group and the Q-path correlator group respectively include 8 correlators, and the digital demodulation circuit receives 16 calculation results to perform identification and judgment.
Preferably, the digital demodulation circuit identifies once every 3 bit periods to obtain the target output.
Preferably, the cross-correlation calculation adopts the following calculation formula:
R[i]＝|∑N(Rref[j]×Rrcv[j+i]) L, wherein R [ i ]]For the calculation result, N is the number of sampling points in the length of the correlation interval, Rref[j]Values of the signal sequence input for the input of said standard waveform, Rrcv[j+i]I and j are both natural numbers for the value of the signal sequence input at the signal input terminal.
The invention also provides a demodulation circuit which is characterized by comprising an IQ signal generation circuit and the demodulation module, wherein the I path signal input end is electrically connected with the I path signal output end of the IQ signal generation circuit, the Q path signal input end is electrically connected with the Q path signal output end of the IQ signal generation circuit, and the IQ signal generation circuit is used for generating an I path signal sequence and a Q path signal sequence from a modulation signal sent by an ISO 14443A type card.
The invention also provides a high-frequency card reader which is characterized by comprising the demodulation circuit.
The positive progress effects of the invention are as follows: the demodulation module, the demodulation circuit and the high-frequency card reader provided by the invention are used for reasonably expanding the length of a relevant interval according to the signal-to-noise ratio condition of a modulation signal aiming at an ISO 14443A card, so that the cross-correlation calculation result of effective signals in the modulation signal is enhanced, the demodulation capacity of the modulation signal with low signal-to-noise ratio is finally enhanced, and the signal-to-noise ratio range of the demodulated signal of the card reader is improved.
Drawings
Fig. 1 is a waveform diagram of a 1-bit period sequence D.
Fig. 2 is a waveform diagram of a 1-bit period sequence E.
Fig. 3 is a schematic diagram of a demodulation module according to embodiment 1 of the present invention.
FIG. 4 is a schematic diagram of a logic '00' standard waveform.
FIG. 5 is a schematic diagram of a logic '01' standard waveform.
FIG. 6 is a schematic diagram of a logic '10' standard waveform.
FIG. 7 is a schematic diagram of a logic '11' standard waveform.
Fig. 8 is a schematic diagram of a demodulation circuit according to embodiment 2 of the present invention.
FIG. 9 is a diagram illustrating the relationship between the '11' modulation signal and the standard waveform '11' at R [0 ].
FIG. 10 is a diagram illustrating the relationship between the '11' modulation signal and the standard waveform '11' at R [8 ].
FIG. 11 is a diagram illustrating the relationship between the '11' modulation signal and the standard waveform '11' at R9.
FIG. 12 is a diagram illustrating the relationship between the '11' modulation signal and the standard waveform '11' at R [16 ].
FIG. 13 is a diagram illustrating the relationship between the '11' modulation signal and the standard waveform '11' at R [24 ].
FIG. 14 is a diagram illustrating the relationship between the '11' modulation signal and the standard waveform '11' at R [25 ].
FIG. 15 is a diagram illustrating the relationship between the '11' modulation signal and the standard waveform '11' at R [32 ].
FIG. 16 is a diagram illustrating the relationship between the '1111' modulation signal and the standard waveform '11' at R [33 ].
Fig. 17 is a schematic diagram of the correlation result of the '1111' modulated signal after cross-correlation calculation in the correlator I4.
Fig. 18 is a schematic diagram of the correlation result of the '1110' modulated signal after cross-correlation calculation in correlator I4.
Fig. 19 is a schematic diagram of the correlation result of the '1101' modulated signal after cross-correlation calculation in the correlator I4.
Detailed Description
The invention is further illustrated by the following examples, which are not intended to limit the scope of the invention.
Example 1
As shown in fig. 3, a demodulation module includes an I-path signal input terminal 1, a Q-path signal input terminal 2, a demodulation result output terminal 3, a standard waveform generation circuit 4, an I-path correlator group 5, a Q-path correlator group 6, and a digital demodulation circuit 7.
The I-path signal input end 1 is used for being electrically connected with an I-path signal output end of an external IQ signal generation circuit, the Q-path signal input end 2 is used for being electrically connected with a Q-path signal output end of the IQ signal generation circuit, the IQ signal generation circuit is used for generating an I-path signal sequence and a Q-path signal sequence from a modulation signal sent by an ISO 14443A card, and the bit period of the I-path signal sequence and the Q-path signal sequence is set to be T.
The correlation intervals of the I-path correlator group 5 and the Q-path correlator group 6 are both n x T, and n is a natural number greater than 1. In this embodiment, n is 2, and the I-path correlator group 5 and the Q-path correlator group 6 respectively include 2nI.e. 4 correlators, the I-path correlator bank 5 comprises 4 correlators respectively correlator I1, correlator I2, correlator I3 and correlator I4, and the Q-path correlator bank 6 comprises 4 correlators respectively correlator Q1, correlator Q2, correlator Q3 and correlator Q4. Each correlator comprises a signal input end and a standard waveformEach correlator is used for performing cross-correlation calculation on two signals input by the signal input end and the standard waveform input end and outputting a calculation result to a correlation result output end, and the correlation result output end is output to the digital demodulation circuit 7.
In this embodiment, the standard waveform generating circuit 4 includes a '00' standard waveform generating circuit, a '01' standard waveform generating circuit, a '10' standard waveform generating circuit, and a '11' standard waveform generating circuit, and is configured to generate 4 standard waveforms as shown in fig. 4 to 7, each standard waveform having a time width of 2 bit periods, and the 4 standard waveforms respectively correspond to ideal waveforms of all cases of 2 bit periods of the I-path signal sequence or the Q-path signal sequence, that is, correspond to logic '00', logic '01', logic '10', and logic '11', and are formed by combining a sequence D and/or a sequence E.
The digital demodulation circuit 7 is configured to identify a correlation result output end, which is greater than a preset threshold, of all values input by the correlation result output ends as a target output end, and the digital demodulation circuit 7 is further configured to output a standard waveform, which is a result obtained after demodulation of the modulation signal, to the demodulation result output end 3, where the standard waveform is connected to a correlator corresponding to the target output end.
In this embodiment, all signal input ends of the I-path correlator set 5 are electrically connected to the I-path signal input end 1, and all signal input ends of the Q-path correlator set 6 are electrically connected to the Q-path signal input end 2. The 4 standard waveforms are electrically connected with all the standard waveform input ends of the I-path correlator group 5 in a one-to-one correspondence manner; the 4 standard waveforms are also electrically connected to all the standard waveform input terminals of the Q-way correlator set 6 in a one-to-one correspondence. In this embodiment, the logic '00' standard waveform generated by the '00' standard waveform generating circuit is electrically connected to the standard waveform inputs of the correlator I1 and the correlator Q1, respectively, the logic '01' standard waveform generated by the '01' standard waveform generating circuit is electrically connected to the standard waveform inputs of the correlator I2 and the correlator Q2, respectively, the logic '10' standard waveform generated by the '10' standard waveform generating circuit is electrically connected to the standard waveform inputs of the correlator I3 and the correlator Q3, respectively, and the logic '11' standard waveform generated by the '11' standard waveform generating circuit is electrically connected to the standard waveform inputs of the correlator I4 and the correlator Q4, respectively.
The calculation result C of the correlator is equal to C1+C2Depends on two factors, namely, effective signal (symbol A or symbol B) and correlation degree C of symbol A1Second is the degree of correlation C between noise and Symbol A2. If the preset threshold is CthFor Symbol A, C ═ C is required1(A)+C2>CthFor Symbol B, C ═ C is required1(B)+C2<Cth(C1(b)Typically small). If the received effective signal is weak due to excessive loss of the input signal in the transmission process, C is easy to occur1A+C2<CthThis causes Symbol a to be erroneously identified as Symbol B, and demodulation is thus erroneous. Due to C2Has a certain fluctuation range, and therefore cannot be reduced by CthTo solve this problem, otherwise it is likely that the noise is mistaken for Symbol a.
In this embodiment, a demodulation module in the high-frequency card reader is improved, specifically, a correlation interval of the correlator is expanded to a suitable length according to a signal-to-noise ratio of a received modulation signal, and as the correlation interval is lengthened, a correlation result of noise does not change, that is, C is2Remains substantially unchanged and the correlation result of Symbol A signal increases, i.e. C1AIncrease to make C1A+C2<CthSignal enhancement of to C1A’+C2>Cth. Therefore, after the original modulation signal which is failed to be demodulated due to weak effective signal passes through the demodulation module provided in this embodiment 1, the cross-correlation calculation result can be effectively enhanced to be above the preset threshold, and the signal-to-noise ratio range of the signal which can be demodulated by the demodulation module is further improved.
In this embodiment, the correlation interval of the signal is increased to 2 bit periods, so that the possible values of the received modulated signal include 4 cases, namely '00', '01', '10' and '11'. Therefore, the demodulation module needs to generate the 4 standard signal waveforms respectively, perform cross-correlation calculation with the received modulation signals respectively, output the calculation results to the digital demodulation circuit 7 for judgment, and indicate that the data represented by the received modulation signals is the same as the standard waveforms if the calculation results of which path exceed the preset threshold.
Example 2
As shown in fig. 8, the present embodiment provides a demodulation circuit including an IQ signal generation circuit and a demodulation module in embodiment 1, wherein an I-path signal input terminal is electrically connected to an I-path signal output terminal of the IQ signal generation circuit, a Q-path signal input terminal is electrically connected to a Q-path signal output terminal of the IQ signal generation circuit, and the IQ signal generation circuit is configured to generate an I-path signal sequence and a Q-path signal sequence from a modulation signal emitted from an ISO 14443A type card.
Example 3
The present embodiment provides a high-frequency card reader including the demodulation circuit in embodiment 2.
In order to further explain the technical solution and technical effects of the present invention, the following description is continued with respect to the modulation signal demodulation process performed by the high-frequency card reader provided in embodiment 3.
The cross-correlation calculation of each correlator in example 3 adopts the following calculation formula:
R[i]＝|∑N(Rref[j]×Rrcv[j+i]) L, wherein R [ i ]]Representing the calculation result of the cross-correlation calculation, N being the number of sampling points within the length of the correlation interval, Rref[j]Value, R, of a signal sequence input to the standard waveform input of a correlatorrcv[j+i]The values of the signal sequence input to the signal input of the correlator, i.e. the values of the received modulated signal, i and j are natural numbers, in this embodiment N is 32.
Referring to fig. 9, at this time, the card reader just starts to receive the '11' modulation signal, and assuming that 32 points are adopted in the correlation interval of 2 bit periods for correlation calculation, R in the correlation intervalrcvIs the amplitude of the latest received 32 sampling points, the following waveform has not been received, assuming that the amplitude of the received modulation signal is + -1, the calculation result of the correlation calculation can be calculated according to the formula and is represented as R0]Equal to 0. The calculation process is as follows:
|0*1+0*(-1)+0*1+0*(-1)+0*1+0*(-1)+0*1+0*(-1)+0*0+0*0+0*0+0*0+0*0+0*0+0*0+0*0+0*1+0*(-1)+0*1+0*(-1)+0*1+0*(-1)+0*1+0*(-1)+0*0+0*0+0*0+0*0+0*0+0*0+0*0+0*0|＝0。
referring to FIG. 10, the reader has received the first Symbol A waveform of the '11' modulated signal, and the correlation result is represented as R8, which is still 0.
Referring to fig. 11, the card reader continues to receive the '11' modulated signal, and the correlation interval continues to move to the right on the basis of fig. 10, where the correlation calculation result is represented as R [9], and R [9] is 1.
Referring to fig. 12, the reader continues to receive the '11' modulated signal, and the correlation interval continues to move to the right on the basis of fig. 11, at which time a complete sequence D has been received, and the correlation calculation result is denoted as R [16], and R [16] is 8.
Referring to FIG. 13, the reader continues to receive the '11' modulated signal and the correlation interval continues to move to the right on the basis of FIG. 12, where a complete sequence D plus Symbol A has been received, the correlation calculation is denoted as R [24], and the result again becomes 0.
Referring to FIG. 14, the reader continues to receive the '11' modulated signal and the correlation interval continues to move to the right on the basis of FIG. 13, where a complete sequence D plus Symbol A and part S ymbol B have been received, and the correlation result is denoted as R [25], changing directly from 0 to 2 in FIG. 13.
Referring to fig. 15, the reader continues to receive the '11' modulated signal, and the correlation interval continues to move to the right on the basis of fig. 14, at which time two complete sequences D have been received, and the correlation calculation result is denoted as R [32], and R [32] ═ 16.
At this time, the digital demodulation circuit performs recognition once in 2-bit period, and obtains a value of 16 at the output end of the path of correlation result, assuming that the preset threshold is 10, thereby determining that the standard waveform '11' corresponding to the path of correlator is the waveform after the received modulation signal is demodulated.
Referring to fig. 16, the reader continues to receive the second '11' modulated signal on the basis of fig. 15, when the partial waveform has been received in the correlation interval, the correlation calculation result gradually starts to decrease on the basis of fig. 15, and R33 can be calculated to be 14 according to the formula. Although the calculation result at this time also exceeds the preset threshold 10, the digital demodulation circuit does not perform recognition at this time, and therefore, the final demodulation result is not affected. For the modulation signals which are continuously received subsequently, the cross-correlation calculation is performed by analogy, and details are not repeated here.
Referring to fig. 17, this is a schematic diagram of the correlation result of the '1111' modulation signal received by the high frequency card reader provided in embodiment 3 after cross-correlation calculation in the correlator connected to the standard waveform '11'.
Referring to fig. 18, this is a schematic diagram of the correlation result of the '1110' modulated signal received by the high frequency card reader provided in embodiment 3 after cross-correlation calculation in the correlator connected to the standard waveform '11'.
Referring to fig. 19, this is a schematic diagram of the correlation result of the '1101' modulation signal received by the high frequency card reader provided in embodiment 3 after cross-correlation calculation in the correlator connected to the standard waveform '11'.
It should be noted that, in the foregoing embodiment, a 2-bit period correlation interval is taken as an example for description, it is conceivable that, for a demodulation module with a correlation interval of 3-bit period, the implementation basic principle is similar to that of the scheme disclosed in the foregoing embodiment, at this time, 8 standard waveforms need to be generated, including '001', '010', '011' … '111', and 16 correlators are needed altogether, so that the signal-to-noise ratio of the card reader can be further improved, which also belongs to the protection scope of the embodiment of the present invention.
While specific embodiments of the invention have been described above, it will be appreciated by those skilled in the art that this is by way of example only, and that the scope of the invention is defined by the appended claims. Various changes and modifications to these embodiments may be made by those skilled in the art without departing from the spirit and scope of the invention, and these changes and modifications are within the scope of the invention.
Claims (10)
1. A demodulation module is characterized by comprising an I path signal input end, a Q path signal input end, a demodulation result output end, a standard waveform generation circuit, an I path correlator group, a Q path correlator group and a digital demodulation circuit;
the I-path signal input end is used for being electrically connected with an I-path signal output end of an external IQ signal generation circuit, the Q-path signal input end is used for being electrically connected with a Q-path signal output end of the IQ signal generation circuit, the IQ signal generation circuit is used for generating an I-path signal sequence and a Q-path signal sequence from a modulation signal sent by an ISO 14443A card, and the bit periods of the I-path signal sequence and the Q-path signal sequence are set to be T;
the correlation intervals of the I path of correlator group and the Q path of correlator group are n x T, and n is a natural number greater than 1;
the I path correlator group and the Q path correlator group respectively comprise 2nEach correlator comprises a signal input end, a standard waveform input end and a correlation result output end, each correlator is used for performing cross-correlation calculation on two signals input by the signal input end and the standard waveform input end and outputting a calculation result to the correlation result output end, and the correlation result output end is output to the digital demodulation circuit;
the standard waveform generation circuit is used for generating 2nA standard waveform having a time width of n x T, 2nThe standard waveforms respectively correspond to ideal waveforms of all conditions of n bit periods of the I-path signal sequence or the Q-path signal sequence one by one;
the digital demodulation circuit is used for identifying the correlation result output end which is greater than a preset threshold value in all the values input by the correlation result output end as a target output end, and the digital demodulation circuit is also used for outputting the standard waveform connected with the correlator corresponding to the target output end to the demodulation result output end;
all signal input ends of the I-path correlator group are electrically connected with the I-path signal input end, and all signal input ends of the Q-path correlator group are electrically connected with the Q-path signal input end;
2 is describednA standard waveform and all standard waveforms of the I-way correlator groupThe input ends are electrically connected in a one-to-one correspondence manner; 2 is describednAnd the standard waveforms are electrically connected with all the standard waveform input ends of the Q-way correlator group in a one-to-one correspondence mode.
2. The demodulation module of claim 1 wherein said two signals are cross-correlated using greater than or equal to 16 samples per bit period.
3. The demodulation module of claim 2 wherein n is 2.
4. The demodulation module according to claim 3, wherein the standard waveform generation circuit is configured to generate 4 standard waveforms, the time width of the standard waveforms is 2 bit periods, the 4 standard waveforms are respectively logic '00', logic '01', logic '10' and logic '11', and the standard waveforms are combined by sequence D and/or sequence E.
5. The demodulation module of claim 4 wherein said digital demodulation circuit identifies once every 2 bit periods to obtain said target output.
6. The demodulation module according to claim 2, wherein n is 3, the standard waveform generation circuit is configured to generate 8 standard waveforms, the time width of the standard waveforms is 3 bit periods, the 8 standard waveforms are respectively logic '000', logic '001', logic '010', logic '011', logic '100', logic '101', logic '110', and logic '111', and the standard waveforms are combined by sequence D and/or sequence E.
7. The demodulation module of claim 6 wherein said digital demodulation circuit identifies once every 3 bit periods to obtain said target output.
8. The demodulation module according to any of claims 1 to 7, wherein said cross-correlation calculation uses the formula:
R[i]＝|∑N(Rref[j]×Rrcv[j+i]) L, wherein R [ i ]]For the calculation result, N is the number of sampling points in the length of the correlation interval, Rref[j]Values of the signal sequence input for the input of said standard waveform, Rrcv[j+i]I and j are both natural numbers for the value of the signal sequence input at the signal input terminal.
9. A demodulation circuit comprising an IQ signal generation circuit and a demodulation module according to any one of claims 1 to 8, the I signal input being electrically connected to the I signal output of the IQ signal generation circuit and the Q signal input being electrically connected to the Q signal output of the IQ signal generation circuit, the IQ signal generation circuit being configured to generate an I signal sequence and a Q signal sequence from a modulated signal from an ISO 14443A card.
10. A high frequency card reader comprising the demodulation circuit of claim 9.
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| CN105337620A (en) * | 2014-08-13 | 2016-02-17 | 上海华虹集成电路有限责任公司 | Decoding circuit for 106K type A signals sent by decoding card |
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