CN109509757B - Demux structure of liquid crystal display, manufacturing method and liquid crystal display - Google Patents
Demux structure of liquid crystal display, manufacturing method and liquid crystal display Download PDFInfo
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- CN109509757B CN109509757B CN201811442286.3A CN201811442286A CN109509757B CN 109509757 B CN109509757 B CN 109509757B CN 201811442286 A CN201811442286 A CN 201811442286A CN 109509757 B CN109509757 B CN 109509757B
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 25
- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 18
- 229910052751 metal Inorganic materials 0.000 claims description 76
- 239000002184 metal Substances 0.000 claims description 76
- 239000004065 semiconductor Substances 0.000 claims description 35
- 239000000758 substrate Substances 0.000 claims description 28
- 238000000576 coating method Methods 0.000 claims description 7
- 230000005669 field effect Effects 0.000 claims description 7
- 230000010354 integration Effects 0.000 abstract description 7
- 238000010586 diagram Methods 0.000 description 7
- 239000011248 coating agent Substances 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 238000003384 imaging method Methods 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 230000002860 competitive effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
- 238000000844 transformation Methods 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
- 239000011701 zinc Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/13613—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit the semiconductor element being formed on a first substrate and thereafter transferred to the final cell substrate
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Nonlinear Science (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Mathematical Physics (AREA)
- Optics & Photonics (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Liquid Crystal (AREA)
- Thin Film Transistor (AREA)
Abstract
The invention relates to the field of liquid crystal displays and provides a liquid crystal display Demux structure, a manufacturing method and a liquid crystal display. When the channel widths are the same, the device size can be reduced by 75%, so that higher integration level can be achieved, and a narrow frame can be achieved while high resolution is met.
Description
Technical Field
The present invention relates to the field of liquid crystal displays, and more particularly, to a Demux structure of a liquid crystal display and a manufacturing method thereof.
Background
IGZO is an amorphous oxide containing indium, gallium and zinc, the carrier mobility is 20-30 times of that of amorphous silicon, the charge and discharge rate of TFT to pixel electrode can be greatly improved, the response speed of pixel is improved, the panel refresh frequency is faster, and the ultra-high resolution TFT-LCD can be realized. Meanwhile, IGZO is more competitive in terms of cost than Low Temperature Polysilicon (LTPS).
Demux, i.e. a multiplexer (Demux), is used to split a signal into multiple signal channels, which are commonly used to drive a display. Fig. 1 is a schematic diagram of a one-to-three DEMUX circuit in the LCD display technology in the prior art. As shown in fig. 2, which is a schematic structural diagram of a conventional DEMUX, it can be seen from fig. 1 that the channels of the conventional DEMUX are disposed along a horizontal direction. With the increasing demand for display quality, high resolution and narrow frames have become a trend in the future display panel industry. However, the existing Demux channel is arranged along the horizontal direction, so that the lower frame cannot be reduced under the condition of improving the resolution of the display, and a narrow frame display is difficult to realize.
Disclosure of Invention
Therefore, a new Demux structure of a liquid crystal display is needed to solve the technical problem that Demux in the prior art cannot achieve both high resolution and narrow frame of the display.
In order to achieve the above object, the present inventors provide a Demux structure for a liquid crystal display, which includes two or more field effect transistors, wherein the field effect transistors include a substrate, and a first metal layer, a first insulating layer, a semiconductor layer, a second metal layer, a second insulating layer, and a third metal layer sequentially stacked on the substrate from bottom to top, and the semiconductor layer, the second insulating layer, and the third metal layer extend along a thickness direction of the substrate.
Further, the semiconductor layer and the second insulating layer extend from top to bottom to the substrate layer.
Further, the semiconductor layer is an IGZO semiconductor layer.
Further, the first metal layer is a drain electrode, the second metal layer is a source electrode, and the third metal layer is a gate electrode.
Further, the grid electrode is connected with the drain electrode through a via hole.
Further, the semiconductor device further comprises a third insulating layer, and the third insulating layer covers the surface of the third metal layer.
In order to solve the technical problems, the invention also provides another technical scheme:
a liquid crystal display comprises a display area for imaging and a Demux area, wherein the Demux area is arranged around the display area, and the Demux area comprises the Demux structure in any technical scheme.
Further, the display region and the Demux region are located on the same substrate, and a first metal layer, a first insulating layer, a semiconductor layer, a second metal layer, a second insulating layer and a third metal layer are sequentially stacked on the substrate from bottom to top.
In order to solve the technical problems, the invention also provides another technical scheme:
a manufacturing method of a Demux structure of a liquid crystal display comprises the following steps:
sequentially manufacturing a first metal layer and a first insulating layer on a substrate;
stripping the first metal layer and the first insulating layer of a partial area on the substrate;
manufacturing a semiconductor layer, wherein the semiconductor layer extends from the surface of the first insulating layer to the substrate;
manufacturing a second metal layer, wherein the second metal layer is connected with the semiconductor layer;
and sequentially manufacturing a second insulating layer and a third metal layer on the semiconductor layer, wherein the second insulating layer and the third metal layer extend to the substrate layer.
Compared with the prior art, the semiconductor layer, the second insulating layer and the third metal layer in the Demux structure in the technical scheme and the channel formed by the semiconductor layer, the second insulating layer and the third metal layer extend along the thickness direction of the substrate, and when the widths of the channels are the same, the size of the device can be reduced by 75%, so that higher integration level can be achieved, high resolution is met, and meanwhile, a narrow frame can be achieved.
Drawings
FIG. 1 is a schematic diagram of a one-to-three DEMUX circuit in LCD display technology in the background art;
FIG. 2 is a block diagram of a display Demux architecture according to the background art;
FIG. 3 is a block diagram of a display Demux architecture in accordance with an embodiment;
FIG. 4 is a split view of the display Demux architecture layers according to one embodiment;
FIG. 5 is a block diagram of a display area and a Demux area of a display according to an embodiment;
FIG. 6 is a schematic diagram of a display Demux structure according to an embodiment;
reference numerals illustrate:
1. a substrate;
2. a first metal layer;
3. a first insulating layer;
4. a semiconductor layer;
5. a second metal layer;
6. a second insulating layer;
7. a third metal layer;
8. a third insulating layer;
100. a Demux region;
200. a display area;
Detailed Description
In order to describe the technical content, constructional features, achieved objects and effects of the technical solution in detail, the following description is made in connection with the specific embodiments in conjunction with the accompanying drawings.
Referring to fig. 3 to 5, the present embodiment provides a Demux structure of a liquid crystal display.
As shown in fig. 3 and 4, the display Demux is structurally integrated with a plurality of field effect transistors, and the field effect transistors include a substrate 1, and a first metal layer 2, a first insulating layer 3, a semiconductor layer 4, a second metal layer 5, a second insulating layer 6 and a third metal layer 7 sequentially stacked on the substrate from bottom to top. The first metal layer 2, the second metal layer 5 and the third metal layer 7 are respectively three electrodes of the field effect transistor, and the second metal layer 5, the third metal layer 7 and the semiconductor layer 4 form channels. As can be seen from fig. 3, the semiconductor layer 4, the second insulating layer 6 and the third metal layer 7 extend in the thickness direction of the substrate 1 (i.e., the thickness direction of the wafer), so that the channel formed thereby also extends in the thickness direction of the substrate 1, i.e., in the thickness direction of the substrate 1. As can be seen from comparing fig. 3 and fig. 2, in the conventional display Demux structure, the size of the display Demux structure is 3l+x, where X is the channel width and L is the length of the first metal layer 2, the second metal layer 5 or the third metal layer 7; in this embodiment, the display Demux structure can provide a longer channel length than the pixel pitch of the display, and the size of the display Demux structure is 2L-cos θx, where X is the channel width, L is the length of the first metal layer 2, the second metal layer 5 or the third metal layer 7, and θ is the angle between the channel and the horizontal direction. Therefore, when the channel lengths are the same, the device size can be reduced by 75%, so that higher integration level can be achieved, and a narrow frame can be achieved while high resolution is met.
In the above embodiment, the semiconductor layer 4, the second insulating layer 6, the third metal layer 7, and the trenches formed by the semiconductor layer are extended in the thickness direction of the substrate 1, so that the display Demux structure size can be reduced and the integration level can be improved. In view of further improving the integration of the display Demux structure, the semiconductor layer 4 and the second insulating layer 5 extend from top to bottom to the substrate layer 1 as shown in fig. 3. Therefore, the space in the vertical direction of the display Demux structure can be fully utilized, and higher integration level is achieved.
Preferably, the semiconductor layer is an IGZO semiconductor layer. The mobility of IGZO carriers is 20-30 times that of amorphous silicon, so that the charge and discharge rate of TFT to pixel electrode can be greatly improved, the response speed of pixel is improved, the panel refresh frequency is faster, and the ultra-high resolution TFT-LCD can be realized.
As shown in fig. 5, in order to protect the display area and Demux area, a third insulating layer may be further disposed on the surface of the third metal layer 7.
As shown in fig. 5, there is provided a liquid crystal display including a display region 200 for imaging and a Demux region 100, the Demux region 100 being disposed around the display region 200, the Demux region 100 including a Demux structure according to the embodiment. The Demux region (i.e. display Demux structure) is located at the edge of the display region, and the display region is compatible with the process flow of the Demux region, i.e. the Demux structure and the display region can be arranged on the same substrate 1 and have the same layered structure, so that the processing process is more convenient, and the Demux region can be processed simultaneously while the display region is processed.
Wherein the first metal layer 2 may be used as a drain electrode, the second metal layer 5 as a source electrode, and the third metal layer 7 as a gate electrode. The first metal layer 2 is used as a drain electrode of the Demux structure and a top Gate signal transmission line, wherein the top Gate can be overlapped with the first metal layer 2 through a via hole, the second metal layer 5 is used as a source electrode of the Demux structure, and the third metal layer 7 is used as a touch control layer of a display area and a top Gate of a TFT (thin film transistor) vertical to the Demux area. Although IGZO vertical TFTs have low mobility, a high and uniform on-current can be achieved. In addition, the V-TFT can provide longer channel length than the pixel spacing, compared with the traditional planar TFT structure, when the channel length is the same, 75% of the device size can be reduced, and the lower boeder is shortened while the high resolution is satisfied.
As shown in fig. 6, a method for manufacturing a display Demux structure of the above embodiment is provided. The display Demux structure has a channel extending along the direction of the lining layer and has higher integration level.
The manufacturing method of the Demux structure of the liquid crystal display comprises the following steps:
(1) GE-coating: manufacturing a first metal layer on the lining layer through a coating process;
(2) GI-coating: manufacturing a first insulating layer on the first metal film through a coating process;
(3) GE/GI-stripping: stripping the useless parts of the first metal layer and the first insulating layer to expose the sections of the first metal layer and the first insulating layer;
(4) SE-stripping: manufacturing a semiconductor layer on the section of the first insulating layer, and stripping off the redundant semiconductor layer to enable the redundant semiconductor layer to extend from the first insulating layer to the first metal layer and the lining layer;
(5) SD-peel: manufacturing a second metal layer on the semiconductor layer, and stripping the redundant second metal layer;
(6) PV-coating: manufacturing a second insulating layer on the second metal layer, so that the second insulating layer extends from the surface of the second metal layer to the substrate layer;
(8) CM-stripping: and manufacturing a third metal layer on the second insulating layer, and stripping off the redundant part to enable the rest third metal layer to extend from the upper surface of the second insulating layer to the substrate layer.
As can be seen from fig. 6, the lcd Demux structure shown in fig. 3 is obtained through steps (1) to (8).
It should be noted that, although the foregoing embodiments have been described herein, the scope of the present invention is not limited thereby. Therefore, based on the innovative concepts of the present invention, alterations and modifications to the embodiments described herein, or equivalent structures or equivalent flow transformations made by the present description and drawings, apply the above technical solution, directly or indirectly, to other relevant technical fields, all of which are included in the scope of the invention.
Claims (1)
1. The manufacturing method of the Demux structure of the liquid crystal display is characterized in that the Demux structure of the liquid crystal display comprises more than two field effect transistors, wherein the field effect transistors comprise a substrate and a first metal layer, a first insulating layer, a semiconductor layer, a second metal layer, a second insulating layer, a third metal layer and a third insulating layer which are sequentially stacked on the substrate from bottom to top, the third insulating layer covers the surface of the third metal layer, the semiconductor layer, the second insulating layer and the third metal layer extend along the thickness direction of the substrate, and the semiconductor layer and the second insulating layer extend from top to bottom to the substrate layer; the first metal layer is a drain electrode, the second metal layer is a source electrode, and the third metal layer is a grid electrode; the grid electrode is connected with the drain electrode through a via hole; the semiconductor layer is an IGZO semiconductor layer; the manufacturing method comprises the following steps:
manufacturing a first metal layer on the lining layer through a coating process;
manufacturing a first insulating layer on the first metal layer through a coating process;
stripping the useless parts of the first metal layer and the first insulating layer to expose the sections of the first metal layer and the first insulating layer;
manufacturing a semiconductor layer on the section of the first insulating layer, and stripping off the redundant semiconductor layer to enable the redundant semiconductor layer to extend from the first insulating layer to the first metal layer and the lining layer;
manufacturing a second metal layer on the semiconductor layer, and stripping the redundant second metal layer; manufacturing a second insulating layer on the second metal layer, so that the second insulating layer extends from the surface of the second metal layer to the substrate layer; and manufacturing a third metal layer on the second insulating layer, and stripping off the redundant part to enable the rest third metal layer to extend from the upper surface of the second insulating layer to the substrate layer.
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| CN105304643A (en) * | 2015-09-28 | 2016-02-03 | 深圳市华星光电技术有限公司 | TFT array substrate and preparation method thereof |
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| WO2018188146A1 (en) * | 2017-04-10 | 2018-10-18 | 深圳市华星光电技术有限公司 | Array substrate, display device and manufacturing method therefor |
| CN209087843U (en) * | 2018-11-29 | 2019-07-09 | 福建华佳彩有限公司 | Liquid crystal display Demux structure and liquid crystal display |
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| TWI253538B (en) * | 2000-09-30 | 2006-04-21 | Au Optronics Corp | Thin film transistor flat display and its manufacturing method |
| JP4030885B2 (en) * | 2003-01-27 | 2008-01-09 | シャープ株式会社 | Method for manufacturing thin film transistor substrate |
| TWI239651B (en) * | 2004-04-30 | 2005-09-11 | Quanta Display Inc | Manufacturing method of a thin film transistor-liquid crystal display |
| CN105652548A (en) * | 2016-04-05 | 2016-06-08 | 深圳市华星光电技术有限公司 | Array substrate and liquid crystal display panel |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6869833B1 (en) * | 2004-03-16 | 2005-03-22 | Quanta Display Inc. | Method of manufacturing a thin film transistor of a liquid crystal display |
| CN105304643A (en) * | 2015-09-28 | 2016-02-03 | 深圳市华星光电技术有限公司 | TFT array substrate and preparation method thereof |
| WO2018188146A1 (en) * | 2017-04-10 | 2018-10-18 | 深圳市华星光电技术有限公司 | Array substrate, display device and manufacturing method therefor |
| CN107644882A (en) * | 2017-10-25 | 2018-01-30 | 上海中航光电子有限公司 | Array base palte, display panel and display device |
| CN209087843U (en) * | 2018-11-29 | 2019-07-09 | 福建华佳彩有限公司 | Liquid crystal display Demux structure and liquid crystal display |
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