CN109509139B - Vertex data processing method, device and equipment - Google Patents

Vertex data processing method, device and equipment Download PDF

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CN109509139B
CN109509139B CN201710825070.4A CN201710825070A CN109509139B CN 109509139 B CN109509139 B CN 109509139B CN 201710825070 A CN201710825070 A CN 201710825070A CN 109509139 B CN109509139 B CN 109509139B
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CN109509139A (en
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姚长力
高翔
辛旭
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Loongson Technology Corp Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/60—Memory management
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T15/00—3D [Three Dimensional] image rendering
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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Abstract

The invention provides a vertex data processing method, a vertex data processing device and vertex data processing equipment, wherein the vertex data processing method comprises the following steps: storing vertex data to be rendered to a first vertex buffer object VBO, wherein the first VBO is positioned in a graphic conversion table GTT of a memory, and the vertex data to be rendered is data which is used at least twice in the image rendering process; sending a reading instruction to the GPU, so that the GPU reads the vertex data to be rendered from the first VBO to a second VBO in a Video Random Access Memory (VRAM) in a Direct Memory Access (DMA) mode, and the vertex data to be rendered in the second VBO is used for being rendered by the GPU. For saving CPU resources.

Description

Vertex data processing method, device and equipment
Technical Field
The embodiment of the invention relates to the field of computer image processing, in particular to a vertex data processing method, device and equipment.
Background
Most electronic devices, such as mobile phones, computers, etc., have a screen display function, and such electronic devices generally include a central processing unit (Central Processing Unit, abbreviated as CPU) and a graphics processor (Graphics Processing Unit, abbreviated as GPU), where the CPU and the GPU cooperate to display images on a screen of the electronic device.
When an electronic device displays an image, a CPU copies data to be displayed to a memory, and after preprocessing the data in the memory, GPU-processable (e.g., identifiable and renderable) data is obtained, and the GPU-processable data is transferred to a frequency random access memory (Video Random Access Memory, abbreviated as VRAM) to render the data in the VRAM by the GPU. In the process of rendering a scene by a GPU, the GPU may need to use vertex data of objects (e.g., characters, objects, etc.) in the scene multiple times, the vertex data typically including vertex coordinates and index information. In order to avoid repeated transmission of vertex data to be used between the memory and the VRAM, a vertex buffer object (vertex buffer object, VBO for short) is generally created in the VRAM, and the vertex data is transmitted from the memory to the VBO in the VRAM by the CPU, so that the GPU can be used for multiple times according to the vertex data in the VBO.
However, in the above process, the CPU is required to control the transmission of the vertex data in the memory to the VBO in the VRAM, and the data transmission rate between the memory and the VRAM is low, so that the CPU needs a long time to transmit the vertex data to the VBO in the VRAM, which results in consuming more CPU resources.
Disclosure of Invention
The embodiment of the invention provides a vertex data processing method, device and equipment, which save CPU resources.
In a first aspect, an embodiment of the present invention provides a vertex data processing method, including:
storing vertex data to be rendered to a first vertex buffer object VBO, wherein the first VBO is positioned in a graphic conversion table GTT of a memory, and the vertex data to be rendered is data which is used at least twice in the image rendering process;
sending a reading instruction to the GPU, so that the GPU reads the vertex data to be rendered from the first VBO to a second VBO in a Video Random Access Memory (VRAM) in a Direct Memory Access (DMA) mode, and the vertex data to be rendered in the second VBO is used for being rendered by the GPU.
In one possible implementation manner, before the storing the vertex data to be rendered in the first vertex cache object VBO of the memory, the method further includes:
acquiring initial vertex data;
performing format conversion on the initial vertex data in the memory to obtain the vertex data to be rendered;
and creating the first VBO in the GTT of the memory.
In another possible implementation manner, after the sending a read instruction to the GPU, the method further includes:
receiving a read end response sent by the GPU;
and according to the reading end response, releasing the first VBO in the GTT of the memory.
In a second aspect, an embodiment of the present invention provides a vertex data processing method, including:
receiving a reading instruction sent by a Central Processing Unit (CPU);
according to the reading instruction, vertex data to be rendered in a first VBO is read to a second VBO in a direct memory access DMA mode, wherein the first VBO is positioned in a graphic conversion table GTT of a memory, and the second VBO is positioned in a video random access memory VRAM;
and performing image rendering according to the vertex data to be rendered in the second VBO.
In a possible implementation manner, before the vertex data to be rendered in the first VBO is read to the second VBO according to the reading instruction, the method further includes:
the second VBO is created in the VRAM.
In another possible implementation manner, after the vertex data to be rendered in the first VBO is read to the second VBO by DMA according to the reading instruction, the method further includes:
and sending a read end response to the CPU, wherein the read end response is used for indicating that the GPU has read the vertex data to be rendered in the first VBO.
In a third aspect, an embodiment of the present invention provides a vertex data processing apparatus, including a storage module and a sending module, where,
the storage module is configured to store vertex data to be rendered to a first vertex buffer object VBO, where the first VBO is located in a graphics conversion table GTT of the memory, and the vertex data to be rendered is data that is used at least twice in an image rendering process;
the sending module is configured to send a read instruction to the GPU, so that the GPU reads the vertex data to be rendered from the first VBO to a second VBO in the video random access memory VRAM in a direct memory access DMA mode, where the vertex data to be rendered in the second VBO is used for being rendered by the GPU.
In one possible implementation manner, the device further comprises an acquisition module, a format conversion module and a creation module, wherein,
the obtaining module is configured to obtain initial vertex data before the storage module stores vertex data to be rendered into a first vertex cache object VBO of the memory;
the format conversion module is used for performing format conversion on the initial vertex data in the memory to obtain the vertex data to be rendered;
the creating module is configured to create the first VBO in the GTT of the memory.
In another possible embodiment, the device further comprises a receiving module and a releasing module, wherein,
the receiving module is used for receiving a read end response sent by the GPU after the sending module sends a read instruction to the GPU;
the releasing module is configured to release the first VBO in the GTT of the memory according to the read end response.
In a fourth aspect, an embodiment of the present invention provides a vertex data processing apparatus, including a receiving module, a reading module, and a rendering module, where,
the receiving module is used for receiving a reading instruction sent by the CPU;
the reading module is configured to read vertex data to be rendered in a first VBO to a second VBO according to the reading instruction in a direct memory access DMA mode, where the first VBO is located in a graphics conversion table GTT of the memory, and the second VBO is located in a video random access memory VRAM;
the rendering module is used for performing image rendering according to the vertex data to be rendered in the second VBO.
In one possible embodiment, the apparatus further comprises a creation module, wherein,
the creating module is configured to create a second VBO in the VRAM before the rendering module reads vertex data to be rendered in the first VBO to the second VBO according to the reading instruction.
In another possible embodiment, the apparatus further comprises a transmitting module, wherein,
the sending module is configured to send a read end response to the CPU after the reading module reads the vertex data to be rendered in the first VBO to the second VBO in a DMA manner according to the read instruction, where the read end response is used to indicate that the GPU has read the vertex data to be rendered in the first VBO.
In a fifth aspect, an embodiment of the present invention provides a vertex data processing system, including a central processing unit CPU, a memory, and a graphics card, where the graphics card includes at least an image processing GPU and a video random access memory VRAM, where,
the CPU is used for creating a first vertex buffer object VBO in a graphics conversion table GTT of the memory, wherein the GTT is a storage space allocated by the CPU for the GPU;
the CPU is further used for storing vertex data to be rendered to the first VBO and sending a reading instruction to the GPU;
the GPU is used for creating a second VBO in the VRAM;
the GPU is further used for reading the vertex data to be rendered in the first VBO to the second VBO in a Direct Memory Access (DMA) mode according to the received reading instruction, and performing image rendering according to the vertex data to be rendered in the second VBO.
In a sixth aspect, an embodiment of the present invention provides a computer-readable storage medium having stored therein computer-executable instructions which, when executed by at least one processor of a vertex data processing system, perform the method according to any of the first and second aspects.
In a seventh aspect, embodiments of the present invention provide a computer program product comprising computer-executable instructions stored in a computer-readable storage medium, wherein at least one processor of a vertex data processing system is configured to read the computer-executable instructions from the computer-readable storage medium, the at least one processor executing the computer-executable instructions to cause the vertex data processing system to perform the method of any of the first and second aspects.
In an eighth aspect, an embodiment of the present invention provides a chip system, where the chip system includes a processor configured to support the vertex data processing system to implement the method according to any of the first aspect and the second aspect. In one possible design, the chip system further includes a memory to hold the program instructions and data necessary for the vertex data processing system. The chip system can be composed of chips, and can also comprise chips and other discrete devices.
According to the vertex data processing method, the vertex data processing device and the vertex data processing equipment, when the vertex data to be rendered needs to be transmitted to the VRAM, the CPU stores the vertex data to be rendered in the first VBO in the GTT of the memory, and sends the reading instruction to the GPU, and the GPU reads the vertex data to be rendered in the first VBO to the second VBO in the VRAM in a DMA mode according to the reading instruction, so that the GPU can use the vertex data to be rendered in the second VBO for multiple times. In the above process, the data transfer rate in the memory is higher, so that the CPU can quickly store the data to be rendered in the memory into the first VBO in the GTT of the memory, further, the duration consumed by the CPU in creating the first VBO in the GTT of the memory and sending the read command to the GPU is very small, so that the total duration of the CPU participation is far less than the duration consumed by the CPU in the prior art for controlling the data to be rendered in the memory to be transmitted to the VRAM through the data bus, and therefore, the CPU resource can be saved through the above method.
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In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, a brief description will be given below of the drawings required for the embodiments or the prior art descriptions, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic diagram of an application scenario of a vertex data processing method according to an embodiment of the present invention;
FIG. 2 is a flowchart illustrating a vertex data processing method according to an embodiment of the present invention;
FIG. 3 is a second flowchart of a vertex data processing method according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a vertex data processing procedure according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of a vertex data processing apparatus according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of a vertex data processing device according to an embodiment of the present invention;
FIG. 7 is a schematic diagram of another vertex data processing apparatus according to an embodiment of the present invention;
fig. 8 is a schematic diagram of a second vertex data processing device according to another embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The terms first, second, third and/or fourth and the like in the description and in the claims and in the above-described figures, if any, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented, for example, in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Fig. 1 is a schematic diagram of an application scenario of a vertex data processing method according to an embodiment of the present invention. Referring to fig. 1, the electronic device includes a CPU11, a memory 12, a graphics card 13, and a display screen 14, where the graphics card 13 includes at least a GPU131 and a VRAM132. Optionally, the electronic device may be a mobile phone, a computer, or other devices. Optionally, in the actual application process, the CPU may allocate, according to the actual requirement of the GPU, a corresponding storage space for the GPU in the memory, where the portion of storage space is called a graphics conversion table (graphics translation table, abbreviated as GTT).
In the application, when image display is required, the CPU may acquire data to be rendered, where the data to be rendered includes vertex data to be rendered, create VBO in the GTT and store the vertex data to be rendered in the VBO of the GTT, and notify the CPU to read the vertex data to be rendered in the GTT into the VBO in the VRAM in a manner of direct memory access DMA (Direct Memory Access, abbreviated as DMA), so that the GPU may use the vertex data to be rendered in the VBO in the VRAM multiple times.
In the above process, after the CPU stores the vertex data to be rendered in the memory to the VBO in the GTT of the memory and notifies the GPU to read the vertex data to be rendered in the VBO of the GTT in a DMA manner, the CPU can process other services, that is, the CPU does not need to control the process of transferring the vertex data to be rendered from the memory to the VRAM. The sum of the time consumed by the CPU in creating the VBO in the GTT of the memory and the time consumed in storing the vertex data to be rendered in the memory in the VBO in the GTT of the memory is far smaller than the time consumed by the CPU in the prior art in controlling the data to be rendered in the memory to be transmitted to the VRAM through the data bus, so that CPU resources can be saved through the method shown in the application.
The technical scheme shown in the application is described in detail through specific embodiments. It should be noted that the following embodiments may be combined with each other, and for the same or similar content, the description will not be repeated in different embodiments.
Fig. 2 is a flowchart illustrating a vertex data processing method according to an embodiment of the present invention. Referring to fig. 2, the method may include:
s201, the CPU stores vertex data to be rendered to a first VBO, and the first VBO is located in a GTT of a memory.
In the practical application process, when the user needs to display an image in the electronic device, the user may input an image display request in the electronic device, so that the CPU and the GPU cooperatively execute the method shown in the embodiment of fig. 2 to display the image to be displayed. For example, the user may perform a click operation or the like on an image display button in the electronic device to realize input of a display request in the electronic device. Of course, the display request may also be automatically generated during the running of the application program in the electronic device, for example, during the running of the game (application program), when the game is run to a preset node, an advertisement image display request for requesting the display of the advertisement image is automatically generated.
After receiving the image display request, the CPU may acquire initial image data for image display, wherein the initial image data includes initial vertex data and non-vertex data. For example, the CPU may download the initial image data in the corresponding server through the network, or the CPU may acquire the initial image data locally at the electronic device, or the like.
It should be noted that, the CPU may process the non-vertex data in a manner in the prior art, and will not be described herein.
In the embodiment of the present invention, vertex data refers to data that is required at least twice when image rendering is performed. The GPU generally cannot recognize the format of the initial vertex data, so after the CPU obtains the initial vertex data, the CPU needs to perform format conversion on the initial vertex data in the memory to obtain vertex data to be rendered, and the CPU can recognize the vertex data to be rendered and process the vertex data to be rendered. Of course, in the practical application process, other processing may be performed on the initial vertex data to obtain vertex data to be rendered, for example, decompression processing, compression processing, or the like.
Alternatively, the size of the storage space occupied by the first VBO may be determined by at least two possible implementations:
one possible implementation: and determining the size of the storage space occupied by the first VBO according to the size of the vertex data to be rendered.
In this possible implementation manner, after the CPU obtains the vertex data to be rendered, the size of the vertex data to be rendered may be obtained first, and the first VBO may be created in the GTT of the memory according to the size of the vertex data to be rendered, so that the size of the storage space occupied by the first VBO is equal to the size of the vertex data to be rendered.
Of course, in order to improve the processing efficiency, before obtaining the vertex data to be rendered, the size of the vertex data to be rendered may be estimated according to the initial vertex data, and the first VBO may be created in the GTT of the memory according to the estimated size of the vertex data to be rendered, so that the size of the storage space occupied by the first VBO is equal to the estimated size of the vertex data to be rendered.
Another possible implementation is: and determining the size of the storage space occupied by the first VBO according to the size of the storage space occupied by the second VBO in the VRAM.
In such a possible implementation, there is a second VBO in the VRAM, which is typically fixedly present and is not dynamically created or released as the vertex data is rendered. The memory space occupied by the second VBO is typically a preset size. Correspondingly, when the first VBO is created in the GTT of the memory, the first VBO may be created according to the size of the storage space occupied by the second VBO, so that the size of the storage space occupied by the second VBO is the same as the size of the storage space occupied by the second VBO.
It should be noted that, in the actual application process, the size of the storage space occupied by the first VBO may also be determined according to other feasible implementation manners, which is not limited in the embodiment of the present invention.
S202, the CPU sends a reading instruction to the GPU.
Optionally, the read instruction is configured to notify the GPU to read the data in the first VBO in the GTT of the memory in a DMA manner.
And S203, the GPU reads the vertex data to be rendered in the first VBO to the second VBO in a DMA mode according to the reading instruction, wherein the second VBO is positioned in the VRAM.
When the GPU reads data in the GTT of the memory in the DMA mode, the CPU does not need to rely on the control of the CPU, so that in the process that the GPU reads the vertex data to be rendered in the first VBO to the second VBO in the DMA mode, the CPU can execute other processes.
Alternatively, the second VBO in the VRAM may be always present and not dynamically created or released as the vertex data is rendered. Optionally, the storage space of the second VBO may be a preset size, and in an actual application process, the preset size may be set according to an actual need.
Of course, the second VBO in the VRAM may be dynamically created or released according to the actual requirement, and when the second VBO is dynamically created in the VRAM, the size of the storage space where the second VBO is located may also be set according to the actual requirement.
S204, the GPU performs image rendering according to the vertex data to be rendered in the second VBO.
After the GPU stores the vertex data to be rendered to the second VBO, image rendering may be performed according to the vertex data to be rendered in the second VBO.
Alternatively, after the GPU has completed its use of the vertex data to be rendered in the second VBO, the vertex data to be rendered in the second VBO may be deleted.
For example, after the GPU completes rendering the current scene, the vertex data to be rendered in the second VBO may be deleted.
According to the vertex data processing method provided by the embodiment of the invention, when the vertex data to be rendered needs to be transmitted to the VRAM, the CPU stores the vertex data to be rendered in the first VBO in the GTT of the memory, and sends the reading instruction to the GPU, and the GPU reads the vertex data to be rendered in the first VBO to the second VBO in the VRAM in a DMA mode according to the reading instruction, so that the GPU can use the vertex data to be rendered in the second VBO for multiple times. In the above process, the data transfer rate in the memory is higher, so that the CPU can quickly store the data to be rendered in the memory into the first VBO in the GTT of the memory, further, the duration consumed by the CPU in creating the first VBO in the GTT of the memory and sending the read command to the GPU is very small, so that the total duration of participation of the CPU in the process of transmitting the data to be rendered in the memory to the VRAM is far less than the duration of the CPU in the prior art for controlling the data to be rendered in the memory to be transmitted to the VRAM through the data bus, and therefore, the CPU resources can be saved by the method shown in the application.
In addition to any of the above embodiments, a method for processing vertex data will be described in further detail below with reference to the embodiment shown in fig. 3.
Fig. 3 is a flowchart illustrating a vertex data processing method according to an embodiment of the present invention. Referring to fig. 3, the method may include:
s301, the CPU acquires initial vertex data.
It should be noted that, the process of acquiring the initial vertex data by the CPU in S301 may be referred to the description in S201, and will not be described herein.
Alternatively, after the CPU acquires the initial vertex data, the initial vertex data may be stored in the memory.
S302, the CPU performs format conversion on the initial vertex data in the memory to obtain vertex data to be rendered.
It should be noted that, the process of obtaining the vertex data to be rendered by the CPU in S302 may be described in S201, and will not be described herein.
S303, the CPU creates a first VBO in the GTT of the memory according to the size of the vertex data with rendering.
Optionally, in the actual application process, the first VBO may be created in the GTT of the memory by calling a preset function.
For example, the preset function may be glbufferData, and the glbufferData function may specifically be as follows:
void glBuferData(GLenum target，GLsizeiptr size，const GLvoid*data，GLenum usage)。
the glbufferData function includes four transfer parameters, which are target, size, data and usages, respectively, wherein the type of the parameter target is GLenum, the type of the parameter size is glsizeigtr, the type of the parameter data is const GLvoid, and the type of the parameter usage is GLenum.
The parameter target is used for indicating the storage location of the VBO to be created, wherein the storage location of the VBO to be created may be a memory, a GTT, or a VRAM, and the storage location of the VBO to be created may be indicated by setting a value of the parameter target.
The parameter size is used to indicate the size of the memory space occupied by the VBO to be created.
The parameter data is vertex data to be rendered.
The parameter usage is used to indicate the number of times data may be used. For example, when the use is stream, it is used to indicate that data will be changed once and used only a small number of times. When the usage is static, the indication data will be changed once and used many times. When the usage is dynamic, the data is used to indicate that data is to be changed once and used many times. Optionally, the parameter user of the vertex data is typically set to static to indicate that the vertex data is to be used multiple times.
S304, the CPU stores the vertex data to be rendered in the memory to the first VBO.
The CPU stores the vertex data to be rendered in the memory to the first VBO, and only needs to consume less time.
Optionally, after the CPU stores the first VBO in the vertex data to be rendered in the memory, the vertex data to be rendered in the memory may be deleted, so as to improve the utilization rate of the memory resource.
S305, the CPU sends a reading instruction to the GPU.
It should be noted that, the execution process of S305 may refer to S202, and will not be described herein.
And S306, the GPU reads the vertex data to be rendered in the first VBO to the second VBO in the VRAM in a DMA mode according to the reading instruction.
It should be noted that, the execution process of S306 may refer to S203, and will not be described herein.
It should also be noted that, before S306, the GPU has created the second VBO in the VRAM and saved the second VBO in the VRAM for a long period of time.
S307, after the GPU finishes reading the vertex data to be rendered in the first VBO, sending a reading completion response to the CPU.
The read completion response is used for notifying the CPU that the GPU has read the vertex data to be rendered in the first VBO.
And S308, the GPU performs image rendering according to the vertex data to be rendered in the second VBO.
S309, the CPU releases the first VBO in the GTT in the memory according to the reading completion instruction.
Note that S308 and S309 may be executed simultaneously or sequentially, and when S308 and S309 are executed sequentially, S309 may be executed first and then S308 may be executed.
In the embodiment shown in fig. 3, the CPU establishes a first VBO in the GTT of the memory, caches the vertex data to be rendered to the first VBO, and notifies the GPU to transfer the vertex data to be rendered in the first VBO to the second VBO of the VRAM in a DMA manner, so that compared with a method in which the CPU directly controls the vertex data to be rendered to be transferred from the memory to the VRAM through the data bus, the transmission rate of the vertex data to be rendered is improved. Experimental statistics show that the transmission rate of vertex data to be rendered can be shown in the following table 1 according to the manner in the prior art and the manner in the application.
TABLE 1
Figure BDA0001407283950000111
Figure BDA0001407283950000121
Wherein the transmission rates of 12 sets of vertex data to be rendered are listed in table 1, for each set of data: the "original usage time" refers to the time used by the CPU to directly control the transfer of vertex data to be rendered from the memory to the VRAM through the data bus, the "optimized usage time" refers to the time for transferring vertex data to be rendered by the method provided by the present embodiment, and the "speed-up percentage" refers to the speed-up percentage of the "optimized usage time" compared to the corresponding "original usage time".
The technical solution shown in the foregoing method embodiment is described in detail by a specific example with reference to a schematic diagram of a vertex data processing procedure shown in fig. 4.
Fig. 4 is a schematic diagram of a vertex data processing procedure according to an embodiment of the present invention. Referring to fig. 4, states 41-46 are included.
Referring to state 41, when image rendering is required, the CPU first acquires initial vertex data and stores the initial vertex data in the memory.
Referring to state 42, the cpu performs format conversion on the initial vertex data in the memory to obtain vertex data to be rendered, and at this time, the vertex data to be rendered is still located in the memory, and the initial vertex data is deleted in the memory.
Referring to state 43, the CPU stores the vertex data to be rendered in the memory in the first VBO of the GTT, and deletes the vertex data to be rendered in the memory after the CPU stores the vertex data to be rendered in the first VBO.
Referring to state 44, after the CPU stores the vertex data to be rendered to the first VBO, the CPU sends a read instruction to the GPU.
Referring to state 45, the gpu reads vertex data to be rendered in a first VBO in the GTT of the memory into a second VBO of the VRAM in a DMA manner according to a read instruction sent by the CPU.
Referring to state 46, after the GPU reads the vertex data to be rendered in the first VBO, the GPU sends a read completion instruction to the CPU, and the CPU releases the first VBO in the GTT according to the read completion instruction.
Fig. 5 is a schematic structural diagram of a vertex data processing device according to an embodiment of the present invention. Referring to fig. 5, the apparatus may include a storage module 11 and a transmission module 12, wherein,
the storage module 11 is configured to store vertex data to be rendered to a first vertex buffer object VBO, where the first VBO is located in a graphics conversion table GTT of a memory, and the vertex data to be rendered is data that is used at least twice in an image rendering process;
the sending module 12 is configured to send a read instruction to the GPU, so that the GPU reads, by using a direct memory access DMA, the vertex data to be rendered from the first VBO to a second VBO in the video random access memory VRAM, where the vertex data to be rendered in the second VBO is used for being rendered by the GPU.
The vertex data processing device shown in the embodiment of the present invention may execute the technical solution shown in the embodiment of the method, and its implementation principle and beneficial effects are similar, and will not be described in detail here.
Fig. 6 is a schematic diagram of a vertex data processing device according to an embodiment of the present invention. On the basis of the embodiment shown in fig. 5, referring to fig. 6, the apparatus further comprises an acquisition module 13, a format conversion module 14 and a creation module 15, wherein,
the obtaining module 13 is configured to obtain initial vertex data before the storage module 11 stores vertex data to be rendered into a first vertex cache object VBO of a memory;
the format conversion module 14 is configured to perform format conversion on the initial vertex data in the memory, so as to obtain vertex data to be rendered;
the creating module 15 is configured to create the first VBO in the GTT of the memory.
In a possible embodiment, the device further comprises a receiving module 16 and a releasing module 17, wherein,
the receiving module 16 is configured to receive a read end response sent by the GPU after the sending module 12 sends a read instruction to the GPU;
the releasing module 17 is configured to release the first VBO in the GTT of the memory according to the read end response.
The vertex data processing device shown in the embodiment of the present invention may execute the technical solution shown in the embodiment of the method, and its implementation principle and beneficial effects are similar, and will not be described in detail here.
Fig. 7 is a schematic structural diagram of another vertex data processing device according to an embodiment of the present invention. Referring to fig. 7, the apparatus may include a receiving module 21, a reading module 22, and a rendering module 23, wherein,
the receiving module 21 is configured to receive a read instruction sent by the central processing unit CPU;
the reading module 22 is configured to read vertex data to be rendered in a first VBO to a second VBO according to the reading instruction in a direct memory access DMA mode, where the first VBO is located in a graphics conversion table GTT of the memory, and the second VBO is located in a video random access memory VRAM;
the rendering module 23 is configured to perform image rendering according to the vertex data to be rendered in the second VBO.
The vertex data processing device shown in the embodiment of the present invention may execute the technical solution shown in the embodiment of the method, and its implementation principle and beneficial effects are similar, and will not be described in detail here.
Fig. 8 is a schematic diagram of a second vertex data processing device according to another embodiment of the present invention. On the basis of the embodiment shown in fig. 7, referring to fig. 8, the apparatus further comprises a creation module 24, wherein,
the creating module 24 is configured to create a second VBO in the VRAM before the rendering module 23 reads vertex data to be rendered in the first VBO to the second VBO according to the reading instruction.
In a possible embodiment, the apparatus further comprises a transmitting module 25, wherein,
the sending module 25 is configured to send a read end response to the CPU after the reading module 22 reads, according to the read instruction, vertex data to be rendered in the first VBO to the second VBO by DMA, where the read end response is used to indicate that the GPU has read the vertex data to be rendered in the first VBO.
The vertex data processing device shown in the embodiment of the present invention may execute the technical solution shown in the embodiment of the method, and its implementation principle and beneficial effects are similar, and will not be described in detail here.
The embodiment of the invention also provides a vertex data processing system, which comprises a Central Processing Unit (CPU), a memory and a display card, wherein the display card at least comprises an image processing GPU and a Video Random Access Memory (VRAM),
the CPU is used for creating a first vertex buffer object VBO in a graphics conversion table GTT of the memory, wherein the GTT is a storage space allocated by the CPU for the GPU;
the CPU is further used for storing vertex data to be rendered to the first VBO and sending a reading instruction to the GPU;
the GPU is used for creating a second VBO in the VRAM;
the GPU is further used for reading the vertex data to be rendered in the first VBO to the second VBO in a Direct Memory Access (DMA) mode according to the received reading instruction, and performing image rendering according to the vertex data to be rendered in the second VBO.
It should be noted that, referring to fig. 1, a schematic structural diagram of the vertex data processing system may be referred to, and detailed description of the embodiment of the present invention is omitted.
Embodiments of the present invention provide a computer readable storage medium having stored therein computer executable instructions that, when executed by at least one processor of a vertex data processing system, perform a method as described in the method embodiments above.
Embodiments of the present invention provide a computer program product comprising computer-executable instructions stored in a computer-readable storage medium, wherein at least one processor of a vertex data processing system is configured to read the computer-executable instructions from the computer-readable storage medium, the at least one processor executing the computer-executable instructions to cause the vertex data processing system to perform the method as shown in the method embodiments described above.
The embodiment of the invention provides a chip system which comprises a processor and a vertex data processing system, wherein the processor is used for supporting the vertex data processing system to realize the method shown in the embodiment of the method.
Those of ordinary skill in the art will appreciate that: all or part of the steps for implementing the method embodiments described above may be performed by hardware associated with program instructions. The foregoing program may be stored in a computer readable storage medium. The program, when executed, performs steps including the method embodiments described above; and the aforementioned storage medium includes: various media that can store program code, such as ROM, RAM, magnetic or optical disks.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and not for limiting the same; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the invention.

Claims (14)

1. A method of vertex data processing, comprising:
storing vertex data to be rendered to a first vertex buffer object VBO, wherein the first VBO is positioned in a graphic conversion table GTT of a memory, and the vertex data to be rendered is data which is used at least twice in the image rendering process;
sending a reading instruction to the GPU, so that the GPU reads the vertex data to be rendered from the first VBO to a second VBO in a Video Random Access Memory (VRAM) in a Direct Memory Access (DMA) mode, and the GPU uses the vertex data to be rendered in the VRAM for multiple times; the vertex data to be rendered in the second VBO is for rendering by the GPU;
the size of the storage space occupied by the first VBO is determined according to the size of the storage space occupied by the second VBO.
2. The method of claim 1, further comprising, prior to storing the vertex data to be rendered in the first vertex cache object VBO of memory:
acquiring initial vertex data;
performing format conversion on the initial vertex data in the memory to obtain the vertex data to be rendered;
and creating the first VBO in the GTT of the memory.
3. The method according to claim 1 or 2, further comprising, after said sending a read instruction to said image processor GPU:
receiving a read end response sent by the GPU;
and according to the reading end response, releasing the first VBO in the GTT of the memory.
4. A method of vertex data processing, comprising:
receiving a reading instruction sent by a Central Processing Unit (CPU);
according to the reading instruction, vertex data to be rendered in a first VBO is read to a second VBO in a direct memory access DMA mode, wherein the first VBO is positioned in a graphic conversion table GTT of a memory, and the second VBO is positioned in a video random access memory VRAM; the vertex data to be rendered is data which is used at least twice in the image rendering process;
performing image rendering according to the vertex data to be rendered in the second VBO;
the size of the storage space occupied by the first VBO is determined according to the size of the storage space occupied by the second VBO.
5. The method of claim 4, wherein the reading vertex data to be rendered in the first VBO to the second VBO according to the read instruction further comprises:
the second VBO is created in the VRAM.
6. The method according to claim 4 or 5, wherein after reading the vertex data to be rendered in the first VBO to the second VBO by DMA according to the read instruction, the method further comprises:
and sending a read end response to the CPU, wherein the read end response is used for indicating that the GPU has read the vertex data to be rendered in the first VBO.
7. A vertex data processing device is characterized by comprising a storage module and a sending module, wherein,
the storage module is configured to store vertex data to be rendered to a first vertex buffer object VBO, where the first VBO is located in a graphics conversion table GTT of the memory, and the vertex data to be rendered is data that is used at least twice in an image rendering process;
the sending module is used for sending a reading instruction to the GPU, so that the GPU reads the vertex data to be rendered from the first VBO to a second VBO in a Video Random Access Memory (VRAM) in a Direct Memory Access (DMA) mode, and the GPU uses the vertex data to be rendered in the VRAM for multiple times; the vertex data to be rendered in the second VBO is for rendering by the GPU;
the size of the storage space occupied by the first VBO is determined according to the size of the storage space occupied by the second VBO.
8. The apparatus of claim 7, further comprising an acquisition module, a format conversion module, and a creation module, wherein,
the obtaining module is configured to obtain initial vertex data before the storage module stores vertex data to be rendered into a first vertex cache object VBO of the memory;
the format conversion module is used for performing format conversion on the initial vertex data in the memory to obtain the vertex data to be rendered;
the creating module is configured to create the first VBO in the GTT of the memory.
9. The apparatus of claim 7 or 8, further comprising a receiving module and a releasing module, wherein,
the receiving module is used for receiving a read end response sent by the GPU after the sending module sends a read instruction to the GPU;
the releasing module is configured to release the first VBO in the GTT of the memory according to the read end response.
10. A vertex data processing device is characterized by comprising a receiving module, a reading module and a rendering module, wherein,
the receiving module is used for receiving a reading instruction sent by the CPU;
the reading module is configured to read vertex data to be rendered in a first VBO to a second VBO according to the reading instruction in a direct memory access DMA mode, where the first VBO is located in a graphics conversion table GTT of the memory, and the second VBO is located in a video random access memory VRAM; the vertex data to be rendered is data which is used at least twice in the image rendering process;
the rendering module is used for performing image rendering according to the vertex data to be rendered in the second VBO;
the size of the storage space occupied by the first VBO is determined according to the size of the storage space occupied by the second VBO.
11. The apparatus of claim 10, further comprising a creation module, wherein,
the creating module is configured to create a second VBO in the VRAM before the rendering module reads vertex data to be rendered in the first VBO to the second VBO according to the reading instruction.
12. The apparatus of claim 10 or 11, further comprising a transmission module, wherein,
the sending module is configured to send a read end response to the CPU after the reading module reads the vertex data to be rendered in the first VBO to the second VBO in a DMA manner according to the read instruction, where the read end response is used to indicate that the GPU has read the vertex data to be rendered in the first VBO.
13. A vertex data processing system is characterized by comprising a central processing unit CPU, a memory and a display card, wherein the display card at least comprises an image processing GPU and a video random access memory VRAM,
the CPU is used for creating a first vertex buffer object VBO in a graphics conversion table GTT of the memory, wherein the GTT is a storage space allocated by the CPU for the GPU;
the CPU is further used for storing vertex data to be rendered to the first VBO and sending a reading instruction to the GPU; the vertex data to be rendered is data which is used at least twice in the image rendering process;
the GPU is used for creating a second VBO in the VRAM;
the GPU is further used for reading the vertex data to be rendered in the first VBO to the second VBO in a Direct Memory Access (DMA) mode according to the received reading instruction, and performing image rendering according to the vertex data to be rendered in the second VBO;
the size of the storage space occupied by the first VBO is determined according to the size of the storage space occupied by the second VBO.
14. A computer-readable storage medium having stored therein computer-executable instructions which, when executed by at least one processor of a vertex data processing system, perform the method of any of claims 1-6.
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