CN109474354B - Digital radio frequency signal equipment, signal link detection method and device - Google Patents

Digital radio frequency signal equipment, signal link detection method and device Download PDF

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Publication number
CN109474354B
CN109474354B CN201811541045.4A CN201811541045A CN109474354B CN 109474354 B CN109474354 B CN 109474354B CN 201811541045 A CN201811541045 A CN 201811541045A CN 109474354 B CN109474354 B CN 109474354B
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self
loop
processing device
radio frequency
switch
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CN109474354A (en
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龙润坚
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Comba Network Systems Co Ltd
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Comba Telecom Systems China Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B17/00Monitoring; Testing
    • H04B17/10Monitoring; Testing of transmitters
    • H04B17/11Monitoring; Testing of transmitters for calibration
    • H04B17/14Monitoring; Testing of transmitters for calibration of the whole transmission and reception path, e.g. self-test loop-back
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B17/00Monitoring; Testing
    • H04B17/10Monitoring; Testing of transmitters
    • H04B17/15Performance testing
    • H04B17/17Detection of non-compliance or faulty performance, e.g. response deviations
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B17/00Monitoring; Testing
    • H04B17/20Monitoring; Testing of receivers
    • H04B17/29Performance testing

Abstract

The application relates to a digital radio frequency signal device, which comprises a monitoring device, a signal conversion device, a digital processing device and a loop switch device, wherein a control end of the digital processing device is respectively connected with the monitoring device. The loop switch device is used for controlling the digital processing device and the signal conversion device to loop automatically according to the control of the monitoring device. The digital processing device is used for performing self-checking on the first self-loop link when the loop switching device controls the transmission port and the receiving port to be conducted to form the first self-loop link according to the control of the monitoring device, and is used for disconnecting the self-loop of the digital processing device at the loop switching device to control the downlink output port and the uplink input port of the signal conversion device to be conducted to perform self-checking on the second self-loop link when the second self-loop link is formed, and respectively generating self-checking results corresponding to the respective self-loop links. The monitoring device is used for determining whether the loop link has a fault according to the detection result. And the self-checking efficiency of the signal link is improved.

Description

Digital radio frequency signal equipment, signal link detection method and device
Technical Field
The present application relates to the field of communications technologies, and in particular, to a digital radio frequency signal device, a signal link detection method, and an apparatus.
Background
With the development of communication technology, communication devices with digital radio frequency links, such as various types of base station devices, are widely used in various communication systems. The reliability of the uplink and downlink signals inside the communication equipment has an important influence on the communication quality, and therefore, the detection of potential faults of the uplink and downlink in advance or the detection of the fault positions of the uplink and downlink in time are essential to the operation and maintenance of the communication equipment.
At present, for a communication device with a digital radio frequency link, in order to find out the uplink and downlink failures in time, a traditional detection method is to perform hardware detection, or to determine whether the uplink or downlink fails by using a special device self-detection scheme. However, in implementing the present invention, the inventor finds that in the conventional uplink and downlink failure detection technology, at least the failure detection efficiency is not high.
Disclosure of Invention
In view of the above, it is necessary to provide a digital radio frequency signal device, a signal link detection method, a signal link detection apparatus and a computer readable storage medium capable of greatly improving the failure detection efficiency.
In order to achieve the above purpose, the embodiment of the invention adopts the following technical scheme:
on one hand, the embodiment of the invention provides digital radio frequency signal equipment, which comprises a monitoring device, a digital processing device, a signal conversion device and a loop switch device, wherein control ends of the digital processing device and the loop switch device are respectively connected with the monitoring device;
the loop switch device is used for controlling the digital processing device and the signal conversion device to loop in sequence according to the control of the monitoring device; the digital processing device is used for performing self-checking on the first self-loop link when the loop switching device controls the transmission port and the receiving port to be conducted to form the first self-loop link according to the control of the monitoring device, and is used for disconnecting the self-loop of the digital processing device at the loop switching device to control the downlink output port and the uplink input port of the signal conversion device to be conducted to perform self-checking on the second self-loop link when the second self-loop link is formed, and respectively generating self-checking results corresponding to the respective loop links;
the monitoring device is used for determining whether the loop link has a fault according to the detection result.
In one embodiment, the loop switch device comprises a first loop switch and a second loop switch, and control ends of the first loop switch and the second loop switch are respectively connected with the monitoring device;
the transmitting port and the receiving port of the digital processing device are connected through a first loop switch, and the downlink output port and the uplink input port of the signal conversion device are connected through a second loop switch.
In one embodiment, the first loop switch comprises a first radio frequency switch and a second radio frequency switch, and control ends of the first radio frequency switch and the second radio frequency switch are respectively connected with the monitoring device;
the movable end of the first radio frequency switch is connected with the transmitting port of the digital processing device, the first fixed end of the first radio frequency switch is connected with the downlink input port of the signal conversion device, and the second fixed end of the first radio frequency switch is connected with the second fixed end of the second radio frequency switch;
the movable end of the second radio frequency switch is connected with the receiving port of the digital processing device, and the first fixed end of the second radio frequency switch is connected with the uplink output port of the signal conversion device.
In one embodiment, the second loop switch includes a third radio frequency switch and a fourth radio frequency switch,
the control ends of the third radio frequency switch and the fourth radio frequency switch are respectively connected with the monitoring device;
the movable end of the third radio frequency switch is connected with the downlink output port of the signal conversion device, the first fixed end of the third radio frequency switch is connected with the first fixed end of the fourth radio frequency switch, and the movable end of the fourth radio frequency switch is connected with the uplink input port of the signal conversion device.
In one embodiment, the digital radio frequency signal device further includes a radio frequency processing device, a downlink input port of the radio frequency processing device is connected to a downlink output port of the signal conversion device, and an uplink output port of the radio frequency processing device is connected to an uplink input port of the signal conversion device;
a downlink output port and an uplink input port of the radio frequency processing device are connected through a loop switch device;
the monitoring device is also used for controlling the self-loop of the radio frequency processing device through the loop switch after the digital processing device and the signal conversion device are determined to be normal, indicating the digital processing device to carry out loop self-detection and determining whether the radio frequency processing device has faults or not.
In one embodiment, the loop switch device further comprises a third loop switch, and a control end of the third loop switch is connected with the monitoring device;
and a downlink output port and an uplink input port of the radio frequency processing device are connected through a third loop switch.
In one embodiment, the third loop switch comprises a fifth radio frequency switch and a sixth radio frequency switch, and control ends of the fifth radio frequency switch and the sixth radio frequency switch are respectively connected with the monitoring device;
the movable end of the fifth radio frequency switch is connected with the downlink output port of the radio frequency processing device, the first fixed end of the fifth radio frequency switch is connected with the first fixed end of the sixth radio frequency switch, and the movable end of the sixth radio frequency switch is connected with the uplink input port of the radio frequency processing device.
In another aspect, an embodiment of the present invention further provides a signal link detection method, including:
after receiving the self-checking instruction, indicating a loop switch device to control a transmitting port and a receiving port of the digital processing device to be conducted to form a first self-loop link;
instructing the digital processing device to output a test signal from the transmitting port to the receiving port, and performing loop self-test of the first self-loop link;
if the digital processing device is determined to be normal according to the self-detection result corresponding to the first self-loop link, indicating the loop switch device to disconnect the self-loop of the digital processing device and controlling the downlink output port and the uplink input port of the signal conversion device to be connected to form a second self-loop link;
instructing the digital processing device to output a test signal from the transmitting port to a downlink input port of the signal conversion device, and performing loop self-test of a second self-loop link;
and if the signal conversion device is determined to have a fault according to the self-checking result corresponding to the second self-loop link, finishing detection and performing fault prompt.
In one embodiment, the method further comprises:
and if the digital processing device is determined to have a fault according to the self-detection result corresponding to the first self-loop link, finishing detection and prompting the fault.
In one embodiment, the method further comprises:
and if the signal conversion device is determined to be normal according to the self-checking result corresponding to the second self-loop link, indicating the loop switch device to disconnect the self-loop of the signal conversion device, and prompting that the link is normal.
In one embodiment, the method further comprises:
if the signal conversion device is determined to be normal according to the self-checking result corresponding to the second self-loop link, indicating the loop switch device to disconnect the self-loop of the signal conversion device and controlling the downlink output port and the uplink input port of the radio frequency processing device to be connected to form a third self-loop link;
instructing the digital processing device to output a test signal from the transmitting port to a downlink input port of the signal conversion device, and performing loop self-test of a third self-loop link;
and if the radio frequency processing device is determined to have a fault according to the self-detection result corresponding to the third self-loop link, finishing detection and prompting the fault.
In one embodiment, the method further comprises:
and if the radio frequency processing device is determined to be normal according to the self-detection result corresponding to the third self-loop link, indicating the loop switch device to disconnect the self-loop of the radio frequency processing device, and prompting that the link is normal.
In one embodiment, when it is determined that the digital processing device, the signal conversion device, or the radio frequency processing device is normal according to the respective detection results, the method further includes:
indicating the counting value of a preset counter to be increased by 1; the preset counter is used for indicating the end of the self-checking process when the count value reaches a threshold value.
In another aspect, an embodiment of the present invention further provides a signal link detection apparatus, including:
the first self-loop module is used for indicating the loop switching device to control the transmission port and the receiving port of the digital processing device to be conducted after receiving the self-checking instruction so as to form a first self-loop link;
the first indicating module is used for indicating the digital processing device to output a test signal from the transmitting port to the receiving port and carrying out loop self-detection on the first self-loop link;
the second self-loop module is used for indicating the loop switching device to disconnect the self-loop of the digital processing device and controlling the downlink output port and the uplink input port of the signal conversion device to be conducted to form a second self-loop link when the digital processing device is determined to be normal according to the self-detection result corresponding to the first self-loop link;
the second indicating module is used for indicating the digital processing device to output a test signal from the transmitting port to the downlink input port of the signal conversion device and carrying out loop self-detection on the second self-loop link;
and the fault prompting module is used for finishing detection and performing fault prompting when the signal conversion device is determined to have a fault according to a self-checking result corresponding to the second self-loop link.
In still another aspect, an embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored, where the computer program is executed by a processor to implement the steps of the signal link detection method.
One of the above technical solutions has the following advantages and beneficial effects:
through the setting of the loop switch device, when the monitoring device receives the self-checking instruction, the loop switch device is indicated to control the digital processing device and the signal conversion device to carry out self-checking on the loops one by one along the signal downlink direction, and a corresponding self-checking result is generated. The monitoring device acquires a self-detection result generated by the digital processing device to determine whether the digital processing device and the signal conversion device have faults or not. Therefore, the fault detection of the signal link (including the uplink and the downlink) can be realized, and meanwhile, the specific position of the fault when the fault occurs can be accurately determined, such as a digital processing device or a signal conversion device, so that the fault detection efficiency of the signal link is greatly improved.
Drawings
FIG. 1 is a block diagram of a digital RF signal device in one embodiment;
FIG. 2 is a schematic diagram of a first configuration of a digital RF signaling apparatus in one embodiment;
FIG. 3 is a diagram illustrating a second configuration of the digital RF signaling device in one embodiment;
FIG. 4 is a diagram illustrating a third structure of the digital RF signal apparatus in one embodiment;
FIG. 5 is a first flowchart of a signal link detection method according to an embodiment;
FIG. 6 is a second flowchart of a signal link detection method according to an embodiment;
FIG. 7 is a third flowchart of a signal link detection method according to an embodiment;
FIG. 8 is a fourth flowchart illustrating a signal link detection method according to an embodiment;
fig. 9 is a block diagram showing the structure of a signal link detection device according to an embodiment.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
In a communication system, a communication device with a digital radio frequency link is mainly composed of a digital board, a signal conversion device, a radio frequency device block, an antenna device and the like. The digital board comprises a digital signal processing device (namely an FPGA) and an embedded host, wherein the embedded host provides the complete machine control and the monitoring of an uplink and a downlink of the communication equipment; the digital signal processing device provides the functions of receiving and processing the uplink signal and generating, processing and outputting the downlink signal. The signal conversion device is also an AD/DA (analog-to-digital/digital-to-analog) conversion device. Among them, the digital signal processing device, the signal conversion device, the radio frequency device, the antenna device, etc. provide the uplink and downlink of signals.
Referring to fig. 1, in one embodiment, a digital radio frequency signal apparatus 100 is provided, which includes a monitoring device 12, a signal conversion device 14, a digital processing device 16, and a loop switch device 18. The control terminals of the digital processing device 16 and the loop switch device 18 are respectively connected with the monitoring device 12. The loop switch device 18 is used for controlling the digital processing device 16 and the signal conversion device 14 to loop automatically according to the control of the monitoring device 12. The digital processing device 16 is configured to perform self-checking of the first self-loop link when the loop switch device 18 controls the transmission port and the reception port to be on to form a first self-loop link according to the control of the monitoring device 12, and is configured to perform self-checking of the second self-loop link when the loop switch device 18 disconnects the self-loop of the digital processing device 16 and controls the downlink output port and the uplink input port of the signal conversion device 14 to be on to form a second self-loop link, and correspondingly generates a self-checking result of each self-loop link. The monitoring device 12 is configured to determine whether the respective loop link has a fault according to the respective detection result.
The loop switch device 18 is an electrically controlled switch for controlling the connection between the uplink and the downlink to disconnect the normal link connection function of each unit in the link, and may be a multiple-input multiple-output rf signal switch or a double-pole multiple-throw rf signal switch. It will be appreciated that the digital processing means 16 may be the digital signal processing means of the communication device described above; the monitoring device 12 may be an embedded host of the above-mentioned communication apparatus; the signal conversion means 14 may be AD/DA (analog-to-digital/digital-to-analog) conversion means of the communication apparatus described above. The downstream direction of the signal is also the direction from the digital processing device 16 to the signal conversion device 14.
The connection relationship between the signal conversion device 14, the digital processing device 16 and the loop switch device 18 may be as follows: a transmitting port of the digital processing device 16 is connected to a downstream input port of the signal conversion device 14. The receiving port of the digital processing device 16 is connected to the upstream output port of the signal conversion device 14. The transmit and receive ports of the digital processing device 16 are connected by a loop switch device 18. The downstream output port and the upstream input port of the signal conversion means 14 are connected by a loop switch means 18.
The monitoring device 12 is configured to control the loop switch device 18 to turn on the transmitting port and the receiving port of the digital processing device 16 after receiving the self-checking instruction, so that the digital processing device 16 is self-looped, thereby suspending the signal processing functions of the normal uplink and downlink, and forming a first self-loop link for self-checking. After the loop switch device 18 completes the self-loop control of the digital processing device 16, the monitoring device 12 instructs the digital processing device 16 to generate and output a preset self-check signal, the preset self-check signal is output from the transmitting port of the digital processing device 16 and looped back to the receiving port through the loop switch device 18, the digital processing device 16 receives and performs uplink processing, and whether there is a difference between the downlink preset self-check signal and the uplink preset self-check signal is compared, so as to generate a self-check result (i.e., a loop self-check is performed) of the first self-loop link where the digital processing device 16 is located. After the monitoring device 12 obtains the self-test result generated by the digital processing device 16, it determines whether the digital processing device 16 has a fault according to the self-test result, for example, the self-test result indicates that the downlink preset self-test signal is inconsistent with the uplink preset self-test signal (i.e., there is a difference, if the power of the uplink preset self-test signal exceeds a set range, the carried information is lost, etc.), that is, it determines that the digital processing device 16 has a fault, otherwise, it determines that the digital processing device 16 has no fault.
When the monitoring device 12 determines that the digital processing device 16 has a fault, it may determine that the digital radio frequency signal device 100 has a fault in the current operation state, and the fault location is located in the digital processing device 16, thereby terminating the loop self-test for the operation administrator to perform fault repair. When the monitoring device 12 determines that the digital processing device 16 has no fault, the monitoring device 12 controls the loop switch device 18 to disconnect the self-loop of the digital processing device 16, and the link connection between the digital processing device 16 and the signal conversion device 14 is restored; meanwhile, the loop switch device 18 turns on the downlink output port and the uplink input port of the signal conversion device 14, so that the signal conversion device 14 is self-looped, thereby suspending the signal conversion function between the normal uplink and downlink, and forming a second self-loop link for self-checking.
After the loop switch device 18 completes the self-loop control of the signal conversion device 14, the monitoring device 12 instructs the digital processing device 16 to generate and output a preset self-check signal, the preset self-check signal is output from the transmitting port of the digital processing device 16 to the downlink input port of the signal conversion device 14, and is looped back to the receiving port of the digital processing device 16 through the signal conversion device 14 and the loop switch device 18, the digital processing device 16 receives and performs uplink processing, and whether there is a difference between the downlink preset self-check signal and the uplink preset self-check signal is compared, so as to output a self-check result of a second self-loop link where the digital processing device 16 and the signal conversion device 14 are located. After the monitoring device 12 obtains the self-test result of the second self-loop link generated by the digital processing device 16, it is determined whether the signal conversion device 14 has a fault according to the self-test result, for example, the self-test result indicates that the preset downstream self-test signal is inconsistent with the preset upstream self-test signal, that is, it is determined that the signal conversion device 14 has a fault, otherwise, it is determined that the signal conversion device 14 has no fault.
When the monitoring device 12 determines that the signal conversion device 14 has a fault, it may determine that the digital radio frequency signal device 100 has a fault in the current operation state, and the fault location is located in the signal conversion device 14, thereby terminating the loop self-test for the operation administrator to perform fault repair. When the monitoring device 12 determines that the signal conversion device 14 has no fault, the monitoring device 12 controls the loop switch device 18 to disconnect the self-loop of the signal conversion device 14, and the normal link connection of the signal conversion device 14 is restored. Thereafter, the monitoring device 12 can instruct the digital processing device 16 to resume normal uplink and downlink signal processing functions, and continue daily operation.
Through the setting of the loop switch device 18, when the monitoring device 12 receives the self-checking instruction, the digital radio frequency signal device instructs the loop switch device 18 to control the digital processing device 16 and the signal conversion device 14 to perform loop self-checking one by one along the signal downlink direction (i.e. the self-loop link) and generate a corresponding self-checking result. Monitoring device 12 obtains the self-test result generated by digital processing device 16 to determine whether there is a fault in digital processing device 16 and signal conversion device 14. Therefore, the fault detection of the signal link (including the uplink and the downlink) can be realized, and meanwhile, the specific position (the digital processing device 16 or the signal conversion device 14) of the fault can be accurately determined when the fault occurs, so that the fault detection efficiency of the signal link is greatly improved.
Referring to fig. 2, in an embodiment, the digital rf signal apparatus 100 further includes an rf processing device 20. A downstream input port of the rf processing device 20 is connected to a downstream output port of the signal conversion device 14. The upstream output port of the rf processing device 20 is connected to the upstream input port of the signal conversion device 14. The downstream output port and the upstream input port of the rf processing device 20 are connected by a loop switch device 18. The monitoring device 12 is further configured to control the rf processing device 20 to perform a loop self-test through the loop switch after determining that the digital processing device 16 and the signal conversion device 14 are normal, and instruct the digital processing device 16 to perform a loop self-test to determine whether the rf processing device 20 has a fault.
It is understood that the rf processing device 20 may be the above-mentioned communication device rf device, and may provide rf processing functions of frequency conversion, amplification, and filtering for the uplink signal and the downlink signal. Specifically, when the monitoring device 12 determines that the signal conversion device 14 has no fault, the monitoring device 12 controls the loop switch device 18 to disconnect the self-loop of the signal conversion device 14, and the normal link connection of the signal conversion device 14 is recovered; meanwhile, the loop switch device 18 turns on the downlink output port and the uplink input port of the rf processing device 20, so that the rf processing device 20 performs a self-loop, thereby suspending the rf processing functions of the normal uplink and downlink, and forming a third self-loop link for self-checking.
After the loop switch device 18 completes the self-loop control of the rf processing device 20, the monitoring device 12 instructs the digital processing device 16 to generate and output a preset self-check signal, where the preset self-check signal is output from the transmitting port of the digital processing device 16 to the downlink input port of the signal conversion device 14, and loops back to the receiving port of the digital processing device 16 through the signal conversion device 14, the rf processing device 20, and the loop switch device 18; the digital processing device 16 receives the uplink preset self-check signal and performs uplink processing, and compares whether there is a difference between the downlink preset self-check signal and the uplink preset self-check signal, so as to output a self-check result of a third self-loop link where the digital processing device 16, the signal conversion device 14 and the radio frequency processing device 20 are located. After the monitoring device 12 obtains the self-test result of the third self-loop link generated by the digital processing device 16, it determines whether the radio frequency processing device 20 has a fault according to the self-test result, for example, the self-test result indicates that the downlink preset self-test signal is inconsistent with the uplink preset self-test signal, that is, it determines that the radio frequency processing device 20 has a fault, otherwise, it determines that the radio frequency processing device 20 has no fault.
When determining that the radio frequency processing device 20 has a fault, the monitoring device 12 may determine that the digital radio frequency signal device 100 has a fault in the current operation state, and the fault location is located in the radio frequency processing device 20, thereby terminating the loop self-test for the operation administrator to perform fault repair. When the monitoring device 12 determines that the rf processing device 20 has no fault, the monitoring device 12 controls the loop switch device 18 to disconnect the self-loop of the rf processing device 20, and the normal link connection of the rf processing device 20 is restored. Thereafter, the monitoring device 12 can instruct the digital processing device 16 to resume normal uplink and downlink signal processing functions, and continue daily operation.
By including the radio frequency processing device 20 in the link self-checking range, the fault state of the radio frequency processing device 20 can be determined, so that the fault detection range and the positioning accuracy of the fault position of the uplink and the downlink are improved, and the link self-checking reliability is improved.
Referring to fig. 3, in one embodiment, loop switch device 18 includes a first loop switch 182 and a second loop switch 184. The control terminals of the first loop switch 182 and the second loop switch 184 are respectively connected to the monitoring device 12. The transmit port and the receive port of the digital processing device 16 are connected by a first loop switch 182. The downstream output port and the upstream input port of the signal conversion device 14 are connected by a second loop switch 184.
Alternatively, the loop switch device 18 may be composed of two independent loop switches, and the first loop switch 182 and the second loop switch 184 respectively and independently control the self-loop and the self-loop disconnection of the digital processing device 16 and the signal conversion device 14 under the control of the monitoring device 12. The first loop switch 182 and the second loop may be the same type of signal switch, or may be two different types of signal switches, as long as the self-loop and the disconnection self-loop of the digital processing device 16 and the signal conversion device 14 can be reliably controlled under the control of the monitoring device 12. First loop switch 182 may be embedded in digital processing device 16, and configured as a switch module by software setting using internal logic of digital processing device 16, for example, to control the connection and disconnection between the transmitting port and the receiving port of digital processing device 16; the first loop switch 182 may also be disposed between the transmit port and the receive port of the digital processing device 16 by way of independent hardware, as long as the desired self-loop control can be achieved. The second loop switch 184 can be understood in the same way.
When the monitoring device 12 performs loop self-test control on the first self-test loop in which the digital processing device 16 is located, the monitoring device 12 controls the first loop switch 182 to turn on the transmitting port and the receiving port of the digital processing device 16, so as to form a first self-loop link, and to disconnect the link connection between the digital processing device 16 and the signal conversion device 14. When the monitoring device 12 determines that the digital processing device 16 is normal (i.e., there is no fault), the monitoring device 12 controls the first loop switch 182 to disconnect the transmitting port and the receiving port of the digital processing device 16, and controls the second loop switch 184 to turn on the downstream output port and the upstream input port of the signal conversion device 14, so as to form a second self-loop link, and disconnects the link connection between the signal conversion device 14 and a subsequent link unit (e.g., the rf device of the communication apparatus). The link units detected in the second self-loop link are the digital processing device 16 and the signal conversion device 14, and since the digital processing device 16 is determined to be normal in the loop self-test of the first self-loop link, when the loop self-test of the second self-loop link is performed, if a fault is found, the fault position can be determined to be located in the signal conversion device 14.
Through the independent arrangement of the first loop switch 182 and the second loop switch 184, the monitoring device 12 can control the on/off of the first loop switch 182 and the second loop switch 184, respectively, so as to realize the control of the self-loop and the off-loop of the digital processing device 16 and the signal conversion device 14, and the structure complexity of the original uplink and downlink is not increased, thereby simplifying the self-loop control logic.
In one embodiment, as shown in FIG. 3, the loop switch arrangement 18 further includes a third loop switch 186. The control terminal of the third loop switch 186 is connected to the monitoring device 12. The downstream output port and the upstream input port of the rf processing device 20 are connected through a third loop switch 186.
It is understood that when performing self-test of three self-loop links including the rf processing device 20, the loop switch device 18 may also be composed of three independent loop switches, and the first loop switch 182, the second loop switch 184 and the third loop switch 186 respectively control the self-loop and the disconnection self-loop of the digital processing device 16, the signal conversion device 14 and the rf processing device 20 independently under the control of the monitoring device 12. The third loop switch 186 may be disposed between the downlink output port and the uplink input port of the radio frequency processing device 20 in an independent hardware manner, for example, a signal switch is additionally disposed between the downlink output port and the uplink input port of the radio frequency processing device 20 to control the self-loop and the self-loop disconnection of the downlink output port and the uplink input port of the radio frequency processing device 20, so as to implement the self-loop control of the radio frequency processing device 20 and the recovery control of the normal link connection.
After the monitoring device 12 determines that the digital processing device 16 and the signal conversion device 14 are normal, the monitoring device 12 controls the second loop switch 184 to disconnect the downlink output port and the uplink input port of the signal conversion device 14, restores the normal link connection between the signal conversion device 14 and the radio frequency processing device 20, and controls the third loop switch 186 to be in communication, so as to form a third self-loop link, so as to disconnect the link connection between the radio frequency processing device 20 and the subsequent link unit (such as the antenna device of the communication apparatus). The link units detected in the third self-loop link are the digital processing device 16, the signal conversion device 14 and the radio frequency processing device 20, and since it is determined in the loop self-test of the first self-loop link that the digital processing device 16 is normal and it is determined in the loop self-test of the second self-loop link that both the digital processing device 16 and the signal conversion device 14 are normal, when the loop self-test of the third self-loop link is performed, if a fault is found, it can be determined that the fault position is located in the radio frequency processing device 20.
Through the independent arrangement of the first loop switch 182, the second loop switch 184 and the third loop switch 186, the monitoring device 12 can control the on/off of the first loop switch 182, the second loop switch 184 and the third loop switch 186 respectively, so as to realize the control of the self-loop and the self-loop disconnection of the digital processing device 16, the signal conversion device 14 and the radio frequency processing device 20, effectively expand the fault self-checking range of the uplink and the downlink, and further improve the self-checking reliability.
Referring to fig. 4, in one embodiment, the first loop switch 182 includes a first rf switch 1822 and a second rf switch 1824. The control terminals of the first rf switch 1822 and the second rf switch 1824 are respectively connected to the monitoring device 12. The moving terminal of the first rf switch 1822 is connected to the transmit port of the digital processing device 16. A first fixed end of the first rf switch 1822 is connected to the downstream input port of the signal conversion device 14. A second fixed end of the first rf switch 1822 is connected to a second fixed end of the second rf switch 1824. The moving terminal of the second rf switch 1824 is connected to the receiving port of the digital processing device 16. A first fixed end of the second rf switch 1824 is connected to the upstream output port of the signal conversion device 14.
It is understood that the link self-loop control can be realized by using a radio frequency switch. The radio frequency switch is provided with a movable end and a plurality of fixed ends, wherein the movable end can be closed with any fixed end to form a corresponding path, and can also be opened to form a corresponding open circuit with any fixed end. In a normal link connection state, the movable end and the first fixed end of the first rf switch 1822 are kept normally closed, and the movable end and the first fixed end of the second rf switch 1824 are kept normally closed, so as to ensure normal uplink signal transmission and downlink signal transmission between the digital processing device 16 and the signal conversion device 14. When the monitoring device 12 controls the first loop switch 182 to implement the self-loop control on the digital processing device 16, the control terminals of the first rf switch 1822 and the second rf switch 1824 may be controlled, for example, to output a forward control level signal to the control terminals of the first rf switch 1822 and the second rf switch 1824, so that the moving terminal of the first rf switch 1822 is closed to the second fixed terminal, and the moving terminal of the second rf switch 1824 is closed to the second fixed terminal, so as to implement the conduction between the transmitting port and the receiving port of the digital processing device 16, and the normal link connection between the digital processing device 16 and the signal conversion device 14 is disconnected.
When the monitoring apparatus 12 controls the first loop switch 182 to implement the self-loop of the digital processing apparatus 16, and recover the normal link connection control, the monitoring apparatus 12 may control the control terminals of the first rf switch 1822 and the second rf switch 1824, for example, output a reverse control level signal to the control terminals of the first rf switch 1822 and the second rf switch 1824, so that the moving terminal and the first fixed terminal of the first rf switch 1822 are normally closed, and the moving terminal and the first fixed terminal of the second rf switch 1824 are normally closed, thereby disconnecting the transmission port and the reception port of the digital processing apparatus 16, and recovering the normal link connection between the digital processing apparatus 16 and the signal conversion apparatus 14.
By applying the first rf switch 1822 and the second rf switch 1824, the control of the self-loop and the self-loop disconnection of the digital processing apparatus 16 can be reliably realized, the control is simple and convenient to realize, and the test cost is low.
In one embodiment, as shown in figure 4, the second loop switch 184 includes a third radio frequency switch 1842 and a fourth radio frequency switch 1844. The control terminals of the third rf switch 1842 and the fourth rf switch 1844 are respectively connected to the monitoring device 12. The moving end of the third rf switch 1842 is connected to the downstream output port of the signal conversion device 14. A first fixed end of the third rf switch 1842 is connected to a first fixed end of a fourth rf switch 1844. The moving terminal of the fourth rf switch 1844 is connected to the upstream input port of the signal conversion device 14.
It can be understood that, in a normal link connection state, the moving end and the first fixed end of the third rf switch 1842 are kept normally open, and the moving end and the first fixed end of the fourth rf switch 1844 are kept normally open, so as to ensure normal uplink signal transmission and downlink signal transmission between the signal conversion device 14 and the subsequent link unit; for example, when the downlink input end of the rear-stage link unit is connected to the second fixed end of the third rf switch 1842, and the uplink output end of the rear-stage link unit is connected to the second fixed end of the fourth rf switch 1844, the movable end and the second fixed end of the third rf switch 1842 are kept normally closed, and the movable end and the second fixed end of the fourth rf switch 1844 are kept normally closed.
In the process of controlling the second loop switch 184 to implement the self-loop control on the signal conversion device 14, the control processes of the third rf switch 1842 and the fourth rf switch 1844 may refer to the control processes of the first rf switch 1822 and the second rf switch 1824 in the foregoing embodiments, and the same process is understood and will not be described herein again. By applying the third rf switch 1842 and the fourth rf switch 1844, the control of the self-loop and the self-loop disconnection of the signal conversion device 14 can be reliably realized, the control is simple and convenient to realize, and the test cost is low.
In one embodiment, as shown in fig. 4, third loop switch 186 includes a fifth rf switch 1862 and a sixth rf switch 1864. The control terminals of the fifth rf switch 1862 and the sixth rf switch 1864 are respectively connected to the monitoring device 12. The moving end of the fifth rf switch 1862 is connected to the downlink output port of the rf processing apparatus 20. A first fixed terminal of the fifth rf switch 1862 is connected to a first fixed terminal of the sixth rf switch 1864. The moving end of the sixth rf switch 1864 is connected to the upstream input port of the rf processing apparatus 20.
It can be understood that, in a normal link connection state, the moving end and the first fixed end of the fifth rf switch 1862 are kept normally open, and the moving end and the first fixed end of the sixth rf switch 1864 are kept normally open, so as to ensure normal uplink signal transmission and downlink signal transmission between the rf processing device 20 and the subsequent link unit; for example, when the downlink input end of the rear link unit is connected to the second fixed end of the fifth rf switch 1862, and the uplink output end of the rear link unit is connected to the second fixed end of the sixth rf switch 1864, the movable end and the second fixed end of the fifth rf switch 1862 are kept normally closed, and the movable end and the second fixed end of the sixth rf switch 1864 are kept normally closed.
In the process of controlling the third loop switch 186 to implement the self-loop control on the rf processing device 20, the control processes of the fifth rf switch 1862 and the sixth rf switch 1864 of the monitoring device 12 may refer to the control processes of the first rf switch 1822 and the second rf switch 1824 in the foregoing embodiment, and similar understanding is performed, and details are not repeated here. Through the application of the fifth rf switch 1862 and the sixth rf switch 1864, the control of the self-loop and the disconnection self-loop of the rf processing apparatus 20 can be reliably realized, the control is simple and convenient to realize, and the test cost is low.
In an embodiment, as shown in fig. 4, the preset self-test signal is a test signal carrying information of a set characteristic sequence, and may be, but is not limited to, a test signal carrying information of an increasing arithmetic sequence, a decreasing arithmetic sequence, or an equivalent sequence, where the information may be a digital sequence or a text sequence. The internal structures of the digital processing device 16, the signal conversion device 14 and the rf processing device 20 can be divided into the following modules according to the uplink and downlink of the signal:
the digital processing device 16 may include a signal comparing module 162, a signal generating module 164, a downlink baseband processing module 166, an uplink baseband processing module 168, a signal receiving module 170, and the like, where the signal generating module 164 may generate a preset self-check signal, and output a downlink preset self-check signal from a transmitting end after being processed by the downlink baseband processing module 166. The signal receiving module 150 may receive the preset self-test signal output after being processed by the uplink baseband processing module 168, that is, the uplink preset self-test signal. The signal comparison module 162 may perform signal comparison on the pre-self-test signal provided by the signal generation module 164 and the pre-self-test signal provided by the signal reception module 170, for example, compare whether the set characteristic sequences carried by the two signals are consistent, whether the power difference is within the set power error range, and the like, so as to generate corresponding self-test results.
The signal conversion device 14 may include a D/a conversion module 142 and an a/D conversion module 144, and the D/a conversion module 142 is used for performing digital-to-analog conversion on the downlink signal. The a/D conversion module 144 is used for performing analog-to-digital conversion on the uplink signal. The rf processing device 20 may include a downlink rf link module 202 and an uplink rf link module 204. The downlink rf link module 202 is configured to perform frequency conversion, amplification, filtering, and other processing on the downlink signal. The uplink rf link module 204 is configured to perform frequency conversion, amplification, filtering, and other processing on the uplink signal. It can be understood that, when the foregoing rf processing apparatus 20 belongs to the digital rf signal device 100 in FDD (Frequency Division Duplex) mode, both the downlink rf link module 202 and the uplink rf link module 204 at least include a coupling circuit and a Frequency conversion circuit. When the rf processing apparatus 20 belongs to the digital rf signal device 100 in TDD (Time Division duplex) mode, both the downlink rf link module 202 and the uplink rf link module 204 at least include a coupling circuit.
In one embodiment, the monitoring device 12 may also be configured to perform a link status indication according to the self-test result. For example, the monitoring device 12 may indicate that the uplink and downlink of the digital rf signal apparatus 100 are normal at the current time when it is determined that there is no fault in the link. When determining that a fault exists in the link, the monitoring device 12 may indicate the fault location to remind an operation manager to perform fault repair. The monitoring apparatus 12 may implement the fault indication in the form of outputting a fault alarm signal to an external alarm, triggering the external alarm to perform the fault alarm, or outputting a fault alarm instruction to the operation management terminal, performing the fault indication using a user interface, or the like.
Referring to fig. 5, in an embodiment, a signal link detection method is further provided, which can be applied to the digital radio frequency signal apparatus 100, but is not limited to the above, to implement fault detection on a signal link. The signal link detection method includes the following steps S12 to S20:
s12, after receiving the self-checking instruction, indicating the loop switch device to control the transmission port and the receiving port of the digital processing device to be conducted, and forming a first self-loop link;
s14, instructing the digital processing device to output a test signal from the transmitting port to the receiving port, and performing loop self-test of the first self-loop link;
s16, if the digital processing device is determined to be normal according to the self-checking result corresponding to the first self-loop link, the loop switch device is instructed to disconnect the self-loop of the digital processing device, and the downlink output port and the uplink input port of the signal conversion device are controlled to be connected to form a second self-loop link;
s18, instructing the digital processing device to output a test signal from the transmitting port to the downlink input port of the signal conversion device, and performing loop self-test of the second self-loop link;
and S20, if the signal conversion device is determined to have a fault according to the self-checking result corresponding to the second self-loop link, ending the detection and prompting the fault.
The signal link is an uplink signal link and a downlink signal link provided by each component unit in the communication device with the digital radio frequency link. For a detailed explanation of the loop switching device, the digital processing device and the signal conversion device, reference may be made to the explanations of the embodiments of the digital rf signal apparatus 100. The device providing the self-checking control function of the signal link detection method may be the embedded host, or may be an external measurement and control device configured independently, as long as the required link self-checking control function can be provided. For convenience of explanation of the signal link detection method, the method is applied to the digital rf signal apparatus 100 as an example.
After the monitoring device receives the self-checking instruction, for example, the self-checking instruction provided by an operation manager from a background management terminal or the self-checking instruction issued from a network management server at regular time, the monitoring device instructs the loop switching device to conduct the transmitting port and the receiving port of the digital processing device, so that the digital processing device is looped around, thereby suspending the signal processing functions of the normal uplink and downlink, and forming a first looped link for self-checking. After the loop switching device completes the self-loop control of the digital processing device, the monitoring device instructs the digital processing device to generate and output a preset self-checking signal, namely the test signal, and the preset self-checking signal is output from a transmitting port of the digital processing device and looped back to a receiving port through the loop switching device; the digital processing device receives the preset self-checking signal and performs uplink processing, and compares whether the difference between the downlink preset self-checking signal and the uplink preset self-checking signal exists, so as to generate a self-checking result (namely, loop self-checking is opened) of a first self-loop link where the digital processing device is located. The uplink preset self-checking signal, namely the downlink preset self-checking signal is correspondingly obtained after the baseband processing and other processes in the digital processing device.
After the monitoring device obtains the self-checking result generated by the digital processing device, it is determined whether the digital processing device has a fault according to the self-checking result, for example, the self-checking result indicates that the downlink preset self-checking signal is inconsistent with the uplink preset self-checking signal (i.e., there is a difference, if the power of the uplink preset self-checking signal exceeds a set range, the carried information is lost, etc.), that is, it is determined that the digital processing device has a fault, otherwise, it is determined that the digital processing device has no fault. When the monitoring device determines that the digital processing device has no fault (namely normal), the monitoring device indicates the loop switching device to disconnect the self loop of the digital processing device and recover the link connection between the digital processing device and the signal conversion device; meanwhile, the loop switch device conducts a downlink output port and an uplink input port of the signal conversion device to enable the signal conversion device to carry out loop self-connection, so that the signal conversion function of normal uplink and downlink is suspended, and a second loop self-connection link is formed to be ready for self-detection.
After the loop switching device completes the self-loop control of the signal conversion device, the monitoring device instructs the digital processing device to generate and output a preset self-checking signal, the preset self-checking signal is output to a downlink input port of the signal conversion device from a transmitting port of the digital processing device, and is looped back to a receiving port of the digital processing device through the signal conversion device and the loop switching device, the digital processing device receives and performs uplink processing, and whether the difference between the downlink preset self-checking signal and the uplink preset self-checking signal exists or not is compared, so that a self-checking result of a second self-loop link where the digital processing device and the signal conversion device are located is output.
When the monitoring device determines that the signal conversion device has a fault, it may determine that the digital radio frequency signal device 100 has a fault in the current operation state, and the fault position is located in the signal conversion device, thereby terminating the loop self-test, and performing fault prompt to remind an operation administrator to perform fault repair. The monitoring device can realize fault indication in the forms of outputting a fault alarm signal to an external alarm, triggering the external alarm to carry out fault alarm, or outputting a fault alarm instruction to an operation management terminal to carry out fault indication and the like.
According to the signal link detection method, when the self-checking instruction is received, the loop switch device is indicated to control the digital processing device and the signal conversion device to carry out self-checking on the loops one by one along the signal downlink direction, and a corresponding self-checking result is generated. The monitoring device acquires a self-detection result generated by the digital processing device to determine whether the digital processing device and the signal conversion device have faults or not. Therefore, the fault detection of the signal link (including the uplink and the downlink) can be realized, the specific position (a digital processing device or a signal conversion device) of the fault can be accurately determined when the fault occurs, and the fault detection efficiency of the signal link is greatly improved.
Referring to fig. 6, in an embodiment, the method further includes step S15:
s15, if it is determined that the digital processing device has a failure based on the self-test result corresponding to the first self-loop link, the detection is terminated and a failure indication is performed.
It can be understood that, when performing loop self-inspection on the first self-loop link where the digital processing device is located, if the monitoring device determines that a fault exists according to the self-inspection result of the first self-loop link, that is, when a fault exists in the signal link and the fault position is located in the digital processing device, the monitoring device ends the detection and performs fault prompt to remind an operation manager to perform fault repair on the digital processing device, thereby improving the efficiency of signal link communication recovery.
Referring to fig. 7, in an embodiment, the method further includes step S21:
and S21, if the signal conversion device is determined to be normal according to the self-checking result corresponding to the second self-loop link, indicating the loop switch device to disconnect the self-loop of the signal conversion device, and prompting that the link is normal.
It can be understood that, when performing loop self-test on the second self-loop link where the digital processing device and the signal conversion device are located, if the monitoring device determines that there is no fault according to the self-test result of the second self-loop link, that is, the digital processing device and the signal conversion device are both normal in the signal link, the monitoring device instructs the loop switch device to disconnect the self-loop of the signal conversion device, and the normal link connection between the signal conversion device and the subsequent link unit is restored. The monitoring device can further perform link normal prompt to feed back that the current operation state of the signal link is normal, so that the signal link can be conveniently and rapidly recovered to normal signal uplink/downlink processing.
Referring to fig. 8, in an embodiment, the method further includes the following steps S22 to S26:
and S22, if the signal conversion device is determined to be normal according to the self-checking result corresponding to the second self-loop link, indicating the loop switch device to disconnect the self-loop of the signal conversion device, and controlling the downlink output port and the uplink input port of the radio frequency processing device to be conducted to form a third self-loop link.
It can be understood that, when performing self-checking on the signal link, the loop self-checking may also be performed on the rf processing apparatus located at the rear stage of the signal conversion apparatus (according to the signal downlink direction from the digital processing apparatus to the signal conversion apparatus). Specifically, after the loop self-checking of the first self-loop link and the second self-loop link is performed, and it is determined that the digital processing device and the signal conversion device are both normal, the monitoring device instructs the loop switch device to disconnect the self-loop of the signal conversion device, and instructs the loop switch device to control the downlink output port and the uplink input port of the radio frequency processing device to be connected, so as to form a third self-loop link.
And S24, instructing the digital processing device to output the test signal from the transmitting port to the downstream input port of the signal conversion device, and performing loop self-test of the third self-loop link.
After the loop switch device completes the self-loop control of the radio frequency processing device, the monitoring device instructs the digital processing device to generate and output a preset self-checking signal, the preset self-checking signal is output from a transmitting port of the digital processing device to a downlink input port of the signal conversion device, and the preset self-checking signal is looped back to a receiving port of the digital processing device through the signal conversion device, the radio frequency processing device and the loop switch device; and the digital processing device receives the corresponding uplink preset self-checking signal and performs uplink processing, and compares whether the downlink preset self-checking signal is different from the uplink preset self-checking signal or not so as to output a self-checking result of a third self-loop link in which the digital processing device, the signal conversion device and the radio frequency processing device are positioned.
And S26, if the radio frequency processing device is determined to have a fault according to the self-detection result corresponding to the third self-loop link, ending the detection and prompting the fault.
According to the self-checking result of the third self-loop link, when it is determined that the radio frequency processing device has a fault, the monitoring device may determine that the digital radio frequency signal device 100 has a fault in the current operation state, and the fault position is located in the radio frequency processing device, thereby terminating the loop self-checking, and performing fault prompt to remind an operation manager to perform fault repair.
Through the steps S22 to S26, the fault state of the rf processing apparatus can be determined, so as to improve the fault detection range and the positioning accuracy of the fault location of the uplink and the downlink, and improve the reliability of the link self-test.
In one embodiment, the above method further comprises the steps of:
and if the radio frequency processing device is determined to be normal according to the self-detection result corresponding to the third self-loop link, indicating the loop switch device to disconnect the self-loop of the radio frequency processing device, and prompting that the link is normal.
It can be understood that, when the digital processing device, the signal conversion device and the radio frequency processing device are in the third self-loop link, if the monitoring device determines that there is no fault according to the self-detection result of the third self-loop link, that is, the digital processing device, the signal conversion device and the radio frequency processing device in the signal link are all normal, the monitoring device instructs the loop switch device to disconnect the self-loop of the radio frequency processing device, and the normal link connection between the radio frequency processing device and the rear-stage link unit is restored. The monitoring device can further perform link normal prompt to feed back that the current operation state of the signal link is normal, so that the signal link can be conveniently and quickly recovered to normal signal uplink/downlink processing after self-detection.
In an embodiment, the test signal is a downlink digital signal carrying preset feature information. And the self-checking result is obtained by comparing the consistency of the preset characteristic information of the uplink digital signal and the test signal through the digital processing device. The upstream digital signal corresponds to the test signal.
The preset characteristic information is preset characteristic sequence information, and may be but is not limited to a test signal in which the information carried by the signal is an increasing arithmetic sequence, a decreasing arithmetic sequence or an equivalent sequence, and the information may be a digital sequence or a text sequence. It can be understood that, when the self-test of each stage of loop is performed successively on the signal link, the signal processing function provided inside the digital processing device is directly utilized to obtain the self-test result: the signal generating module can generate a preset self-checking signal, and the preset self-checking signal is processed by the downlink baseband processing module and then outputs a downlink preset self-checking signal (namely a downlink digital signal) from the transmitting end. The signal receiving module may receive a preset self-check signal output after being processed by the uplink baseband processing module, that is, an uplink digital signal corresponding to the downlink digital signal. The signal comparison module may perform signal comparison on the downlink digital signal provided by the signal generation module and the uplink digital signal provided by the signal reception module, for example, compare whether the set characteristic sequences carried by the two signals are consistent, whether the power difference is within a set power error range, and the like, so as to generate a corresponding self-checking result. Therefore, the link self-checking is effectively realized by utilizing the signal processing function of the digital processing device, and meanwhile, the signal comparison is realized without adopting a special external signal analysis instrument, so that the testing cost is low and the efficiency is high.
In one embodiment, when it is determined that the digital processing device, the signal conversion device or the radio frequency processing device is normal according to the respective detection results, the method further includes the steps of:
indicating the counting value of a preset counter to be increased by 1; the preset counter is used for indicating the end of the self-checking process when the count value reaches a threshold value.
It will be appreciated that the preset counter described above may be, but is not limited to being, derived using a counter setting provided on a digital board. The threshold may be a count overflow limit of a preset counter, and may be set according to the number of self-loop links that need to perform self-checking on the signal link, for example, 2 (corresponding to the first self-loop link and the second self-loop link described above) or 3 (corresponding to the first self-loop link to the third self-loop link described above). Optionally, when receiving the self-checking instruction, the monitoring device may initialize the preset counter, and clear the initial count value of the preset counter.
After the monitoring device performs self-checking control on a first self-loop link where the digital processing device is located, the monitoring device determines that the digital processing device is normal, and then the monitoring device synchronously indicates that the count value of the preset counter is increased by 1, and starts to perform self-checking control on a second self-loop link where the digital processing device and the signal conversion device are located. And after the monitoring device performs self-checking control on the second self-loop link, if the digital processing device and the signal conversion device are determined to be normal, the monitoring device synchronously indicates that the count value of the preset counter is increased by 1. At this time, if the threshold of the preset counter is 2, that is, only the self-checking of the two self-loop links is performed, the count value of the preset counter reaches the threshold, and the monitoring device is triggered to end the self-checking process, so as to recover the normal signal link function.
If the threshold value of the preset counter is 3, the self-checking of the three self-loop links is performed, and then the monitoring device starts to perform self-checking control on a third self-loop link where the digital processing device, the signal conversion device and the radio frequency processing device are located. And after the monitoring device performs self-checking control on the third self-loop link and determines that the digital processing device, the signal conversion device and the radio frequency processing device are normal, the monitoring device synchronously indicates that the count value of the preset counter is increased by 1. At this time, the count value of the preset counter reaches the threshold value, and the monitoring device is triggered to end the self-checking process so as to recover the normal signal link function.
By applying the preset counter, the current loop self-checking progress can be automatically recorded, and when all units of the signal link are determined to be free of faults through self-checking, the self-checking process is automatically indicated to be finished, and the normal signal link function is quickly recovered.
It should be understood that although the various steps in the flow charts of fig. 5-8 are shown in order as indicated by the arrows, the steps are not necessarily performed in order as indicated by the arrows. The steps are not performed in the exact order shown and described, and may be performed in other orders, unless explicitly stated otherwise. Moreover, at least some of the steps in fig. 5-8 may include multiple sub-steps or multiple stages that are not necessarily performed at the same time, but may be performed at different times, and the order of performance of the sub-steps or stages is not necessarily sequential, but may be performed in turn or alternating with other steps or at least some of the sub-steps or stages of other steps.
Referring to fig. 9, in an embodiment, a signal link detection apparatus 200 is further provided, which includes a first self-loop module 11, a first indication module 13, a second self-loop module 15, a second indication module 17, and a fault indication module 19. The first self-loop module 11 is configured to, after receiving the self-checking instruction, instruct the loop switch device to control the transmission port and the reception port of the digital processing device to be turned on, so as to form a first self-loop link. The first indicating module 13 is configured to instruct the digital processing apparatus to output a test signal from the transmitting port to the receiving port, and perform loop self-test of the first self-loop link. The second self-loop module 15 is configured to instruct the loop switch device to disconnect the self-loop of the digital processing apparatus and control the downlink output port and the uplink input port of the signal conversion apparatus to be connected to form a second self-loop link when the digital processing apparatus is determined to be normal according to the self-detection result corresponding to the first self-loop link. The second indicating module 17 is configured to instruct the digital processing apparatus to output a test signal from the transmitting port to the downlink input port of the signal conversion apparatus, and perform loop self-test on the second self-loop link. The fault prompting module 19 is configured to end the detection and perform fault prompting when it is determined that the signal conversion apparatus has a fault according to a self-checking result corresponding to the second self-loop link.
When the signal link detection device 200 receives the self-checking instruction, the loop switch device is instructed to control the digital processing device and the signal conversion device to self-loop in sequence, and the digital processing device is instructed to perform loop self-checking one by one along the signal downlink direction and generate a corresponding self-checking result. The monitoring device acquires a self-detection result generated by the digital processing device to determine whether the digital processing device and the signal conversion device have faults or not. Therefore, the fault detection of the signal link (including the uplink and the downlink) can be realized, the specific position (a digital processing device or a signal conversion device) of the fault can be accurately determined when the fault occurs, and the fault detection efficiency of the signal link is greatly improved.
In one embodiment, the failure prompt module 19 is further configured to end the detection and perform failure prompt when it is determined that the digital processing apparatus has a failure according to the self-detection result corresponding to the first self-loop link.
In one embodiment, the signal link detection apparatus 200 further includes a third indication module, configured to instruct the loop switch apparatus to disconnect the self loop of the signal conversion apparatus and prompt that the link is normal when the signal conversion apparatus is determined to be normal according to the self-test result corresponding to the second self-loop link.
In an embodiment, the second self-loop module 15 is further configured to instruct the loop switch device to disconnect the self-loop of the signal conversion device and control the downlink output port and the uplink input port of the radio frequency processing device to be connected to form a third self-loop link when it is determined that the signal conversion device is normal according to the self-test result corresponding to the second self-loop link. The second indicating module 17 is further configured to instruct the digital processing apparatus to output a test signal from the transmitting port to the downstream input port of the signal conversion apparatus, so as to perform loop self-test on the third self-loop link. The fault prompting module 19 is further configured to end the detection and perform fault prompting when it is determined that the radio frequency processing apparatus has a fault according to the self-detection result corresponding to the third self-loop link.
In one embodiment, the third indicating module is further configured to instruct the loop switch device to disconnect the self-loop of the radio frequency processing device and perform link normal prompt when it is determined that the radio frequency processing device is normal according to the self-detection result corresponding to the third self-loop link.
In one embodiment, the signal link detection apparatus 200 further includes a counting module, configured to instruct a preset counter to increment a count value by 1 when determining that the digital processing apparatus, the signal conversion apparatus, or the radio frequency processing apparatus is normal according to respective detection results; the preset counter is used for indicating the end of the self-checking process when the count value reaches a threshold value.
For specific limitations of the signal link detection apparatus 200, reference may be made to the above limitations of the signal link detection method, which are not described herein again. The various modules in the signal link detection apparatus 200 described above may be implemented in whole or in part by software, hardware, and combinations thereof.
In one embodiment, a communication device is provided, which may be, but is not limited to, a base station. The communication device includes at least a processor, a memory, and a network interface connected by a system bus. Wherein the processor of the communication device is configured to provide computing and control capabilities. The memory of the communication device comprises a nonvolatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of an operating system and computer programs in the non-volatile storage medium. The network interface of the communication device is used for communicating with a core network or a terminal through a network connection.
The computer program when executed by a processor implements the steps of: after receiving the self-checking instruction, indicating a loop switch device to control a transmitting port and a receiving port of the digital processing device to be conducted to form a first self-loop link; instructing the digital processing device to output a test signal from the transmitting port to the receiving port, and performing loop self-test of the first self-loop link; if the digital processing device is determined to be normal according to the self-detection result corresponding to the first self-loop link, indicating the loop switch device to disconnect the self-loop of the digital processing device and controlling the downlink output port and the uplink input port of the signal conversion device to be connected to form a second self-loop link; instructing the digital processing device to output a test signal from the transmitting port to a downlink input port of the signal conversion device, and performing loop self-test of a second self-loop link; and if the signal conversion device is determined to have a fault according to the self-checking result corresponding to the second self-loop link, finishing detection and performing fault prompt.
In one embodiment, the aforementioned computer program, when executed by the processor, may further implement the additional steps or sub-steps of the signal link detection method in the above embodiments.
In one embodiment, a computer-readable storage medium is provided, having a computer program stored thereon, which when executed by a processor, performs the steps of: after receiving the self-checking instruction, indicating a loop switch device to control a transmitting port and a receiving port of the digital processing device to be conducted to form a first self-loop link; instructing the digital processing device to output a test signal from the transmitting port to the receiving port, and performing loop self-test of the first self-loop link; if the digital processing device is determined to be normal according to the self-detection result corresponding to the first self-loop link, indicating the loop switch device to disconnect the self-loop of the digital processing device and controlling the downlink output port and the uplink input port of the signal conversion device to be connected to form a second self-loop link; instructing the digital processing device to output a test signal from the transmitting port to a downlink input port of the signal conversion device, and performing loop self-test of a second self-loop link; and if the signal conversion device is determined to have a fault according to the self-checking result corresponding to the second self-loop link, finishing detection and performing fault prompt.
In one embodiment, the aforementioned computer program, when executed by the processor, may further implement the additional steps or sub-steps of the signal link detection method in the above embodiments.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by hardware related to instructions of a computer program, which can be stored in a non-volatile computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. Any reference to memory, storage, database, or other medium used in the embodiments provided herein may include non-volatile and/or volatile memory, among others. Non-volatile memory can include read-only memory (ROM), Programmable ROM (PROM), Electrically Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), Double Data Rate SDRAM (DDRSDRAM), Enhanced SDRAM (ESDRAM), Synchronous Link DRAM (SLDRAM), Rambus Direct RAM (RDRAM), direct bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above examples only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims (15)

1. A digital radio frequency signal device is characterized by comprising a monitoring device, a digital processing device, a signal conversion device and a loop switch device, wherein the control ends of the digital processing device and the loop switch device are respectively connected with the monitoring device; the transmitting port of the digital processing device is connected with the downlink input port of the signal conversion device, the receiving port of the digital processing device is connected with the uplink output port of the signal conversion device, and the transmitting port and the receiving port of the digital processing device are connected through a loop switch device;
the loop switch device is used for controlling the digital processing device and the signal conversion device to loop in sequence according to the control of the monitoring device; the digital processing device is used for performing self-checking on the first self-loop link when the loop switching device controls the transmission port and the receiving port to be conducted to form a first self-loop link according to the control of the monitoring device, and for disconnecting the self-loop of the digital processing device at the loop switching device to control the downlink output port and the uplink input port of the signal conversion device to be conducted to form a second self-loop link, performing self-checking on the second self-loop link and respectively generating self-checking results corresponding to the respective loop links;
and the monitoring device is used for determining whether each self-loop link has a fault according to each self-detection result.
2. The digital radio frequency signal device according to claim 1, wherein the loop switch means comprises a first loop switch and a second loop switch, control terminals of the first loop switch and the second loop switch are respectively connected to the monitoring means;
the transmitting port and the receiving port of the digital processing device are connected through the first loop switch, and the downlink output port and the uplink input port of the signal conversion device are connected through the second loop switch.
3. The digital radio frequency signal device according to claim 2, wherein the first loop switch comprises a first radio frequency switch and a second radio frequency switch, and control terminals of the first radio frequency switch and the second radio frequency switch are respectively connected to the monitoring apparatus;
the movable end of the first radio frequency switch is connected with the transmitting port of the digital processing device, the first fixed end of the first radio frequency switch is connected with the downlink input port of the signal conversion device, and the second fixed end of the first radio frequency switch is connected with the second fixed end of the second radio frequency switch;
the movable end of the second radio frequency switch is connected with the receiving port of the digital processing device, and the first fixed end of the second radio frequency switch is connected with the uplink output port of the signal conversion device.
4. The digital radio frequency signal device according to claim 2, wherein the second loop switch comprises a third radio frequency switch and a fourth radio frequency switch, and control terminals of the third radio frequency switch and the fourth radio frequency switch are respectively connected with the monitoring apparatus;
the movable end of the third radio frequency switch is connected with the downlink output port of the signal conversion device, the first fixed end of the third radio frequency switch is connected with the first fixed end of the fourth radio frequency switch, and the movable end of the fourth radio frequency switch is connected with the uplink input port of the signal conversion device.
5. The digital radio frequency signal device according to any one of claims 2 to 4, further comprising a radio frequency processing device, wherein a downstream input port of the radio frequency processing device is connected to a downstream output port of the signal conversion device, and an upstream output port of the radio frequency processing device is connected to an upstream input port of the signal conversion device;
the downlink output port and the uplink input port of the radio frequency processing device are connected through the loop switch device;
and the monitoring device is also used for controlling the self-loop of the radio frequency processing device through the loop switch after the digital processing device and the signal conversion device are determined to be normal, instructing the digital processing device to carry out loop self-test and determining whether the radio frequency processing device has a fault.
6. The digital radio frequency signal device according to claim 5, wherein the loop switch means further comprises a third loop switch, a control terminal of the third loop switch is connected to the monitoring means;
and the downlink output port and the uplink input port of the radio frequency processing device are connected through the third loop switch.
7. The digital radio frequency signal device according to claim 6, wherein the third loop switch comprises a fifth radio frequency switch and a sixth radio frequency switch, and control terminals of the fifth radio frequency switch and the sixth radio frequency switch are respectively connected to the monitoring apparatus;
the movable end of the fifth radio frequency switch is connected with the downlink output port of the radio frequency processing device, the first fixed end of the fifth radio frequency switch is connected with the first fixed end of the sixth radio frequency switch, and the movable end of the sixth radio frequency switch is connected with the uplink input port of the radio frequency processing device.
8. A method for signal link detection, comprising:
after receiving the self-checking instruction, indicating a loop switch device to control a transmitting port and a receiving port of the digital processing device to be conducted to form a first self-loop link;
instructing the digital processing device to output a test signal from a transmitting port to a receiving port to perform loop self-test of the first self-loop link;
if the digital processing device is determined to be normal according to the self-detection result corresponding to the first self-loop link, indicating the loop switch device to disconnect the self-loop of the digital processing device, and controlling a downlink output port and an uplink input port of a signal conversion device to be connected to form a second self-loop link;
instructing the digital processing device to output the test signal from a transmitting port to a downlink input port of the signal conversion device to perform loop self-test of the second self-loop link;
if the signal conversion device is determined to have a fault according to the self-detection result corresponding to the second self-loop link, finishing detection and performing fault prompt;
the transmitting port of the digital processing device is connected with the downlink input port of the signal conversion device, the receiving port of the digital processing device is connected with the uplink output port of the signal conversion device, and the transmitting port and the receiving port of the digital processing device are connected through the loop switch device.
9. The signal link detection method of claim 8, further comprising:
and if the digital processing device is determined to have a fault according to the self-detection result corresponding to the first self-loop link, finishing detection and performing fault prompt.
10. The signal link detection method of claim 8, further comprising:
and if the signal conversion device is determined to be normal according to the self-detection result corresponding to the second self-loop link, indicating the loop switch device to disconnect the self-loop of the signal conversion device and prompting the link to be normal.
11. The signal link detection method according to claim 8 or 9, characterized in that the method further comprises:
if the signal conversion device is determined to be normal according to the self-detection result corresponding to the second self-loop link, the loop switch device is instructed to disconnect the self-loop of the signal conversion device, and a downlink output port and an uplink input port of the radio frequency processing device are controlled to be connected to form a third self-loop link;
instructing the digital processing device to output the test signal from a transmitting port to a downlink input port of the signal conversion device to perform loop self-test of the third self-loop link;
and if the radio frequency processing device is determined to have a fault according to the self-detection result corresponding to the third self-loop link, finishing detection and performing fault prompt.
12. The signal link detection method of claim 11, further comprising:
and if the radio frequency processing device is determined to be normal according to the self-detection result corresponding to the third self-loop link, indicating the loop switching device to disconnect the self-loop of the radio frequency processing device and prompting the link to be normal.
13. The signal link detection method of claim 12, wherein when it is determined that the digital processing device, the signal conversion device, or the rf processing device is normal according to each of the self-test results, the method further comprises:
indicating the counting value of a preset counter to be increased by 1; and the preset counter is used for indicating the end of the self-checking process when the count value reaches a threshold value.
14. A signal link detection apparatus, comprising:
the first self-loop module is used for indicating the loop switching device to control the transmission port and the receiving port of the digital processing device to be conducted after receiving the self-checking instruction so as to form a first self-loop link;
the first indicating module is used for indicating the digital processing device to output a test signal from a transmitting port to a receiving port and carrying out loop self-detection on the first self-loop link;
the second self-loop module is used for indicating the loop switch device to disconnect the self-loop of the digital processing device and controlling the downlink output port and the uplink input port of the signal conversion device to be connected to form a second self-loop link when the digital processing device is determined to be normal according to the self-detection result corresponding to the first self-loop link;
the second indicating module is used for indicating the digital processing device to output the test signal from a transmitting port to a downlink input port of the signal conversion device so as to perform loop self-test of the second self-loop link;
the fault prompting module is used for finishing detection and performing fault prompting when the signal conversion device is determined to have a fault according to a self-detection result corresponding to the second self-loop link;
the transmitting port of the digital processing device is connected with the downlink input port of the signal conversion device, the receiving port of the digital processing device is connected with the uplink output port of the signal conversion device, and the transmitting port and the receiving port of the digital processing device are connected through the loop switch device.
15. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the signal link detection method according to any one of claims 8 to 13.
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CN112564827B (en) * 2020-12-02 2023-08-08 展讯半导体(成都)有限公司 Method, apparatus, device, medium and program product for detecting device receiving performance
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