CN109474271A - A kind of high-speed bidirectional logic level converting circuit - Google Patents
A kind of high-speed bidirectional logic level converting circuit Download PDFInfo
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- CN109474271A CN109474271A CN201811611185.4A CN201811611185A CN109474271A CN 109474271 A CN109474271 A CN 109474271A CN 201811611185 A CN201811611185 A CN 201811611185A CN 109474271 A CN109474271 A CN 109474271A
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- logic
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018507—Interface arrangements
Abstract
The present invention discloses a kind of high-speed bidirectional logic level converting circuit, it is therefore intended that finds the implementation of more efficiently high-speed bidirectional logic level transition comprising low logic voltage level input/output terminal DVL, high voltage logic level input/output terminal DVH, logic level control module, low-pressure end pull-up module, high-voltage end pull-up module, level rise accelerating module, logic low voltage VL, logic high voltage VH, parasitic capacitance CL1 and parasitic capacitance CL2.The present invention rises the presence of the metal-oxide-semiconductor Q2 and metal-oxide-semiconductor Q3 of accelerating module by level, greatly overcomes influence of the parasitic capacitance to level rise saltus step, realizes logic low voltage VLWith logic high voltage VHHigh-speed bidirectional logic level transition, reliable and stable, realization facilitate, are low in cost, meet the requirement of high frequency signal transmission to a certain extent.
Description
Technical field
The present invention relates to field of electronic circuitry, specifically, the present invention relates to a kind of high-speed bidirectional logic level transition electricity
Road.
Background technique
In digital circuit, the communication between homologous ray is not essential.The complexity of electronic system is continuous now
Improve, logic voltage constantly declines so that between system or internal system logic unit to output and input level inconsistent,
For example, a kind of situation common in circuit design is the company between the digital circuit of 1.8V power supply and the analog circuit of 3.3V power supply
It connects, there are also the connections with common TTL5V logic level.This is just to the requirement that proposes of logic level transition, and with patrolling
Volume voltage constantly reduces, signal frequency constantly increases, and the requirement to level shifting circuit also increasingly improves.
Although having some level conversion devices in the market, their universal package dimensions are big, pin is more, and use is less square
Just, and chip cost is high, actually uses unsatisfactory.There are also simple bidirectional level conversion circuit in industry,
Such as common open drain circuit scheme shown in FIG. 1, in addition, it is contemplated that common open drain circuit can band in nonideality
Parasitic capacitance is equivalent to parasitic capacitance C1 and parasitic capacitance C2 herein namely this is general by the parasitic capacitance come for ease of description
Logical open drain circuit includes metal-oxide-semiconductor Q, resistance RY1, resistance RY2, parasitic capacitance C1, parasitic capacitance C2, low logic voltage level
Input/output terminal DVL, high voltage logic level input/output terminal DVH, logic low voltage VLAnd logic high voltage VH, wherein metal-oxide-semiconductor Q
Grid G and logic low voltage VLConnection, source S and logic level input/output terminal DVLConnection, drain D and high voltage logic level
Input/output terminal DVHConnection；One end of resistance RY1 and logic low voltage VLConnection, it is defeated with logic level that the other end is connected to source S
Enter output end DVLJunction；One end of resistance RY2 and logic high voltage VHConnection, the other end are connected to drain D and patrol with high voltage
Collect level input/output terminal DVHJunction；One end of parasitic capacitance C1 is connected to source S and logic level input/output terminal DVL
Junction, the other end ground connection；One end of parasitic capacitance C2 is connected to drain D and high voltage logic level input/output terminal DVH's
Junction, other end ground connection.In view of there are parasitic capacitance C1 and parasitic capacitance C2, capacitances one in the common open-drain
As be 50pF, therefore when voltage is jumped from low level to high level, indeed through resistance RY1 or resistance RY2 to parasitism
The process of capacitor C1 or parasitic capacitance C2 charging, RC time constant will limit rate of voltage rise, to limit valid data speed
Rate, illustratively as illustrated in fig. 2, it is assumed that parasitic capacitance is 50pF, resistance RY1, resistance RY2 use 4.7K, when from logic voltage
When 3.3V jumps to logic voltage 5.0V, voltage rising time tr will be close to 800ns's namely adjacent signal period 2000ns
Half.So this scheme is in high speed logic level bi-directional conversion, it is easy to appear communications errors.
Summary of the invention
In order to find the implementation of more efficiently high-speed bidirectional logic level transition, the embodiment of the invention provides one
Kind high-speed bidirectional logic level converting circuit.
To achieve the above object, a kind of high-speed bidirectional logic level converting circuit of the embodiment of the present invention comprising low-voltage
Logic level input/output terminal DVL, high voltage logic level input/output terminal DVH, logic level control module, low-pressure end pull-up
Module, high-voltage end pull-up module, level rise accelerating module, logic low voltage VL, logic high voltage VH, parasitic capacitance CL1 and parasitism
Capacitor CL2, wherein
The low logic voltage level input/output terminal DVL, high voltage logic level input/output terminal DVH, logic low voltage VL
And logic high voltage VHRise accelerating module with the level respectively to connect；
The low logic voltage level input/output terminal DVL, high voltage logic level input/output terminal DVHAnd logic low
Press VLIt is connect respectively with the logic level control module；
One end of the low-pressure end pull-up module and the logic low voltage VLConnection, the other end and low logic voltage electricity
Flat input/output terminal DVLConnection；One end of the high-voltage end pull-up module and the logic high voltage VHConnection, the other end with it is described
High voltage logic level input/output terminal DVHConnection；
One end of the parasitic capacitance CL1 is connected to the logic level control module and the logic level input and output
Hold DVLJunction, the other end ground connection；
One end of the parasitic capacitance CL2 is connected to the logic level control module and the input of high voltage logic level is defeated
Outlet DVHJunction, the other end ground connection.
Preferably, the logic level control module is the metal-oxide-semiconductor Q1 of a N-channel, the grid G 1 of the metal-oxide-semiconductor Q1 and institute
State logic low voltage VLConnection, source S 1 and the logic level input/output terminal DVLConnection, drain D 1 and the high voltage logic
Level input/output terminal DVHConnection.
Preferably, it includes metal-oxide-semiconductor Q2 and metal-oxide-semiconductor Q3 that the level, which rises accelerating module, wherein
The drain D 2 of the metal-oxide-semiconductor Q2 and the logic low voltage VLConnection, source S 2 and the low logic voltage level are defeated
Enter output end DVLConnection, grid G 2 be connected to the metal-oxide-semiconductor Q1 drain D 1 and the high voltage logic level input/output terminal
DVHJunction；
The grid G 3 of the metal-oxide-semiconductor Q3 be connected to the metal-oxide-semiconductor Q1 source S 1 and the logic level input/output terminal
DVLJunction, drain D 3 and the logic high voltage VHConnection, source S 3 be connected to the metal-oxide-semiconductor Q1 drain D 1 and the height
Voltage logic level input/output terminal DVHJunction.
Preferably, the low-pressure end pull-up module includes resistance R1, one end of the resistance R1 and the logic low voltage VL
Connection, the other end and the low logic voltage level input/output terminal DVLConnection.
Preferably, the high-voltage end pull-up module includes resistance R2, one end of the resistance R2 and the logic high voltage VH
Connection, the other end and the high voltage logic level input/output terminal DVHConnection.
With the prior art, a kind of high-speed bidirectional logic level converting circuit of the embodiment of the present invention is had the following beneficial effects:
A kind of high-speed bidirectional logic level converting circuit of the embodiment of the present invention rises the metal-oxide-semiconductor Q2 of accelerating module by level
With the presence of metal-oxide-semiconductor Q3, influence of the parasitic capacitance to level rise saltus step is greatly overcome, logic low voltage V is realizedLWith patrol
Collect high pressure VHHigh-speed bidirectional logic level transition, reliable and stable, realization facilitate, are low in cost, meet high frequency to a certain extent
The requirement of signal transmission.
The additional aspect of the present invention and advantage will be set forth in part in the description, these will become from the following description
Obviously, or practice through the invention is recognized.
Detailed description of the invention
Above-mentioned and/or additional aspect and advantage of the invention will become from the following description of the accompanying drawings of embodiments
Obviously and it is readily appreciated that, in which:
Fig. 1 is the structural schematic diagram of common open drain circuit in the prior art；
When Fig. 2 is that voltage when logic low voltage is jumped to logic high voltage in common open drain circuit in the prior art rises
Between tr schematic diagram；
Fig. 3 is a kind of electrical block diagram of high-speed bidirectional logic level converting circuit of the embodiment of the present invention；
Fig. 4 is that logic low voltage is jumped to logic high voltage in a kind of high-speed bidirectional logic level converting circuit of the embodiment of the present invention
When voltage rising time tr schematic diagram.
Identifier declaration in figure:
101, logic level control module；103, level rises accelerating module；105, low-pressure end pull-up module；107, high pressure
Hold pull-up module.
Specific embodiment
The embodiment of the present invention is described below in detail, examples of the embodiments are shown in the accompanying drawings, wherein from beginning to end
Same or similar label indicates same or similar element or element with the same or similar functions.Below with reference to attached
The embodiment of figure description is exemplary, and for explaining only the invention, and is not construed as limiting the claims.
Referring to Fig. 3, a kind of high-speed bidirectional logic level converting circuit of the embodiment of the present invention, it is contemplated that common open-drain
Parasitic capacitance is equivalent to parasitic capacitance CL1 herein for ease of description in nonideality meeting bring parasitic capacitance by circuit
It include low logic voltage level input/output terminal D with parasitic capacitance CL2 namely high-speed bidirectional logic level converting circuitVL, high electricity
Press logic level input/output terminal DVH, logic level control module 101, low-pressure end pull-up module 105, high-voltage end pull-up module
107, level rises accelerating module 103, logic low voltage VL, logic high voltage VH, parasitic capacitance CL1 and parasitic capacitance CL2, wherein
Low logic voltage level input/output terminal DVL, high voltage logic level input/output terminal DVH, logic low voltage VLAnd logic high voltage
VHRise accelerating module 103 with level respectively to connect；Low logic voltage level input/output terminal DVL, high voltage logic level input
Output end DVHAnd logic low voltage VLIt is connect respectively with logic level control module 101；
One end of low-pressure end pull-up module 105 and logic low voltage VLConnection, the other end input defeated with low logic voltage level
Outlet DVLConnection；One end of high-voltage end pull-up module 107 and logic high voltage VHConnection, the other end and high voltage logic level input
Output end DVHConnection；
One end of parasitic capacitance CL1 is connected to logic level control module 101 and logic level input/output terminal DVLCompany
Connect place, other end ground connection；One end of parasitic capacitance CL2 is connected to logic level control module 101 and high voltage logic level is defeated
Enter output end DVHJunction, the other end ground connection.
In some embodiments, logic level control module 101 is the metal-oxide-semiconductor Q1 of a N-channel, the grid of metal-oxide-semiconductor Q1
Pole G1 and logic low voltage VLConnection, source S 1 and logic level input/output terminal DVLConnection, drain D 1 and high voltage logic level
Input/output terminal DVHConnection.
In some embodiments, it includes metal-oxide-semiconductor Q2 and metal-oxide-semiconductor Q3 that level, which rises accelerating module 103, wherein metal-oxide-semiconductor Q2
Drain D 2 and logic low voltage VLConnection, source S 2 and low logic voltage level input/output terminal DVLConnection, grid G 2 are connected to
The drain D 1 and high voltage logic level input/output terminal D of metal-oxide-semiconductor Q1VHJunction；The grid G 3 of metal-oxide-semiconductor Q3 is connected to MOS
The source S 1 and logic level input/output terminal D of pipe Q1VLJunction, drain D 3 and logic high voltage VHConnection, source S 3 connect
In the drain D 1 and high voltage logic level input/output terminal D of metal-oxide-semiconductor Q1VHJunction.
Preferably, low-pressure end pull-up module 105 includes resistance R1, one end of resistance R1 and logic low voltage VLConnection, separately
One end and low logic voltage level input/output terminal DVLConnection.High-voltage end pull-up module 107 include resistance R2, the one of resistance R2
End and logic high voltage VHConnection, the other end and high voltage logic level input/output terminal DVHConnection.
A kind of high-speed bidirectional logic level converting circuit of the embodiment of the present invention for ease of understanding, its work of brief description are former
Reason:
As low logic voltage level input/output terminal DVLWhen input low level, the V of metal-oxide-semiconductor Q1GSFor positive voltage, metal-oxide-semiconductor Q1
It is connected immediately, source S 1 and drain D 1 are equivalent to short circuit, then high voltage logic level input/output terminal DVHAlso it immediately becomes low
Level, low logic voltage level input/output terminal DVLSupreme voltage logic level input/output terminal DVHLogic level obtains correctly
Transmitting；
As low logic voltage level input/output terminal DVLWhen input high level, the V of metal-oxide-semiconductor Q1GSFor no-voltage, metal-oxide-semiconductor Q1
End immediately, source S 1 and drain D 1 are equivalent to open circuit.The V of metal-oxide-semiconductor Q3 simultaneouslyGSFor positive voltage, metal-oxide-semiconductor Q3 is connected immediately, source
Pole S3 and drain D 3 are equivalent to short circuit (conducting resistance RDSLess than 1 ohm), logic high voltage VH just passes through conducting resistance RDSTo parasitism
Capacitor CL2 charging, because of charging constant, τ=RDS* CL2 is very small, makes high voltage logic level input/output terminal DVHIt jumps immediately
For logic high voltage VH, the V of metal-oxide-semiconductor Q3 at this timeGSBecome negative voltage, metal-oxide-semiconductor Q3 ends immediately, and source S 3 and drain D 3 are equivalent to disconnected
Road, but because with the presence of resistance R2, high voltage logic level input/output terminal DVHStill high level can be maintained, low-voltage is patrolled
Collect level input/output terminal DVLSupreme voltage logic level input/output terminal DVHLogic level is correctly transmitted.
As high voltage logic level input/output terminal DVHWhen input low level, low logic voltage level input/output terminal DVL
Original state be high level, the V of metal-oxide-semiconductor Q1GSFor no-voltage, metal-oxide-semiconductor Q1 is in off state.At this time because of the electricity of source S 1
Pressure is higher than the voltage of drain D 1, and the body diode forward conduction of metal-oxide-semiconductor Q1, then source S 1 will be rapid by the drop-down level of drain D 1
Decline, leads to its VGSIt gradually rises, as the V of metal-oxide-semiconductor Q1GSWhen reaching the turn-on threshold voltage of metal-oxide-semiconductor, metal-oxide-semiconductor Q1 conducting, source
Pole S1 and drain D 1 are equivalent to short circuit, then low logic voltage level input/output terminal DVLBecome low level, high voltage logic electricity
Flat input/output terminal DVHTo low logic voltage level input/output terminal DVLLogic level is correctly transmitted；
As high voltage logic level input/output terminal DVHWhen input high level, source S 1 and drain D 1 are equivalent to open circuit.Together
When metal-oxide-semiconductor Q2 VGSFor positive voltage, metal-oxide-semiconductor Q2 is connected immediately, and source S 2 and drain D 2 are equivalent to short circuit (conducting resistance RDSIt is small
In 1 ohm), low logic voltage level input/output terminal VL just passes through RDSIt charges to parasitic capacitance CL1, because charging constant, τ=
RDS* CL1 is very small, makes low logic voltage level input/output terminal DVLJump immediately is logic high voltage VH, circuit reaches balance, low
Voltage logic level input/output terminal DVLMaintain high level, high voltage logic level input/output terminal DVHTo low logic voltage electricity
Flat input/output terminal DVLLogic level is correctly transmitted.
Referring to Fig. 4, Fig. 4 is shown in a kind of high-speed bidirectional logic level converting circuit of the embodiment of the present invention by logic low
Voltage rising time tr schematic diagram when pressure 3.3V is jumped to logic high voltage 5.0V, as can be seen from Figure 4 in level conversion mistake
Cheng Zhong greatly overcomes parasitic capacitance pair because there is level to rise the presence of metal-oxide-semiconductor Q2 and metal-oxide-semiconductor Q3 in accelerating module 103
The influence of level rise saltus step, level rises the turn-on time for being dependent only on metal-oxide-semiconductor, and this rise time can pass through choosing
It takes suitable metal-oxide-semiconductor to be the ability to easily control within tens nanoseconds, meets wanting for high speed logic level bi-directional conversion to a certain extent
It asks.Therefore, the high-speed bidirectional logic level converting circuit of the invention patent can be adapted for the up to digital display circuit of 5Mhz, and
It realizes simple, low in cost.
It is worth noting that, changing the alternative solutions such as type selecting and the pull-up resistance values of metal-oxide-semiconductor according to circuit theory ratio, still
By where the main idea that can yet be regarded as of the invention, the spirit and scope of the invention patent are not also departed from.
With the prior art, a kind of high-speed bidirectional logic level converting circuit of the embodiment of the present invention is had the following beneficial effects:
A kind of high-speed bidirectional logic level converting circuit of the embodiment of the present invention rises the MOS of accelerating module 103 by level
The presence of pipe Q2 and metal-oxide-semiconductor Q3 greatly overcome influence of the parasitic capacitance to level rise saltus step, realize logic low voltage VL
With logic high voltage VH high-speed bidirectional logic level transition, reliable and stable, realization facilitates, is low in cost, meeting to a certain extent
The requirement of high frequency signal transmission.
The above is only some embodiments of the invention, it is noted that for the ordinary skill people of the art
For member, various improvements and modifications may be made without departing from the principle of the present invention, these improvements and modifications are also answered
It is considered as protection scope of the present invention.
Claims (5)
1. a kind of high-speed bidirectional logic level converting circuit, it is characterised in that: the high-speed bidirectional logic level converting circuit packet
Include low logic voltage level input/output terminal DVL, high voltage logic level input/output terminal DVH, it is logic level control module, low
Pressure side pull-up module, high-voltage end pull-up module, level rise accelerating module, logic low voltage VL, logic high voltage VH, parasitic capacitance CL1
And parasitic capacitance CL2, wherein
The low logic voltage level input/output terminal DVL, high voltage logic level input/output terminal DVH, logic low voltage VLAnd
Logic high voltage VHRise accelerating module with the level respectively to connect；
The low logic voltage level input/output terminal DVL, high voltage logic level input/output terminal DVHAnd logic low voltage VLPoint
It is not connect with the logic level control module；
One end of the low-pressure end pull-up module and the logic low voltage VLConnection, the other end and the low logic voltage level are defeated
Enter output end DVLConnection；One end of the high-voltage end pull-up module and the logic high voltage VHConnection, the other end and the high electricity
Press logic level input/output terminal DVHConnection；
One end of the parasitic capacitance CL1 is connected to the logic level control module and the logic level input/output terminal DVL
Junction, the other end ground connection；
One end of the parasitic capacitance CL2 is connected to the logic level control module and high voltage logic level input/output terminal
DVHJunction, the other end ground connection.
2. high-speed bidirectional logic level converting circuit as described in claim 1, it is characterised in that: the logic level controls mould
Block is the metal-oxide-semiconductor Q1 of a N-channel, the grid G 1 of the metal-oxide-semiconductor Q1 and the logic low voltage VLConnection, source S 1 and the logic
Level input/output terminal DVLConnection, drain D 1 and the high voltage logic level input/output terminal DVHConnection.
3. high-speed bidirectional logic level converting circuit as claimed in claim 2, it is characterised in that: the level, which rises, accelerates mould
Block includes metal-oxide-semiconductor Q2 and metal-oxide-semiconductor Q3, wherein
The drain D 2 of the metal-oxide-semiconductor Q2 and the logic low voltage VLConnection, source S 2 and the low logic voltage level input and output
Hold DVLConnection, grid G 2 are connected to the drain D 1 and high voltage logic level input/output terminal D of the metal-oxide-semiconductor Q1VHCompany
Meet place；
The grid G 3 of the metal-oxide-semiconductor Q3 is connected to the source S 1 and logic level input/output terminal D of the metal-oxide-semiconductor Q1VL's
Junction, drain D 3 and the logic high voltage VHConnection, source S 3 be connected to the metal-oxide-semiconductor Q1 drain D 1 and the high voltage
Logic level input/output terminal DVHJunction.
4. high-speed bidirectional logic level converting circuit as claimed in claim 3, it is characterised in that: the low-pressure end pull-up module
Including resistance R1, one end of the resistance R1 and the logic low voltage VLConnection, the other end and the low logic voltage level are defeated
Enter output end DVLConnection.
5. high-speed bidirectional logic level converting circuit as claimed in claim 4, it is characterised in that: the high-voltage end pull-up module
Including resistance R2, one end of the resistance R2 and the logic high voltage VHConnection, the other end and the high voltage logic level are defeated
Enter output end DVHConnection.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811611185.4A CN109474271A (en) | 2018-12-27 | 2018-12-27 | A kind of high-speed bidirectional logic level converting circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811611185.4A CN109474271A (en) | 2018-12-27 | 2018-12-27 | A kind of high-speed bidirectional logic level converting circuit |
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| CN109474271A true CN109474271A (en) | 2019-03-15 |
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ID=65677471
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| CN201811611185.4A Pending CN109474271A (en) | 2018-12-27 | 2018-12-27 | A kind of high-speed bidirectional logic level converting circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111817705A (en) * | 2020-07-27 | 2020-10-23 | 中国电子科技集团公司第五十八研究所 | Self-induction self-acceleration bidirectional level conversion circuit |
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| US20060261877A1 (en) * | 2005-05-23 | 2006-11-23 | Mark Welty | Biasing circuit for pass transistor for voltage level translator circuit |
| US20080164932A1 (en) * | 2007-01-10 | 2008-07-10 | Texas Instruments Incorporated | Semi-buffered auto-direction-sensing voltage translator |
| US20140118049A1 (en) * | 2012-10-30 | 2014-05-01 | Kabushiki Kaisha Toshiba | Level shift switch and electronic device with the same |
| CN209120162U (en) * | 2018-12-27 | 2019-07-16 | 上海海事大学 | A kind of high-speed bidirectional logic level converting circuit |
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2018
- 2018-12-27 CN CN201811611185.4A patent/CN109474271A/en active Pending
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| US20060261877A1 (en) * | 2005-05-23 | 2006-11-23 | Mark Welty | Biasing circuit for pass transistor for voltage level translator circuit |
| US20080164932A1 (en) * | 2007-01-10 | 2008-07-10 | Texas Instruments Incorporated | Semi-buffered auto-direction-sensing voltage translator |
| US20140118049A1 (en) * | 2012-10-30 | 2014-05-01 | Kabushiki Kaisha Toshiba | Level shift switch and electronic device with the same |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN111817705A (en) * | 2020-07-27 | 2020-10-23 | 中国电子科技集团公司第五十八研究所 | Self-induction self-acceleration bidirectional level conversion circuit |
| CN111817705B (en) * | 2020-07-27 | 2021-11-09 | 中国电子科技集团公司第五十八研究所 | Self-induction self-acceleration bidirectional level conversion circuit |
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