CN109462509B - Method and device for batch backup of board cards - Google Patents

Method and device for batch backup of board cards Download PDF

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Publication number
CN109462509B
CN109462509B CN201811465602.9A CN201811465602A CN109462509B CN 109462509 B CN109462509 B CN 109462509B CN 201811465602 A CN201811465602 A CN 201811465602A CN 109462509 B CN109462509 B CN 109462509B
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board card
backup
main board
fpga
cpu
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CN201811465602.9A
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CN109462509A (en
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孟相玉
张明祯
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Hangzhou DPTech Technologies Co Ltd
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Hangzhou DPTech Technologies Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L41/00Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
    • H04L41/06Management of faults, events, alarms or notifications
    • H04L41/0654Management of faults, events, alarms or notifications using network fault recovery
    • H04L41/0663Performing the actions predefined by failover planning, e.g. switching to standby network elements

Abstract

The application provides a method for the batch backup of board cards, when a main board card is abnormally restarted, flow is switched to a backup board card; after the FPGA (Field-Programmable Gate Array) of the main board is restarted, sending a notification message to a Central Processing Unit (CPU) of the main board; and the CPU of the main board card informs the backup board card to perform backup operation. The method can solve the problem of incomplete session backup possibly caused by independent starting of the CPU and the FPGA, so that the main board card and the backup board card are kept in integral synchronization all the time.

Description

Method and device for batch backup of board cards
Technical Field
The application relates to the technical field of network communication, in particular to a method and a device for batch backup of board cards.
Background
In recent years, networks have undergone a rapid development period, and in recent years, networks have gradually developed into a novel information platform for realizing information resource, storage resource and computing resource sharing, which plays an increasingly important role in daily life of people and has a profound influence on various fields such as social production. Nowadays, networks are being developed toward high speed and broadband, and gradually developed from a single data transmission network into an integrated transmission network of data, voice, image and real-time multimedia information. With the continuous development of modern computer network technology and economic society, people put higher and higher requirements on the application of computer network technology. Systematization, diversification and integration are the basic trends of the development of modern computer network information management technology. The vigorous development of computer network technology brings greater economy and convenience to the society, but meanwhile, the computer network technology has some potential safety hazards, how to reduce the potential safety hazards and then thoroughly clear the potential safety hazards is very important for the safety of computer networks, and the synchronization of the double-computer opening session is a scheme capable of improving the reliability.
In practical application, when the main board card is abnormally restarted, the flow can be switched to the backup board card, so that the connected service cannot be interrupted. In order to avoid that part of traffic can not hit the session and discard the message to further affect the service, after the abnormal restart of the main board card is completed, the backup board card can backup the information to the main board card to ensure that all sessions stored by the two board cards are completely synchronized, so that the sessions on the two board cards can be kept consistent. In the prior art, a Central Processing Unit (CPU) on a motherboard card is responsible for sending backup notification information to a Field-Programmable Gate Array (FPGA) of a backup board card, but because the CPU and the FPGA on the motherboard card are two independent chips, it cannot be guaranteed that a complete recovery can be restarted at the same time, and if the FPGA is slower than the CPU recovery, the FPGA cannot process backup information sent by the backup board card, and thus the backup board card switches traffic back to the motherboard card, and discards a message because the backup cannot hit the session because of incomplete backup.
Disclosure of Invention
In view of this, the present application provides a method and an apparatus for batch backup of board cards, which can solve the problem that after a backup board card switches traffic back to a motherboard card, a message is discarded because the backup is incomplete and the session cannot be hit.
Specifically, the method is realized through the following technical scheme:
a method for batch backup of boards comprises the following steps: when the main board card is abnormally restarted, the flow is switched to the backup board card; after the FPGA of the main board card is restarted, sending a notification message to a CPU of the main board card; and the CPU of the main board card informs the backup board card to perform backup operation.
Wherein the method further comprises: the main board card and the backup board card are arranged on the same frame type equipment or different frame type equipment.
Wherein, the notification message specifically includes: a message containing a restart completion prompt.
The method comprises the following steps that a CPU of a main board card informs a backup board card to perform backup operation, and specifically comprises the following steps: and the CPU of the main board card informs the FPGA of the backup board card to perform backup operation.
Wherein the backup operation specifically comprises: and the backup board card synchronizes all the information to the restarted main board card through batch backup processing.
This application still includes the device of the batch backup of a integrated circuit board, the device includes: a main board card and a backup board card connected with the main board card,
wherein, the main integrated circuit board is used for: after the FPGA of the main board card is restarted, a notification message is sent to a CPU of the main board card, and the CPU of the main board card notifies a backup board card to perform backup operation; the backup board card is used for: and carrying the switched flow when the main board card is abnormally restarted.
The main board card and the backup board card are installed on the same frame type equipment or different frame type equipment.
The notification message is specifically a message including a restart completion prompt.
The CPU of the main board card informs the backup board card to perform backup operation, and specifically, the CPU of the main board card informs the FPGA of the backup board card to perform backup operation.
The backup operation of the backup board card specifically comprises the following steps: and the backup board card synchronizes all the information to the restarted main board card through batch backup processing.
According to the technical scheme provided by the application, when the mainboard card is abnormally restarted, the flow is switched to the backup board card; after the FPGA of the main board card is restarted, sending a notification message to a CPU of the main board card; and the CPU of the main board card informs the backup board card to perform backup operation. The method can solve the problem that the batch backup of the session is incomplete possibly caused by independent starting of the CPU and the FPGA, so that the main board card and the backup board card are kept in integral synchronization all the time.
Drawings
Fig. 1 is a flowchart of a method for batch backup of boards shown in the present application;
fig. 2 is an architecture diagram of a main board card and a backup board card shown in the present application;
FIG. 3 is a diagram of a plurality of connected frame devices according to the present application;
Fig. 4 is a device for batch backup of boards shown in this application.
Detailed Description
Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in this application and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.
It is to be understood that although the terms first, second, third, etc. may be used herein to describe various information, such information should not be limited to these terms. These terms are only used to distinguish one type of information from another. For example, first information may also be referred to as second information, and similarly, second information may also be referred to as first information, without departing from the scope of the present application. The word "if" as used herein may be interpreted as "at … …" or "when … …" or "in response to a determination", depending on the context.
Referring to fig. 1, fig. 1 is a flowchart of a method for batch backup of boards, specifically executing the following steps:
step 101: when the main board card is abnormally restarted, the flow is switched to the backup board card;
the main board card and the backup board card are installed on the same frame type equipment or different frame type equipment.
Step 102: after the FPGA of the main board card is restarted, sending a notification message to a CPU of the main board card;
the notification message is specifically a message including a restart completion prompt.
Step 103: and the CPU of the main board card informs the backup board card to perform backup operation.
The CPU of the main board card informs the backup board card to perform backup operation, and specifically, the CPU of the main board card informs the FPGA of the backup board card to perform backup operation.
The backup operation specifically comprises: and the backup board card synchronizes all the information to the restarted main board card through batch backup processing.
In practical application, the main board card and the backup board card are always in an incremental backup state, and by the method, the problem that session batch backup is incomplete possibly caused by independent starting of the CPU and the FPGA can be solved, so that the main board card and the backup board card are always kept in hot standby synchronization.
It should be particularly noted that in the foregoing method, the main board card and the backup board card are described according to functions, and it is not particularly limited that one board card can only be used as the main board card or the backup board card. Fig. 2 is an architecture diagram of a main board and a backup board shown in the present application.
In fig. 2, a service board a is a main board running on a flow, and a service board B is a backup board of the service board a. When the service board card A is abnormally restarted, the flow is switched to a service board card B serving as a backup board card. And after the FPGA of the service board A is restarted, sending a notification message to the CPU of the service board A, and notifying the service board B of the CPU of the service board A to perform backup operation. After the backup operation is completed, the service board card B which continues to run the traffic is the main board card at this time, and the service board card a is used as the backup board card of the service board card B. If the service board B is abnormally restarted, the method is executed according to the method for batch backup of the board.
Referring to fig. 3, fig. 3 is a diagram illustrating an architecture of a plurality of connected frame devices according to the present application.
In fig. 3, the first situation is that the service board card a and the service board card B in the frame device 1 are mutually the main board card and the backup board card, and the service board card a and the service board card B in the frame device 2 are mutually the main board card and the backup board card. The second case is that the service board card a in the frame device 1 and the service board card a in the frame device 2 are mutually the main board card and the backup board card, and the service board card B in the frame device 1 and the service board card B in the frame device 2 are mutually the main board card and the backup board card. Namely, the frame type device 1 and the frame type device 2 are a host and a standby for each other. Therefore, the main board card and the backup board card can be arranged on the same frame type equipment or different frame type equipment, and specific conditions are set according to requirements.
Referring to fig. 4, fig. 4 is a device for batch backup of boards shown in the present application, where the device includes: the main board 410 and the associated backup board 420,
the motherboard card 410 is configured to: after the FPGA of the main board card 410 is restarted, sending a notification message to the CPU of the main board card 410, and the CPU of the main board card 410 notifying the backup board card 420 of performing a backup operation; the backup board 420 is configured to: and taking over the switched traffic when the main board card 410 is abnormally restarted.
In this embodiment, the main board card 410 and the backup board card 420 are installed on the same frame device or different frame devices.
The notification message is specifically a message including a restart completion prompt.
The CPU of the main board 410 notifies the backup board 420 to perform a backup operation, specifically, the CPU of the main board 410 notifies the FPGA of the backup board 420 to perform a backup operation.
The backup operation performed by the backup board card 420 specifically includes: the backup board card 420 synchronizes all information to the restarted motherboard card 410 through batch backup processing.
The implementation process of the functions and actions of each unit in the above device is specifically described in the implementation process of the corresponding step in the above method, and is not described herein again.
For the device embodiments, since they substantially correspond to the method embodiments, reference may be made to the partial description of the method embodiments for relevant points. The above-described embodiments of the apparatus are merely illustrative, and the units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the scheme of the application. One of ordinary skill in the art can understand and implement it without inventive effort.
The above description is only exemplary of the present application and should not be taken as limiting the present application, as any modification, equivalent replacement, or improvement made within the spirit and principle of the present application should be included in the scope of protection of the present application.

Claims (6)

1. A method for backup of board cards in batch is characterized by comprising the following steps:
when the main board card is abnormally restarted, the flow is switched to the backup board card; the FPGA and the CPU carried by the main board card are respectively restarted;
after the FPGA of the main board card is restarted, sending a notification message to a CPU of the main board card; the CPU of the main board card and the FPGA of the main board card are respectively and independently started, and the restarting and recovering speed of the FPGA is slower than that of the CPU;
and the CPU of the main board card responds to a notification message sent after the FPGA of the main board card is restarted, and notifies the FPGA of the backup board card to perform backup operation, and the FPGA of the backup board card synchronizes all information to the restarted main board card through batch backup processing.
2. The method of claim 1, further comprising:
the main board card and the backup board card are arranged on the same frame type equipment or different frame type equipment.
3. The method according to claim 1, wherein the notification message is specifically: a message containing a restart completion prompt.
4. An apparatus for batch backup of boards, the apparatus comprising: a main board card and a backup board card connected with the main board card,
wherein, the main integrated circuit board is used for: after the FPGA of the main board card is restarted, sending a notification message to a CPU of the main board card; the CPU of the main board card responds to a notification message sent after the FPGA of the main board card is restarted, and notifies the FPGA of the backup board card to perform backup operation; the FPGA and the CPU carried by the main board card are respectively restarted; the CPU of the main board card and the FPGA of the main board card are respectively and independently started, and the restarting and recovering speed of the FPGA is slower than that of the CPU; the backup board card is used for: and carrying the switched flow when the main board card is abnormally restarted, and synchronizing all the information to the restarted main board card by the FPGA of the backup board card through batch backup processing.
5. The apparatus of claim 4, comprising:
the main board card and the backup board card are arranged on the same frame type equipment or different frame type equipment.
6. The apparatus of claim 4, comprising:
The notification message is specifically a message including a restart completion prompt.
CN201811465602.9A 2018-12-03 2018-12-03 Method and device for batch backup of board cards Active CN109462509B (en)

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CN114598784A (en) * 2020-12-07 2022-06-07 西安诺瓦星云科技股份有限公司 Data synchronization method and video processing device
CN112948180B (en) * 2021-02-28 2024-03-22 海南宝通实业公司 Board-level hot standby method based on master control management
CN113067780B (en) * 2021-03-15 2022-11-01 杭州迪普科技股份有限公司 Flow processing method of virtual switching matrix and electronic equipment

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105549460A (en) * 2016-03-10 2016-05-04 中国电子科技集团公司第十研究所 Satellite-borne electronic equipment comprehensive management and control system

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100591077C (en) * 2006-04-30 2010-02-17 华为技术有限公司 Port switchover control system and method
CN101211266A (en) * 2006-12-30 2008-07-02 北京天融信网络安全技术有限公司 FPGA automatic downloading and on-line upgrading process
JP6335682B2 (en) * 2014-06-27 2018-05-30 日本無線株式会社 Electronic device with reset function
CN104079454B (en) * 2014-07-11 2017-12-29 新华三技术有限公司 A kind of unit exception detection method and equipment
CN106161086B (en) * 2016-06-23 2019-06-07 杭州迪普科技股份有限公司 The control method and device that master control borad is restarted

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105549460A (en) * 2016-03-10 2016-05-04 中国电子科技集团公司第十研究所 Satellite-borne electronic equipment comprehensive management and control system

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