CN109428500B - Power converter device - Google Patents
Power converter device Download PDFInfo
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- CN109428500B CN109428500B CN201811030328.2A CN201811030328A CN109428500B CN 109428500 B CN109428500 B CN 109428500B CN 201811030328 A CN201811030328 A CN 201811030328A CN 109428500 B CN109428500 B CN 109428500B
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- power converter
- converter device
- resistor
- electrically connected
- insulating layer
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/40—Testing power supplies
- G01R31/42—AC power supplies
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/003—Constructional details, e.g. physical layout, assembly, wiring or busbar connections
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05567—Disposition the external layer being at least partially embedded in the surface
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
- H01L2224/83851—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester being an anisotropic conductive adhesive
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
Abstract
The invention relates to a power converter device having a power converter (2), the power converter (2) having power semiconductor components (T1, D1) which are electrically connected to one another, the power converter (2) having a first direct-current voltage potential load connection (DC-) and a second direct-current voltage potential load connection (DC+), and the power converter (2) having a semiconductor component (3), the semiconductor component (3) having a semiconductor body (4), a resistor (R) which is electrically connected in series, a first insulating layer (5), and first and second connection contacts (A1, A2), the first and second connection contacts (A1, A2) being electrically connected to one another by means of the resistor (R) which is electrically connected in series, wherein the first connection contact (A1) is electrically connected to the first direct-current voltage potential load connection (DC-) and the second connection contact (A2) is electrically connected to the second direct-current voltage potential load connection (DC+).
Description
Technical Field
The invention relates to a power converter device having a power converter with power semiconductor components electrically connected to each other.
Background
The power semiconductor components are often electrically connected to one or more so-called half-bridge circuits, which are used, for example, for rectifying and inverting voltages and currents.
A power converter using conventional techniques has a first dc voltage potential load connection and a second dc voltage potential load connection between which a voltage is applied during operation of the power converter.
In the event of an excessively high dc voltage being applied between the first dc voltage potential load connection and the second dc voltage potential load connection, for example in order to avoid damage to the power converter or in order to control the power converter in an optimized manner in a power converter device using conventional technology, the dc voltage is usually determined by means of a voltage determination circuit and is fed as an input variable, for example to an overvoltage protection circuit and/or a control device for controlling the power converter.
Since the dc voltage applied between the first dc voltage potential load connection and the second dc voltage potential load connection may generally take on a relatively high voltage value (e.g. higher than 23V), in a power converter device using conventional technology, the dc voltage is divided by discrete resistors electrically connected in series and arranged on a circuit board, and the divided dc voltage is fed as an input variable to an evaluation circuit arranged on the circuit board. Since each resistor is at a different voltage potential, these electrical components must be disposed on the circuit board sufficiently electrically insulated from each other and from other electrical components disposed on the circuit board. In particular in this case, for example, the necessary electrical creepage paths between the resistors and other electrical components arranged on the circuit board have to be maintained. As a result, the arrangement of the resistors requires a lot of space on the circuit board. As a solution for reducing the space required on the circuit board, DE 10 2014 112 517 B3 discloses that the series circuit formed by resistors electrically connected in series should be constructed in the form of a specific resistance cable with discrete resistors electrically connected in series.
If a capacitor is electrically connected between the first dc voltage potential load connection and the second dc voltage potential load connection, there is often a safety specification that the capacitor must be discharged below a certain voltage value after a certain time, for example if electrical energy is no longer fed to the capacitor after the power converter has been switched off or disconnected. For this purpose, DE 10 2008 010 978 A1 discloses discharging a capacitor by means of a resistor electrically connected in parallel with the capacitor.
Disclosure of Invention
It is an object of the present invention to provide a power converter device with a power converter in which the space requirements for realizing a series circuit, which is electrically connected between a first direct voltage potential load connection and a second direct voltage potential load connection of the power converter and which consists of a resistor, are low.
This object is achieved by a power converter device having a power converter with a power semiconductor component which is electrically connected to each other, the power converter having a first direct voltage potential load connection and a second direct voltage potential load connection between which an electrical direct voltage is present during operation of the power converter, and having a semiconductor component with a semiconductor body, a resistor which is electrically connected in series, a first insulating layer which is electrically non-conductive and is arranged between the semiconductor body and the resistor, and a first and a second connection contact which are electrically connected to each other by means of the resistor which is electrically connected in series, wherein the first connection contact is electrically connected to the first direct voltage potential load connection and the second connection contact is electrically connected to the second direct voltage potential load connection.
It has proved to be advantageous if the resistor is composed of a metal, a metal alloy, a silicide or a semiconductor material, in particular doped polysilicon, in particular n-doped polysilicon, since the resistor can be manufactured with particularly low manufacturing tolerances with respect to each other.
Furthermore, it has proven to be advantageous if the first insulating layer consists of silicon oxide or silicon nitride or imide, since a reliable electrical insulation of the resistor is ensured.
Furthermore, it has proved to be advantageous if the thickness of the first insulating layer is at least 5 μm, in particular at least 8 μm, in particular at least 10 μm, since a particularly high electrical insulation of the resistor is ensured.
Furthermore, it has proved to be advantageous if the number of resistors is at least 10, in particular at least 100, in particular at least 300.
Furthermore, it has proved to be advantageous if all resistors have the same resistance value, since the resistors can be manufactured particularly easily. The resistors are preferably of identical design. The resistors are preferably fabricated in parallel using the same technical approach.
Furthermore, it has proved to be advantageous if the series circuit arrangement formed by the resistors electrically connected in series is distributed over at least 40%, in particular at least 50%, in particular at least 70%, of the main area of the insulating layer facing away from the semiconductor body. As a result, a uniform heating of the resistors is ensured during operation, with the result that the voltage drops occurring at the individual resistors remain constant when heating of the semiconductor component occurs, which allows a highly accurate measurement of the intermediate circuit voltage.
Furthermore, it has proved to be advantageous if the series circuit formed by the resistors electrically connected in series has a meandering profile. As a result, an effective uniform distribution of the resistors on the main face of the insulating layer facing away from the semiconductor body is made possible.
Furthermore, it has proved to be advantageous if the capacitor is electrically connected between the first direct voltage potential load connection and the second direct voltage potential load connection, wherein the total resistance of the resistor has such a value that the capacitor discharges through the resistor after the first time for at most 600s, in particular at most 360s after the first time, if the voltage value of the direct voltage is equal to the nominal direct voltage value provided for the operation of the power converter device at the first time and is higher than 60V and the electrical energy is no longer fed to the capacitor from the first time. This achieves the technical safety requirement that after a certain time, for example after the power converter has been turned off or disconnected, if electrical energy is no longer fed to the capacitor, the capacitor discharges below a certain voltage value.
Furthermore, it has proved to be advantageous if the semiconductor component has a third connection contact, wherein the third connection contact is connected in an electrically conductive manner to a voltage tap contact of a resistor, which is electrically connected in series, wherein the voltage tap contact is electrically arranged between a first part and a second part of the resistor electrically connected in series, because the semiconductor component forms a voltage sensor for measuring a direct voltage, i.e. an intermediate circuit voltage of the power converter.
In this case, it has proved to be advantageous if the first part of the resistors electrically connected in series comprises exactly a single resistor, which resistor is electrically connected between the voltage tap contact and the first or the second direct voltage potential load connection. Therefore, the design of the semiconductor component is particularly simple.
Furthermore, it has proven to be advantageous if the resistors are electrically connected to one another by means of a structured metal layer, since semiconductor components can be produced particularly easily.
In this case, it has proven to be advantageous if the connection contacts are integrated components of the structured metal layer, since semiconductor components can be produced particularly easily.
Furthermore, it has proved to be advantageous if the resistor is embedded in a non-conductive second insulating layer. This increases the dielectric strength of the semiconductor component.
In this case, it has proved to be advantageous if the distance between the main region of the second insulating layer facing away from the first insulating layer and the structured metal layer is at least 1 μm, in particular at least 3 μm, since the second insulating layer has a good mechanical load-carrying capacity.
Furthermore, it has proved to be advantageous if the semiconductor component is arranged on a substrate of the power converter device on which the semiconductor component is arranged, or wherein the semiconductor component is arranged on a circuit board of the power converter device. The semiconductor component is effectively cooled by the substrate or the circuit board.
Drawings
Exemplary embodiments of the present invention are explained below with reference to the accompanying drawings. In the drawings:
fig. 1 shows a power converter arrangement according to the invention;
fig. 2 shows a plan view of the connection contacts and resistors of the semiconductor components electrically connected in series of the power converter device according to the invention; and
fig. 3 shows a cross-sectional view of the semiconductor components of the power converter device according to the invention.
It should be noted that the drawings are schematic.
Detailed Description
Fig. 1 shows a power converter device 1 according to the invention, which has a power converter 2, the power converter 2 having power semiconductor components T1 and D1 electrically connected to one another. The power converter 2 also has an electrically conductive first DC voltage potential load connection DC-and an electrically conductive second DC voltage potential load connection dc+, between which an electrical DC voltage U is applied during operation of the power converter 2. The first direct voltage potential load connection DC-preferably has a negative electrical polarity and the second direct voltage potential load connection dc+ preferably has a positive electrical polarity. The power semiconductor components T1 and D1 are preferably electrically connected between the first and second direct voltage potential load connections DC-and dc+. The corresponding power semiconductor components are usually provided in the form of power semiconductor switches or diodes. The power semiconductor switch is typically provided in the form of a transistor or thyristor, such as, for example, an IGBT (insulated gate bipolar transistor) or a MOSFET (metal oxide semiconductor field effect transistor).
Within the scope of the exemplary embodiment, the power converter 2 has an alternating voltage connection AC. If the power converter 2 is operated in inverter mode, the direct voltage U applied between the first and second direct voltage potential load connections DC-and dc+, is inverted by the power converter 2 to an alternating voltage. If the power converter 2 is operated in rectifier mode, the alternating voltage applied to the alternating voltage connection AC is rectified to a direct voltage U, which is applied between the first and the second direct voltage potential load connections DC-and dc+. The direct voltage U is also generally referred to as intermediate circuit voltage. The dc voltage U is an intermediate circuit voltage of a power intermediate circuit of the power converter 2. The direct voltage U generally has a voltage value of more than 23V, in particular more than 500V and in particular more than 1100V. The alternating voltage AC can be provided here as a 1-phase or multi-phase, in particular 3-phase, alternating voltage. The power semiconductor components T1 and D1 are preferably arranged on a substrate 20, the substrate 20 being schematically shown in fig. 1 with dashed lines. The substrate 20 may be implemented, for example, as a direct copper bond substrate (DCB substrate), as an active metal brazing substrate (AMB substrate) or as an Insulated Metal Substrate (IMS). It should be noted that the power converters may of course also have different circuit topologies and that the power semiconductor components of the power converters may be electrically connected to each other as desired.
The power semiconductor components of the power converter are preferably connected to form at least one half-bridge circuit 14 (see fig. 1), wherein the at least one half-bridge circuit 14 is electrically connected between the first and second direct voltage potential load connections DC-and dc+. In the exemplary embodiment, power converter 2 has a plurality of half-bridge circuits 14 electrically connected in parallel. This means that the corresponding half-bridge circuit can also be realized in the form of a multi-stage half-bridge circuit by conventional techniques, and in particular in the form of a 3-stage half-bridge circuit by conventional techniques. Insofar as the power semiconductor switch is implemented as an exemplary embodiment of an IGBT, in each case the freewheeling diode D2 is electrically connected anti-parallel with respect to the power semiconductor switch T1, which need not necessarily be the case. Within the scope of the exemplary embodiment shown, the power converter 2 generates a three-phase alternating voltage at the alternating voltage connection AC from a direct voltage U, which is applied between the first and the second direct voltage potential load connection DC and dc+.
According to the invention, the power converter device 1 has a specific semiconductor component 3, by means of which semiconductor component 3a series-connected resistor as described at the outset is realized. As a result, the space required for realizing the series circuit, which is electrically connected between the first DC voltage potential load connection DC-and the second DC voltage potential load connection dc+ of the power converter and which is composed of the resistor R, is low.
Fig. 2 shows a plan view of the connection contacts A1, A2 and A3 of the series-connected resistor R connecting the conductor track 6' and the semiconductor component 3, wherein other elements of the semiconductor component are not shown in fig. 2 for the sake of clarity. Fig. 3 shows a cross-sectional view of the semiconductor component 3 along the dashed line S shown in fig. 2, wherein the semiconductor component 3 may be arranged on the substrate 20 or as shown drawn in schematic form by means of a dashed line in fig. 1, the semiconductor component 3 may be arranged on the circuit board 21 of the power converter device 1.
The semiconductor component 3 has a semiconductor body 4, a resistor R electrically connected in series, a non-conductive first insulator 5 arranged between the semiconductor body 4 and the resistor R, and first and second connection contacts A1 and A2, the first and second connection contacts A1 and A2 being electrically connected to each other by the resistor R electrically connected in series.
The first connection contact A1 is connected in an electrically conductive manner to a first direct-current voltage potential load connection DC-, and the second connection contact A2 is connected in an electrically conductive manner to a second direct-current voltage potential load connection dc+.
The semiconductor body 4 is composed of a semiconductor material such as, for example, doped silicon. The thickness of the semiconductor body 4 is preferably 600 μm to 1000 μm and in particular 800 μm.
The first insulating layer 5 is preferably composed of silicon oxide or silicon nitride or imide. The thickness d1 of the first insulating layer 5 is at least 5 μm, in particular at least 8 μm, in particular at least 10 μm. The first insulating layer 5 is arranged on the semiconductor body 4, in particular directly on the semiconductor body 4. In an exemplary embodiment, the thickness d1 of the first insulating layer is 10 μm.
The resistor R is arranged on the first insulating layer 5, in particular directly on the first insulating layer 5. The resistor R is preferably composed of a metal, a metal alloy, a silicide or a semiconductor material, in particular of doped polysilicon, in particular n-doped polysilicon. The resistor R can be manufactured here, for example, by a deposition process, a masking process and an etching process according to conventional techniques. In this case, the resistor R may consist of a plurality of layers, which are located one on top of the other and are composed of the respective materials. As a result of the fact that the resistor R is manufactured by a high-precision deposition process, a manufacturing process and an etching process according to conventional techniques in semiconductor technology, they can be manufactured in large quantities with high precision and low space requirements compared to using a plurality of discrete resistors connected in series and known in the art. The resistance values of the individual resistors R preferably have a maximum tolerance of less than ± 0.5%, in particular less than ± 0.4%, and in particular less than ± 0.3% relative to the arithmetic average of the resistance values of all resistors R.
The number of resistors R is preferably at least 10, in particular at least 100, in particular at least 300.
All resistors R preferably have the same resistance value. In this respect it should be pointed out that in this case the resistance value of the resistor R may fluctuate within conventional manufacturing tolerances.
The series circuit 13 arrangement realized by means of the resistors R electrically connected in series is distributed over at least 40%, in particular at least 50%, in particular at least 70%, of the main face 5a of the insulating layer 5 facing away from the semiconductor body 4, i.e. the area 13' required for realizing the series circuit 13 represents at least 40%, in particular at least 50%, in particular at least 70%, of the main area 5a of the insulating layer 5. The area 13' is shown surrounded by a dashed line in fig. 2. The series circuit 13 realized by means of the resistors R electrically connected in series preferably has a meandering profile.
The capacitor C is preferably electrically connected between the first direct voltage potential load connection DC-and the second direct voltage potential load connection dc+. Capacitor C is also commonly referred to as an intermediate circuit capacitor. The total resistance of the resistor R preferably has such a value that if the voltage value of the direct voltage U is equal to the nominal direct voltage value provided for operating the power converter device 1 at a first time and more than 60V and electrical energy is no longer fed to the capacitor C from the first time, said capacitor C is discharged by the resistor R, more precisely only by the resistor R, after the first time for at most 600s, in particular after the first time for at most 360s, such that the voltage value of the direct voltage value U is at most 60V. This achieves the technical safety requirement that if electrical energy is no longer fed to the capacitor C from the first time, the capacitor C is discharged below a certain voltage value after a certain period of time, for example after the power converter 2 is turned off or disconnected, and electrical energy is extracted from the capacitor C only through the resistor R. The total resistance value of the resistors R corresponds to the sum of the resistance values of the resistors R electrically connected in series.
The semiconductor component 3 preferably has a third connection contact A3, wherein the third connection contact A3 is connected in an electrically conductive manner to a voltage tap contact 12 of a resistor R, which is electrically connected in series, wherein the voltage tap contact 12 is electrically arranged between a first part 13a and a second part 13b of the resistor R, which is electrically connected in series. The voltage connection contact 12 is formed by a conductive connecting conductor track 6', which conductive connecting conductor track 6' connects two resistors R arranged one after the other in a conductive manner to each other in a series circuit 13. The first part 13a of the resistor R electrically connected in series preferably comprises exactly one resistor R1, wherein this resistor R1 is electrically connected between the voltage tap contact 12 and the first direct voltage potential load connection A1 or between the voltage tap contact 12 and the second direct voltage potential load connection A2 as in the exemplary embodiment.
If the semiconductor component 3 has a third connection contact A3, the semiconductor component 3 forms a voltage sensor for measuring the direct voltage U, i.e. the intermediate circuit voltage of the power converter 2. The direct current voltage U generates a direct current Ia proportional to the current converter 2 and flows through the resistor R electrically connected in series. The direct current Ia generates a voltage drop at the first portion 13a of the resistor R electrically connected in series, i.e. at the resistor R1 in the exemplary embodiment, which voltage drop is proportional to the direct voltage U, and the semiconductor component 3 outputs it as an output voltage Ua between the third connection contact A3 and the first connection contact A1 in the exemplary embodiment. Within the scope of the exemplary embodiment, the power converter device 1 has an evaluation circuit 11, which generates an evaluation circuit output voltage Ub that is proportional to the output voltage Ua. The evaluation circuit output voltage Ub is proportional to the dc voltage U. The evaluation circuit 11 has a very high input resistance, as a result of which the current Ia flowing into the semiconductor component 3 corresponds to a good approximation of the current Ia flowing out of the semiconductor component 3. The evaluation circuit 11 is preferably arranged on a circuit board 21 of the power converter device 1, which circuit board 21 is shown in schematic form by means of dots in fig. 1. The evaluation circuit output voltage Ub can be fed as an input variable to, for example, an overvoltage protection circuit and/or a control device for controlling the power converter 2. As a result, damage to the power converter 2 in the event of too high a direct voltage U can be avoided and the power converter 2 can be controlled in an optimized manner.
The above-described embodiment of the semiconductor component 3 as a voltage sensor for measuring the direct voltage U, i.e. the intermediate circuit voltage of the power converter 2, is very advantageous, in particular as described above in connection with the embodiment of the overall resistance of the resistor R, such that if the voltage value of the direct voltage U is equal to the nominal direct voltage value provided for the operation of the power converter device 1 at a first time and is higher than 60V, and the electrical energy is no longer fed to the capacitor C from the first time, said capacitor C is discharged through the resistor R, more precisely only through the resistor R, for a maximum of 600s after the first time, in particular a maximum of 360s after the first time, such that the voltage value of the direct voltage U is a maximum of 60V. As a result, the semiconductor component 3 and thus the individual electrical elements perform the voltage measurement of the intermediate circuit voltage U in a very space-saving manner and the technical safety requirement that after a certain period of time (for example after the power converter 2 has been switched off or disconnected) if electrical energy is no longer fed to the capacitor C and if electrical energy is extracted from the capacitor C only by the resistor R, the capacitor C is discharged below a certain voltage value.
The resistors R are preferably electrically connected to each other by a structured metal layer 6. The metal layer 6 may be made of aluminum, for example. The material constituting the resistor R preferably has a resistivity that is much higher (e.g. at least ten times higher, in particular at least one hundred times higher) than the material constituting the structured metal layer 6. The metal layer 6, due to its structure, forms electrically conductive connection conductor tracks 6', through which the resistors R are electrically conductively connected to each other, and the electrical series circuit 13 is electrically conductively connected to the respective connection contacts A1, A2 and A3. The resistor R is preferably arranged between the structured metal layer 6 and the first insulating layer 5. The respective connection contact A1, A2 or A3 is preferably an integral part of the structured metal layer 6.
The resistor R is preferably embedded in a non-conductive second insulating layer 7, which second insulating layer 7 may for example be composed of silicon oxide or silicon nitride or imide. The resistor R is preferably completely covered by the second insulating layer 7. The distance a between the main face 7a of the second insulating layer 7 facing away from the first insulating layer 5 and the structured metal layer 6 is preferably at least 1 μm, in particular at least 3 μm. The connection conductor track 6' is connected in an electrically conductive manner to the resistor R by means of a conductive via 9, the conductive via 9 extending within the insulating layer 7. The respective connection contact A1, A2 or A3 is preferably also embedded in the insulating layer 7, wherein the second insulating layer 7 has a cutout 10, through which cutout 10 the respective connection contact A1, A2 and A3 can be externally contacted to form an electrical contact. The second insulating layer 7 has a multilayer structure even if this is not explicitly shown. First, the base layer of the second insulating layer 7 is arranged on the first insulating layer 5 or on the resistor R having an opening for the via 9. Subsequently, the structured metal layer 6 is applied onto the base layer of the second insulating layer 7 by a deposition process, a masking process and an etching process according to conventional techniques, wherein the vias 9 are also formed there. Subsequently, a structured cover layer of a second insulating layer 7 with incisions 10 is arranged on the base layer of the structured metal layer 6 and the insulating layer 7.
The semiconductor component 3 may be arranged on the substrate 20 of the power converter device 1 on which the semiconductor components T1 and D1 are arranged, or in particular the semiconductor component 3 may be arranged in an insulating housing on the circuit board 21 of the power converter device 1. The rear side of the semiconductor component 3 facing the substrate 20 or the circuit board 21 is preferably connected in an electrically conductive manner to a first direct-current piezoelectric load connection A1. The circuit board 21 preferably has a fiber reinforced plastic as an electrically insulating material, on which electrically conductive conductor tracks are arranged. The semiconductor component 3 is here preferably connected to the substrate 20 or the circuit board 21 by means of an adhesive layer 11, as shown for example in fig. 3, said adhesive layer 11 being arranged between the semiconductor component 3 and the substrate 20 or the circuit board 21. The adhesive layer 11 is preferably composed of an electrically conductive adhesive, which is preferably also a good heat conductor.
As in the exemplary embodiment, the semiconductor component 3 may be provided in the form of a component without a housing, but may also be provided in the form of a receiving component (wherein the housing is made, for example, from a transfer mold).
In an exemplary embodiment, for example, the voltage value of the direct current voltage U is 1200V at maximum, and the number of resistors R is 400, wherein the resistance value of each resistor R is 3kΩ. Therefore, the total resistance value of the resistor R is 1,2M Ω. Therefore, the voltage of maximum 3V drops at the resistor R1, with the result that the voltage value of the output voltage Ua is maximum 3V. Therefore, the current value of the direct current Ia is 1mA at the maximum.
The number N of identical resistors R is preferably chosen in accordance with the voltage value of the direct voltage U such that the voltage drop across the first resistor R1 corresponds to a value (e.g. 3V) that can be easily evaluated with the evaluation circuit 11.
Claims (27)
1. A power converter arrangement having a power converter (2), the power converter (2) having power semiconductor devices (T1, D1) which are electrically connected to each other, the power converter (2) having a first direct voltage potential load connection (DC-) and a second direct voltage potential load connection (dc+), between which there is an electrical direct voltage (U) during operation of the power converter (2), and the power converter (2) having a semiconductor component (3), the semiconductor component (3) having a semiconductor body (4), a resistor (R) which is electrically connected in series, a first insulating layer (5) which is electrically non-conductive and which is arranged between the semiconductor body (4) and the resistor (R), and a first connection contact point (A1) and a second connection contact point (A2), the first connection contact point (A1) and the second connection contact point (A2) being connected to each other in an electrically conductive manner by means of the resistor (R) which is electrically connected in series, wherein the first connection contact point (A1) is electrically connected to the first direct voltage potential load connection (DC-) in an electrically conductive manner and the second connection (dc+) is electrically connected to the first connection point (dc+) in a conductive manner.
2. A power converter device according to claim 1, characterized in that the resistor (R) is composed of a metal, a metal alloy, a silicide or a semiconductor material.
3. A power converter device according to claim 1, characterized in that the resistor (R) is constituted by doped polysilicon.
4. A power converter device according to claim 1, characterized in that the resistor (R) is constituted by n-doped polysilicon.
5. A power converter device according to any of the preceding claims, characterized in that the first insulating layer (5) is composed of silicon oxide or silicon nitride or imide.
6. A power converter device according to any of the preceding claims 1-4, characterized in that the thickness (d 1) of the first insulating layer (5) is at least 5 μm.
7. A power converter device according to any of the preceding claims 1-4, characterized in that the thickness (d 1) of the first insulating layer (5) is at least 8 μm.
8. A power converter device according to any of the preceding claims 1-4, characterized in that the thickness (d 1) of the first insulating layer (5) is at least 10 μm.
9. A power converter device according to any of the preceding claims 1-4, characterized in that the number of resistors (R) is at least 10.
10. A power converter device according to any of the preceding claims 1-4, characterized in that the number of resistors (R) is at least 100.
11. A power converter device according to any of the preceding claims 1-4, characterized in that the number of resistors (R) is at least 300.
12. A power converter device according to any of the preceding claims 1-4, characterized in that all resistors (R) have the same resistance value.
13. A power converter device according to any of the preceding claims 1-4, characterized in that the series circuit (13) formed by series electrically connected resistors (R) is arranged distributed over at least 40% of the main area (5 a) of the insulating layer (5) facing away from the semiconductor body (4).
14. A power converter device according to any of the preceding claims 1-4, characterized in that the series circuit (13) formed by series electrically connected resistors (R) is arranged distributed over at least 50% of the main area (5 a) of the insulating layer (5) facing away from the semiconductor body (4).
15. A power converter device according to any of the preceding claims 1-4, characterized in that the series circuit (13) formed by the resistors (R) electrically connected in series is arranged distributed over at least 70% of the main area (5 a) of the insulating layer (5) facing away from the semiconductor body (4).
16. A power converter device according to any of the preceding claims 1-4, characterized in that the series circuit (13) formed by resistors (R) electrically connected in series has a meandering profile.
17. A power converter device according to one of the preceding claims 1-4, characterized in that a capacitor (C) is electrically connected between the first direct voltage potential load connection (DC-) and the second direct voltage potential load connection (dc+), wherein the total resistance of the resistor (R) has such a value: if the voltage value of the direct voltage (U) corresponds to the nominal direct voltage value provided for the operation of the power converter device at the first time and is higher than 60V and the electrical energy is no longer fed to the capacitor (C) from the first time, said capacitor (C) is discharged by the resistor (R) for at most 600s after the first time in such a way that the voltage value of the direct voltage (U) is at most 60V.
18. A power converter device according to one of the preceding claims 1-4, characterized in that a capacitor (C) is electrically connected between the first direct voltage potential load connection (DC-) and the second direct voltage potential load connection (dc+), wherein the total resistance of the resistor (R) has such a value: if the voltage value of the direct voltage (U) corresponds to the nominal direct voltage value provided for the operation of the power converter device at the first time and is higher than 60V and the electrical energy is no longer fed to the capacitor (C) from the first time, said capacitor (C) is discharged by the resistor (R) for a maximum of 360s after the first time in such a way that the voltage value of the direct voltage (U) is a maximum of 60V.
19. A power converter device according to any of the preceding claims 1-4, characterized in that the semiconductor component (3) has a third connection contact (A3), wherein the third connection contact (A3) is connected in an electrically conductive manner to a voltage tap contact (12) of the resistor (R) electrically connected in series, wherein the voltage tap contact (12) is electrically arranged between the first part (13 a) and the second part (13 b) of the resistor (R) electrically connected in series.
20. A power converter arrangement according to claim 19, characterized in that the first part (13 a) of the serially electrically connected resistors (R) comprises exactly a single resistor (R1), wherein the resistor (R1) is electrically connected between the voltage tap contact (12) and the first direct voltage potential load connection (DC-) or the second direct voltage potential load connection (dc+).
21. A power converter device according to claim 19, characterized in that the resistors (R) are electrically connected to each other by means of a structured metal layer (6).
22. The power converter device according to claim 21, characterized in that at least one of the first (A1), second (A2) and third (A3) connection contacts is an integrated part of the structured metal layer (6).
23. A power converter device according to claim 21, characterized in that the resistor (R) is arranged between the structured metal layer (6) and the first insulating layer (5).
24. A power converter device according to claim 1, characterized in that the resistor (R) is embedded in a non-conductive second insulating layer (7).
25. A power converter device according to claim 24, characterized in that the distance (a) between the main area (7 a) of the second insulating layer (7) facing away from the first insulating layer (5) and the structured metal layer (6) is at least 1 μm.
26. A power converter device according to claim 24, characterized in that the distance (a) between the main area (7 a) of the second insulating layer (7) facing away from the first insulating layer (5) and the structured metal layer (6) is at least 3 μm.
27. A power converter arrangement according to any of the preceding claims 1-4, characterized in that the semiconductor component (3) is arranged on a substrate (20) of the power converter arrangement (1), on which substrate (20) the semiconductor devices (T1, D1) are arranged, or wherein the semiconductor component (3) is arranged on a circuit board (21) of the power converter arrangement (1).
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE102017120356.7 | 2017-09-05 | ||
| DE102017120356.7A DE102017120356A1 (en) | 2017-09-05 | 2017-09-05 | Converter means |
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| CN109428500A CN109428500A (en) | 2019-03-05 |
| CN109428500B true CN109428500B (en) | 2023-09-19 |
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| CN201811030328.2A Active CN109428500B (en) | 2017-09-05 | 2018-09-05 | Power converter device |
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| DE102021127644A1 (en) | 2021-10-25 | 2023-04-27 | Semikron Elektronik Gmbh & Co. Kg | Method for monitoring the operation of a converter device and converter arrangement |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6434181A (en) * | 1987-07-30 | 1989-02-03 | Mitsubishi Electric Corp | Dc voltage detection circuit of invertor device |
| CN1691476A (en) * | 2004-04-27 | 2005-11-02 | 三洋电机株式会社 | Inverter module |
| DE102012109283A1 (en) * | 2012-09-28 | 2014-04-03 | Siemens Aktiengesellschaft | Power converter of electrical machine used for feeding three-phase motor of motor vehicle, has electrical resistance that is provided in circuit portion at same time through decoupling element |
| DE102014112517B3 (en) * | 2014-09-01 | 2015-08-27 | Semikron Elektronik Gmbh & Co. Kg | Converter means |
| CN106787622A (en) * | 2016-12-05 | 2017-05-31 | 广州金升阳科技有限公司 | A kind of voltage sampling method and voltage sampling circuit |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004180281A (en) * | 2002-11-13 | 2004-06-24 | Renesas Technology Corp | Orthogonal mixer circuit and mobile terminal using the same |
| DE102006062101B4 (en) * | 2006-12-30 | 2017-10-05 | Conti Temic Microelectronic Gmbh | Device for discharging the DC link capacitor of the power electronics of a hybrid drive system |
| DE102008010978A1 (en) | 2008-02-25 | 2009-08-27 | Robert Bosch Gmbh | Discharge circuit for high voltage networks |
| EP2308088A1 (en) * | 2008-07-02 | 2011-04-13 | Nxp B.V. | Improved meander resistor |
-
2017
- 2017-09-05 DE DE102017120356.7A patent/DE102017120356A1/en active Pending
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2018
- 2018-09-05 CN CN201811030328.2A patent/CN109428500B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6434181A (en) * | 1987-07-30 | 1989-02-03 | Mitsubishi Electric Corp | Dc voltage detection circuit of invertor device |
| CN1691476A (en) * | 2004-04-27 | 2005-11-02 | 三洋电机株式会社 | Inverter module |
| DE102012109283A1 (en) * | 2012-09-28 | 2014-04-03 | Siemens Aktiengesellschaft | Power converter of electrical machine used for feeding three-phase motor of motor vehicle, has electrical resistance that is provided in circuit portion at same time through decoupling element |
| DE102014112517B3 (en) * | 2014-09-01 | 2015-08-27 | Semikron Elektronik Gmbh & Co. Kg | Converter means |
| CN106787622A (en) * | 2016-12-05 | 2017-05-31 | 广州金升阳科技有限公司 | A kind of voltage sampling method and voltage sampling circuit |
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| Publication number | Publication date |
|---|---|
| CN109428500A (en) | 2019-03-05 |
| DE102017120356A1 (en) | 2019-03-07 |
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