CN109426322A - A kind of solid state hard disk and its method of supplying power to - Google Patents
A kind of solid state hard disk and its method of supplying power to Download PDFInfo
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- CN109426322A CN109426322A CN201710727294.1A CN201710727294A CN109426322A CN 109426322 A CN109426322 A CN 109426322A CN 201710727294 A CN201710727294 A CN 201710727294A CN 109426322 A CN109426322 A CN 109426322A
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- flash memory
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- hard disk
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- 239000007787 solid Substances 0.000 title claims abstract description 39
- 238000000034 method Methods 0.000 title claims abstract description 13
- 230000015654 memory Effects 0.000 claims abstract description 111
- 239000003990 capacitor Substances 0.000 claims description 12
- 238000006243 chemical reaction Methods 0.000 claims description 10
- 230000005540 biological transmission Effects 0.000 claims description 5
- 230000005611 electricity Effects 0.000 claims description 5
- 238000007726 management method Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 238000013500 data storage Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 230000001360 synchronised effect Effects 0.000 description 3
- 238000012937 correction Methods 0.000 description 2
- 238000013507 mapping Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000003068 static effect Effects 0.000 description 2
- 238000005299 abrasion Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000007717 exclusion Effects 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 210000003205 muscle Anatomy 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/266—Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips
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- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
The invention discloses a kind of solid state hard disk and its method of supplying power to, including flash controller, flash memory, power supply unit, the power supply unit, flash memory, flash controller are sequentially connected, and the power supply unit is first powered to each flash memory, then are powered to flash controller.Solid state hard disk of the invention is first powered to each flash memory, each flash memory is powered to flash controller again after being powered, flash controller starts to read data after being powered again, each flash memory prepares after energization is completed at this time, flash controller, which reads data, can reduce error rate, and partial data can be read without repeatedly reading, it improves efficiency.
Description
Technical field
The invention belongs to field of data storage, are related to a kind of solid state hard disk.
Background technique
Solid state hard disk (Solid State Drive, SSD) mainly includes flash controller (Flash managing chip) and fast
Flash memory (flash memory, Flash chip), compared with conventional hard its special feature is that without mechanical structure, have low power consumption,
Shatter-proof, the advantages that stability is high, low temperature resistant.
Flash managing chip is responsible for completing the management of the management of Flash and data storage.Data storage management be mainly
By writing equalization algorithm (Wear Levelling algorithm) come Flash all in guarantee system by uniform erasable and use,
To extend the service life of entire SSD product.Flash managing chip is also responsible for through standard interface (including SATA-I/SATA-
II/PATA/USB) with host equipment (use SSD as store equipment) intercommunication.With the continuous development of electronic circuit technology,
Computer memory technical is also maked rapid progress, and SSD switching is powered by super capacitor after system cut-off.Super capacitor (Super
Capacitor, SC) it is to have that capacity is big, charge and discharge electric line is simple, the charging circuit without similar rechargeable battery, safety coefficient
Feature high, long-time service is non-maintaining.Current solid state hard disk power supply mode is first to be powered from power supply unit to flash controller,
It is powered again from flash controller to flash memory.Power supply unit to flash controller power after, flash controller supply power to each flash memory with
Start to read data.Since the time that each flash memory is powered is later than flash controller, (flash controller is powered after preparation, and data are
It is ready), therefore when flash controller reads data for the first time, can not completely read the data in all flash memories, it also occur that data
The case where read error, needs to carry out multiple reading data at this time, and reliability is lower.
Summary of the invention
In order to solve the above-mentioned technical problems, the present invention provides a kind of solid state hard disks, including including flash controller, quick flashing
Memory, power supply unit, the power supply unit, flash memory, flash controller are sequentially connected, and the power supply unit is first to each
Flash memory power supply, then power to flash controller.
Further, the solid state hard disk further includes the coffret connecting with flash controller, and the coffret is used
In carrying out data transmission.
Further, the flash memory includes 2 or more, and is connected each other by Flash memory bus.
Further, the power supply unit includes power supply switch circuit, and the power supply switch circuit includes that the first power supply is defeated
Enter end, second source input terminal, switching chip, voltage conversion chip, first power input, second source input terminal are equal
It is connected with switching chip, the switching chip is connect with the voltage conversion chip, and it includes voltage that the voltage dress, which changes chip,
Output end.
Further, first power input is connected with external dc power;The solid state hard disk further includes spare
Power supply, the second source input terminal are connect with backup power source.
Further, the backup power source is super capacitor.
Further, the flash controller is nand flash memory controller, and the flash memory is NAND Flash storage
Device.
Further, the solid state hard disk further includes memory strip circuit board, the flash memory, flash controller,
Power supply unit is all fixed in memory strip circuit board.
The present invention provides a kind of solid state hard disk method of supplying power to, comprising the following steps:
S100: power supply unit is flash memory power supply;
S200: flash memory is flash controller power supply.
Further, the method for supplying power to further include:
S300: flash controller control flash memory is read, is written or delete operation.
Beneficial effects of the present invention:
Solid state hard disk of the invention is first powered to flash memory, and flash memory is supplied to flash controller again after being powered
Electricity, flash controller start to read data after being powered again, and each flash memory prepares after energization is completed at this time, and flash controller is read
Data can reduce error rate, and partial data can be read without repeatedly reading, and improve efficiency.
Detailed description of the invention
The drawings described herein are used to provide a further understanding of the present invention, constitutes a part of the invention, this hair
Bright illustrative embodiments and their description are used to explain the present invention, and are not constituted improper limitations of the present invention.In the accompanying drawings:
Fig. 1 is the structural schematic diagram of solid state hard disk in an embodiment;
Fig. 2 is the structural schematic diagram of solid state hard disk in another embodiment;
Fig. 3 is the structural schematic diagram of power supply unit in an embodiment;
Fig. 4 is the structural schematic diagram of flash controller in an embodiment;.
Fig. 5 is a kind of flow chart of solid state hard disk method of supplying power to.
Specific embodiment
In order to be clearer and more clear technical problems, technical solutions and advantages to be solved, tie below
Drawings and examples are closed, the present invention will be described in further detail.It should be appreciated that specific embodiment described herein is only used
To explain the present invention, it is not intended to limit the present invention.
Embodiment 1
In a specific embodiment, as shown in Figure 1 and Figure 2, solid state hard disk 10 includes flash controller 200, flash memory
Reservoir 300, power supply unit 100, the power supply unit 100, flash controller 200, flash memory 300 are sequentially connected, described
Power supply unit is first powered to each flash memory 300, then is powered to flash controller 200, and traditional power supply order is become different
Step power supply.
The flash controller 200 for control flash memory 300 be written and read, delete operation;
The power supply unit is used to power to flash memory 300 and flash controller 200;
The flash memory 300 is for storing data.
The power supply unit 100, flash memory 300 pass through bus between flash controller 200 and connect.
In one embodiment, the solid state hard disk 10 further includes the coffret (figure connecting with flash controller 200
Do not show), the coffret is for carrying out data transmission.
Further, the coffret is SATA interface.In other embodiments, the coffret is electronics collection
At driver (IDE, Integrated Drive Electronics) interface etc., specifically it is not construed as limiting.
Further, the flash memory 300 is including 1 or multiple (2 or more), and multiple flash memories pass through
Flash memory bus is connected, and is carried out data transmission by the Flash memory bus, in one embodiment, SATA interface is as inside and outside number
According to the interface of transmission, when there is data to need to store, flash controller 300 gets data to be stored from SATA interface, and
It is stored that data into corresponding flash memory 300 by Flash memory bus.
In one embodiment, as shown in Figure 1, the flash memory 300 includes multiple (2 or more), respectively
Flash memory A1, flash memory A2, flash memory A3, (n is any to flash memory A4 ... ... flash memory An
Natural number), and each other according to flash memory A1, flash memory A2, flash memory A3, flash memory
The incremental order of A4 ... ... flash memory An is successively connected with Flash memory bus.And first quick flashing is connected by power supply unit 100
Memory A1, the last one flash memory An connection flash controller 200.That is power supply unit 100, flash memory 300, sudden strain of a muscle
Memory controller 200 is sequentially connected in series.It should be noted that A1, A2 ..., An be only number, the series sequence of flash memory
Can not according to A1, A2 ..., the sequence of An.
In one embodiment, as shown in Fig. 2, the flash memory includes multiple (2 or more), respectively quick flashing
Memory A1, flash memory A2, (n is any nature by flash memory A3, flash memory A4 ... ... flash memory An
Number), and all flash memories 300 are all in parallel, i.e. flash memory A1, flash memory A2, flash memory A3, quick flashing
Memory A4 ... ... flash memory An is connect with power supply unit 100, flash controller 200 respectively after being connected in parallel to each other.
In one embodiment, as shown in figure 3, the power supply unit 100 includes power supply switch circuit, the power supply is cut
Changing circuit includes the first power input 101, second source input terminal 102, switching chip 103, voltage conversion chip 104 and electricity
Press output end 105.Wherein, which is connected with external dc power;The power supply switch circuit further includes
Backup power source 106, the second source input terminal 102 are connected with backup power source 106.
In one embodiment, the backup power source 106 is super capacitor.
Further, the power supply switch circuit further includes first capacitor, the second capacitor.The switching chip 103 includes
One first voltage input pin, a second voltage input pin and first voltage output pin, second voltage output pin.Institute
The first power input 101 is stated to be grounded through first capacitor and be connected with the first voltage input pin.The second source is defeated
Enter end 102 to be connected through the second capacity earth and with the second voltage input pin.The switching chip 103 is defeated through first voltage
Pin, second voltage output pin are connected with the voltage conversion chip 104 out.The voltage conversion chip 104 includes described
Voltage output end 105, the voltage conversion chip are the power supply of solid state hard disk 10 through the voltage output end 105, and the voltage is defeated
Outlet 105 is flash memory 300, and flash controller 200 is powered.
When the use of external dc power being that Fixed disk 10 is powered, the switching chip 103 only enables first electricity
Input pin is pressed, the first power input is that the first voltage input pin input is steady after first capacitor filtering at this time
Fixed DC signal, the switching chip 103 turn the DC signal through the voltage through the voltage output pin
Changing the output of chip 104 to the voltage output end 105 is the power supply of solid state hard disk 10, while external power supply is in solid state hard disk 10
Super capacitor charging.
When external dc power stops powering, first power input 101 is inputted without DC signal, i.e., described
First voltage input pin is vacant, and the switching chip 103 enables the second voltage input pin.At this point, super capacitor passes through
DC signal is input to the second voltage input pin, while the switching chip by the second source input terminal 102
103 export the DC signal to the voltage conversion chip 104, the voltage conversion chip through voltage output pin
104 export the DC signal to solid state hard disk 10 through the voltage output end 105.
In present embodiment, the flash controller 300 is nand flash memory controller, and the flash memory is that NAND is fast
Flash memory.
As shown in figure 4, in one embodiment, optionally, the flash controller 200 includes: microprocessing unit
201, memory management module 203, flash memory interface 202, buffer storage 204, error correction mould group 205.
The microprocessing unit 201 is the overall operation to control quick flashing memory controller 200.
The flash memory interface 202 is electrically connected to the microprocessing unit 201 and to by data conversion
For the receptible format of the flash memory 300.
The buffer storage 204 is electrically connected to the microprocessing unit 201 and temporarily to store data.
In the present embodiment, the buffer storage 204 is static random access memory (static random access
Memory, SRAM).It is limited to this, dynamic random access memory (DRAM), reluctance type memory (MRAM), Ovonics unified memory
(PRAM) or other suitable memories can also be applied to the present invention.
The memory management module 203 is electrically connected to the microprocessing unit 201 and described fast to manage
Flash memory 300, such as execute average abrasion (wear leveling) method, bad block management, maintenance mapping table (mapping
Table) etc..
The error correction mould group 205 is electrically connected to microprocessing unit 201 and to calculate error-correcting code
(error correcting code) checks and corrects the data that host reads or is written.
In other embodiments, the flash controller 200 can be other suitable structures.
In a specific embodiment, solid state hard disk 10 further includes memory strip circuit board (not shown).
Further, the flash memory 300, flash controller 200, coffret, power supply unit 100 are all fixed on
In memory strip circuit board.
Further, the bottom of memory strip circuit board is provided with the golden finger for meeting DIMM specification, the solid state hard disk
10 can be inserted in dimm socket idle on cabinet mainboard.
In addition, the bottom of memory strip circuit board is provided with the golden finger for meeting DIMM specification, the DIMM in the present embodiment
Specification can be synchronous DRAM (SDRAM:Synchronous Dynamic Random Access Memory)
DIMM specification or Double Data Rate synchronous DRAM (DDR, Double Data Rate SDRAM) DIMM specification, or
Person can also standardize for other similar DIMM, such as DDR2 or DDR3 or global buffer mould group technology (FDB) etc., specifically herein
It is not construed as limiting.
The present invention also provides a kind of method of supplying power to of solid state hard disk, as shown in figure 5, in one embodiment, the confession
Method for electrically includes:
S100: power supply unit is flash memory power supply;
S200: flash memory is flash controller power supply.
Optionally, in another embodiment, the method for supplying power to further include:
S300: flash controller control flash memory be written and read, delete operation.
Solid state hard disk of the invention 10 is first powered to each flash memory 300, each flash memory 300 be powered after again to
Flash controller 200 is powered, and flash controller 300 starts to read data after being powered again, and each flash memory 300 is complete at this time
At preparing after energization, flash controller 200, which reads data, can reduce error rate, and complete number can be read without repeatedly reading
According to improving efficiency.
The preferred embodiment of the present invention has shown and described in above description, as previously described, it should be understood that the present invention is not office
Be limited to form disclosed herein, should not be regarded as an exclusion of other examples, and can be used for various other combinations, modification and
Environment, and can be changed within that scope of the inventive concept describe herein by the above teachings or related fields of technology or knowledge
It is dynamic.And changes and modifications made by those skilled in the art do not depart from the spirit and scope of the present invention, then it all should be appended by the present invention
In scope of protection of the claims.
Claims (10)
1. a kind of solid state hard disk, it is characterised in that: described for Denso including flash controller, flash memory, power supply unit
Set, flash memory, flash controller are sequentially connected, the power supply unit is first powered to each flash memory, then to flash memory control
Device power supply processed.
2. a kind of solid state hard disk according to claim 1, it is characterised in that: the solid state hard disk further includes controlling with flash memory
The coffret of device connection, the coffret is for carrying out data transmission.
3. a kind of solid state hard disk according to claim 1, it is characterised in that: the flash memory include 2 or more and
It connects each other by Flash memory bus.
4. a kind of solid state hard disk according to claim 1, it is characterised in that: the power supply unit includes power supply switching electricity
Road, the power supply switch circuit include the first power input, second source input terminal, switching chip, voltage conversion chip, institute
It states the first power input, second source input terminal to be connected with switching chip, the switching chip and the voltage are converted
Chip connection, it includes voltage output end that the voltage dress, which changes chip,.
5. a kind of solid state hard disk according to claim 4, it is characterised in that: first power input and external dc
Power supply is connected;The solid state hard disk further includes backup power source, and the second source input terminal is connect with backup power source.
6. a kind of solid state hard disk according to claim 5, it is characterised in that: the backup power source is super capacitor.
7. a kind of solid state hard disk according to claim 1, it is characterised in that: the flash controller is nand flash memory control
Device, the flash memory are NAND quick-flash memory.
8. a kind of solid state hard disk according to claim 1, it is characterised in that: the solid state hard disk further includes memory strip electricity
Road plate, the flash memory, flash controller, power supply unit are all fixed in memory strip circuit board.
9. a kind of solid state hard disk method of supplying power to, characterized by the following steps:
S100: power supply unit is flash memory power supply;
S200: flash memory is flash controller power supply.
10. method of supplying power to according to claim 10, it is characterised in that: further include following steps:
S300: flash controller control flash memory is read, is written or delete operation.
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN112232469A (en) * | 2020-09-29 | 2021-01-15 | 深圳宏芯宇电子股份有限公司 | Memory card and electronic device |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
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CN105654985A (en) * | 2016-02-02 | 2016-06-08 | 北京时代民芯科技有限公司 | Multi-power cell and time distribution electrifying system of FPGA configuration memory array |
CN106255937A (en) * | 2014-05-29 | 2016-12-21 | 苹果公司 | There is the SOC(system on a chip) of the processor being energized all the time |
-
2017
- 2017-08-23 CN CN201710727294.1A patent/CN109426322A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106255937A (en) * | 2014-05-29 | 2016-12-21 | 苹果公司 | There is the SOC(system on a chip) of the processor being energized all the time |
CN105654985A (en) * | 2016-02-02 | 2016-06-08 | 北京时代民芯科技有限公司 | Multi-power cell and time distribution electrifying system of FPGA configuration memory array |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN112232469A (en) * | 2020-09-29 | 2021-01-15 | 深圳宏芯宇电子股份有限公司 | Memory card and electronic device |
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