CN109412709B - Signal receiving and transmitting device and correction method thereof - Google Patents

Signal receiving and transmitting device and correction method thereof Download PDF

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CN109412709B
CN109412709B CN201710707190.4A CN201710707190A CN109412709B CN 109412709 B CN109412709 B CN 109412709B CN 201710707190 A CN201710707190 A CN 201710707190A CN 109412709 B CN109412709 B CN 109412709B
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signal baseband
circuit
baseband path
analysis result
path
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CN109412709A (en
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高子铭
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Realtek Semiconductor Corp
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B17/00—Monitoring; Testing
    • H04B17/10—Monitoring; Testing of transmitters
    • H04B17/11—Monitoring; Testing of transmitters for calibration
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B17/00—Monitoring; Testing
    • H04B17/20—Monitoring; Testing of receivers
    • H04B17/21—Monitoring; Testing of receivers for calibration; for correcting measurements

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Abstract

The signal transceiver comprises a transceiver circuit, a switching circuit, a compensation circuit and a correction circuit. The transceiver circuit includes a transmitter and a receiver. The switching circuit has a first setting mode and a second setting mode, wherein the transmitter is coupled to the receiver through the switching circuit. The compensation circuit analyzes the output of the receiver to obtain a first analysis result and a second analysis result, and generates a plurality of first compensation coefficients and a plurality of second compensation coefficients according to the first analysis result and the second analysis result, wherein the first analysis result corresponds to a first setting mode and the second analysis result corresponds to a second setting mode. The correction circuit corrects the transmitter according to the first compensation coefficients and corrects the receiver according to the second compensation coefficients.

Description

Signal receiving and transmitting device and correction method thereof
Technical Field
The present invention relates to a signal transceiver, and more particularly, to a mechanism and a method for calibrating channel mismatch between a transmitter and a receiver.
Background
Circuits for communication applications are common in a variety of electronic devices. In order to be able to correctly transmit or receive data, mismatches between the channels of the transceiver circuit need to be corrected. In the prior art, the channel mismatch correction mechanism of the transmitter is usually independent of the channel mismatch correction mechanism of the receiver. In other words, in the prior art, at least two independent calibration circuits are required for a single transceiver circuit to calibrate the transmitter and the receiver respectively.
Disclosure of Invention
To solve the above problems, an aspect of the present invention is to provide a signal transceiver. The signal transceiver comprises a transceiver circuit, a switching circuit, a compensation circuit and a correction circuit. The transceiver circuit includes a transmitter and a receiver. The switching circuit has a first setting mode and a second setting mode, wherein the transmitter is coupled to the receiver through the switching circuit. The compensation circuit is used for analyzing the output of the receiver to obtain a first analysis result and a second analysis result, and generating a plurality of first compensation coefficients and a plurality of second compensation coefficients according to the first analysis result and the second analysis result, wherein the first analysis result corresponds to a first setting mode, and the second analysis result corresponds to a second setting mode. The correction circuit is used for correcting the transmitter according to the first compensation coefficients and correcting the receiver according to the second compensation coefficients.
One aspect of the present invention is to provide a signal transceiver. The signal transceiver comprises a transceiver circuit, a compensation circuit and a correction circuit. The transceiver circuit includes a transmitter and a receiver. The transmitter includes a first in-phase signal baseband path and a first quadrature signal baseband path, and the receiver includes a second in-phase signal baseband path and a second quadrature signal baseband path. The compensation circuit is used for generating a plurality of first compensation coefficients and a plurality of second compensation coefficients according to a first analysis result and a second analysis result which are related to the output of the receiver. The compensation circuit is further configured to obtain a first analysis result when the first in-phase signal baseband path is coupled to the second in-phase signal baseband path and the first quadrature signal baseband path is coupled to the second quadrature signal baseband path, and obtain a second analysis result when the first in-phase signal baseband path is coupled to the second quadrature signal baseband path and the first quadrature signal baseband path is coupled to the second in-phase signal baseband path. The correction circuit is used for correcting the mismatch between the first in-phase signal baseband path and the first quadrature signal baseband path according to the first compensation coefficients and correcting the mismatch between the second in-phase signal baseband path and the second quadrature signal baseband path according to the second compensation coefficients.
In one aspect of the present invention, a calibration method is provided, which includes the following operations: coupling the transmitter to the receiver through a switching circuit, wherein the switching circuit has a first setting mode and a second setting mode; analyzing the output of the receiver to obtain a first analysis result and a second analysis result, wherein the first analysis result corresponds to a first setting mode and the second analysis result corresponds to a second setting mode; and generating a plurality of first compensation coefficients and a plurality of second compensation coefficients according to the first analysis result and the second analysis result so as to respectively correct the transmitter and the receiver.
Drawings
The drawings of the invention are illustrated as follows:
fig. 1 is a schematic diagram of a signal transceiver according to some embodiments of the present invention;
FIG. 2 is a schematic diagram of the calibration circuit of FIG. 1 according to some embodiments of the invention;
fig. 3A is a schematic diagram illustrating the signal transceiver device of fig. 1 operating in a first configuration according to some embodiments of the invention;
fig. 3B is a schematic diagram illustrating the signal transceiver device of fig. 1 operating in a second configuration according to some embodiments of the invention; and
fig. 4 is a flowchart illustrating a calibration method according to some embodiments of the invention.
Description of reference numerals:
100: signal transceiver device 110: emitter
120: the receiver 130: switching circuit
140: the compensation circuit 150: correction circuit
RF-OUT: signal RF-IN: signal
111-I: digital-to-analog converter 111-Q: digital-to-analog converter
112-I, 112-Q: the baseband circuit 114: adder
113-I, 113-Q: the mixer 116: power amplifier
115: driver 121-I: analog-to-digital converter
121-Q: analog-to-digital converters 122-I, 122-Q: base frequency circuit
124: low noise amplifiers 123-I, 123-Q: frequency mixer
VC: control signal IR-I, IR-Q: output signal
141: reference coefficient generating circuit xt、yt、xr、yr: compensation factor
x1、x2、y1、y2: reference coefficient 142: processing circuit
IT-I, IT-Q: input signals 150-T, 150-R: calculation circuit
T1, T2: multipliers R1, R2: multiplier and method for generating a digital signal
T3, R3: adders SC1, SC2, SC 3: correcting signal
SC4, SC 5: the correction signal correction method comprises the following steps: 400
S410 to S460: operation of
Detailed Description
Referring to fig. 1, fig. 1 is a schematic diagram of a signal transceiver 100 according to some embodiments of the invention. The signal transceiving device 100 includes a transceiver circuit (which includes a transmitter 110 and a receiver 120), a switching circuit 130, a compensation circuit 140, and a correction circuit 150. IN some embodiments, the signal transceiver device 100 can be used to transmit a signal RF-OUT having a radio frequency (radio frequency) or receive a signal RF-IN having a radio frequency (RF frequency).
In some embodiments, the transmitter 110 includes a plurality of digital-to-analog converters (DACs) 111-I and 111-Q, a plurality of baseband circuits 112-I and 112-Q, a plurality of mixers 113-I and 113-Q, a summer 114, a driver 115, and a power amplifier 116. The DACs 111-I and 111-Q generate corresponding analog signals (not shown) to the baseband circuits 112-I and 112-Q for subsequent mixing and transmitting operations based on the input signals IT-I and IT-Q, respectively. In some embodiments, the plurality of baseband circuits 112-I and 112-Q may be implemented by filter circuits.
In some embodiments, the receiver 120 includes a plurality of analog-to-digital converters (ADCs) 121-I and 121-Q, a plurality of baseband circuits 122-I and 122-Q, a plurality of mixers 123-I and 123-Q, and a low noise amplifier 124. The ADCs 112-I and 112-Q generate output signals IR-I and IR-Q, respectively, based on the signals processed by the LNA 124, the mixers 123-I and 123-Q, and the baseband circuits 122-I and 122-Q. In some embodiments, the plurality of baseband circuits 122-I and 122-Q may be implemented by filter circuits.
In some embodiments, DAC 111-I and baseband circuit 112-I equivalently form an in-phase (in-phase) signal baseband path of transmitter 110, and DAC 111-Q and baseband circuit 112-Q equivalently form a quadrature (quadrature) signal baseband path of transmitter 110. In some embodiments, the ADC121-I and baseband circuit 122-I equivalently form an in-phase signal baseband path of the receiver 120, and the ADC 121-Q and baseband circuit 122-Q equivalently form a quadrature signal baseband path of the receiver 120. Ideally, the signal on the in-phase signal baseband path is 90 degrees out of phase with the signal on the quadrature signal baseband path.
For ease of illustration, the in-phase signal baseband path of transmitter 110 is referred to herein as path TX-I, and the quadrature signal baseband path of transmitter 110 is referred to herein as path TX-Q. The in-phase signal baseband path of receiver 120 is referred to as path RX-I, and the quadrature signal baseband path of receiver 120 is referred to as path RX-Q.
In some embodiments, the switching circuit 130 may be implemented by a plurality of switches. The switching circuit 130 is configured to selectively adopt a first setting or a second setting according to the control signal VC to couple the transmitter 110 to the receiver 120. For example, when operating in the first setting mode, the switching circuit 130 couples the output of the baseband circuit 112-I to the input of the baseband circuit 122-I and couples the input of the baseband circuit 112-Q to the input of the baseband circuit 122-Q. Alternatively, when operating in the second setting mode, the switching circuit 130 couples the output of the baseband circuit 112-I to the input of the baseband circuit 122-Q and couples the input of the baseband circuit 112-Q to the input of the baseband circuit 122-I.
In other words, when the switching circuit 130 operates in the first setting, the path TX-I is coupled to the path RX-I, and the path TX-Q is coupled to the path RX-Q. Alternatively, when the switching circuit 130 operates in the second setting, the path TX-I is coupled to the path RX-Q, and the path TX-Q is coupled to the path RX-I.
In some embodiments, the compensation circuit 140 includes a plurality of compensation coefficients x respectively generated according to the first analysis result and the second analysis resulttAnd ytAnd a plurality of compensation coefficients xrAnd yr。
For example, the compensation circuit 140 includes a reference coefficient generation circuit 141 and a processing circuit 142. In a first configuration, where the path TX-I is coupled to the path RX-I and the path TX-Q is coupled to the path RX-Q (as shown in FIG. 3A), the reference coefficient generation circuit 141 is configured to perform a spectrum analysis (e.g., Fourier transform) on the plurality of output signals IR-I and IR-Q to calculate a reference coefficient x associated with a first analysis result1With reference coefficient y1. Alternatively, in a second setting, path TX-I is coupled to path RX-Q, and path TWhen X-Q is coupled to the path RX-I (as shown in FIG. 3B), the reference coefficient generation circuit 141 is used to perform spectrum analysis on the plurality of output signals IR-I and IR-Q to calculate the reference coefficient X associated with the second analysis result2With reference coefficient y2. In this way, the processing circuit 142 can be configured to generate a plurality of reference coefficients x1And y1Calculating a plurality of compensation coefficients xtAnd ytAnd based on a plurality of reference coefficients x2And y2Calculating a plurality of compensation coefficients xrAnd yr. In addition, the reference coefficient generating circuit 141 is further used to calculate the reference coefficient x1And y1Or reference coefficient x2And y2And then outputs a control signal VC to adjust the setting mode of the switching circuit 130.
In some embodiments, the reference coefficient generation circuit 141 may be implemented by referring to the specification of the spectrum analysis circuit (spectral analysis circuit) and the correction coefficient calculation unit (correction coefficient calculation unit) of the related case (U.S. patent application No. US 14/724,781), so that the reference coefficient generation circuit 141 may generate the reference coefficient x1And y1And a reference coefficient x2And y2And will not be described herein. The above is merely exemplary, and other various circuits and/or algorithms for correcting the mismatch between the in-phase and quadrature signal paths are within the scope of the present invention.
The calibration circuit 150 includes computation circuits 150-T and 150-R. The computing circuit 150-T is coupled to the processing circuit 142 to receive the plurality of compensation coefficients xtAnd yt. The computing circuit 150-T is coupled to the paths TX-I and TX-Q and is configured to generate a plurality of compensation coefficients xtAnd ytThe mismatch between the paths TX-I and TX-Q of the transmitter 110 is corrected. The calculation circuit 150-R is coupled to the processing circuit 142 to receive the plurality of compensation coefficients xrAnd yr. The calculation circuit 150-R is coupled to the paths RX-I and RX-Q and is based on a plurality of compensation coefficients xrAnd yrThe mismatch between paths RX-I and RX-Q of receiver 120 is corrected. The description will be described with reference to fig. 2, 3A and 3B in the following paragraphs.
Refer to fig. 2. FIG. 2 is a schematic representation of some embodiments according to the inventionA schematic diagram of the correction circuit 150 as shown in fig. 1 is shown. As shown in FIG. 2, the computing circuit 150-T includes a multiplier T1, a multiplier T2, and an adder T3. The multiplier T1 is used for calculating a compensation coefficient xtAnd the input signal IT-I generates the correction signal SC1 to the DAC 111-I of FIG. 1 for subsequent processing. The multiplier T2 is used for calculating a compensation coefficient ytAnd the input signal IT-I generates the correction signal SC 2. The adder T3 is used for generating the correction signal SC3 according to the input signal IT-Q and the correction signal SC2, and outputting the correction signal SC3 to the DAC 111-Q of FIG. 1 for subsequent processing. Equivalently, the mismatch between paths TX-I and TX-Q is compensated for after processing by computational circuitry 150-T.
Furthermore, the calculation circuit 150-R includes a multiplier R1, a multiplier R2, and an adder R3. The multiplier R1 is coupled to the ADC121-I and is used for calculating a compensation coefficient xrAnd the output of ADC121-I generates the correction signal SC 4. The multiplier R2 is coupled to the ADC 121-Q and is used for calculating a compensation coefficient yrAnd the outputs of ADCs 121-Q generate correction signal SC 5. The adder R3 is used for generating the output signal IR-I according to the correction signals SC4 and SC 5. Furthermore, the output of the ADC 121-Q is directly taken as the output signal IR-Q. Equivalently, the mismatch between paths RX-I and RX-Q is compensated for after processing by computational circuit 150-R.
The following paragraphs will describe embodiments of the processing circuit 142 of fig. 1, but the invention is not limited thereto. In some related art discussions, if the gain mismatch and phase mismatch (e.g., gain/phase mismatch between TX-I and TX-Q, or gain/phase mismatch between RX-I and RX-Q) are known, the compensation factor X (e.g., X in FIG. 2) is knowntOr xr) Can be derived as X ═ 1/((1+ G) × (p)), and the compensation coefficient Y (e.g. Y of fig. 2)tOr yr) One can derive Y ═ tan (P), where G is the gain mismatch and P is the phase mismatch. For example, when the input signals IT-I and IT-Q of FIG. 2 are (1+ G) cos (ω t + P), respectivelyt) And sin (ω t), the corresponding compensation coefficient xtAnd yt1/((1+ G) × cos (P)) and tan (P), respectively. It should be noted that the mismatch due to the present invention is in the fundamental frequency path-whereas the mismatch in U.S. patent application No. US 14/724,781Is provided in a mixer (mixer) so that Y of the present invention is different from Y of US patent application No. US 14/724,781 by a negative sign. Although differing by a negative sign, since the correction coefficient calculation unit in some embodiments of U.S. patent application No. US 14/724,781 calculates X and Y with respect to the output of the spectrum analysis circuit, the reference coefficient generation circuit 141 can be realized by the correction coefficient calculation unit and the spectrum analysis circuit.
Thus, for the architecture of FIG. 2, the compensation factor xt、yt、xrAnd yrCan be derived as the following equations (1) - (4) where the gain mismatch between paths TX-I and TX-Q is GtAnd the phase mismatch therebetween is Pt. The gain mismatch between paths RX-I and RX-Q is GrAnd the phase mismatch therebetween is Pr。
Figure BDA0001381776760000061
yt＝tan(Pt)…(2)
Figure BDA0001381776760000062
yr＝tan(Pr)…(4)
Referring to fig. 3A, fig. 3A is a schematic diagram illustrating the signal receiver of fig. 1 according to some embodiments of the invention
The hair device 100 operates in a schematic diagram of a first setting. In FIG. 3A, path TX-I is coupled to path RX-I via switching circuit 130, and path TX-Q is coupled to path RX-Q via switching circuit 130. Under this condition, the reference coefficient x generated by the reference coefficient generation circuit 1411With reference coefficient y--1The following formulas (5) and (6) can be inferred:
Figure BDA0001381776760000071
referring to FIG. 3B, FIG. 3B is a diagram of some embodiments according to the inventionThe embodiment is illustrated in a schematic diagram of the signal transceiver device 100 of fig. 1 operating in a second setting mode. In FIG. 3B, path TX-I is coupled to path RX-Q via switching circuit 130, and path TX-Q is coupled to path RX-I via switching circuit 130. Under this condition, the reference coefficient x generated by the reference coefficient generation circuit 1412With reference coefficient y2The following formulas (7) and (8) can be inferred:
Figure BDA0001381776760000072
when the phases are mismatched (i.e., P) by the equations (2), (4), (6) and (8)tAnd Pr) When it is not large, the compensation coefficient y can be derivedtAnd compensation coefficient yrThe following formulas (9) and (10):
Figure BDA0001381776760000073
when the gains are mismatched (i.e. G) by the transformation of equations (1), (3), (5), (7) and variablestAnd Gr) When not large, the compensation coefficient x can be obtainedtAnd compensation factor xrThe following formulas (11) and (12):
Figure BDA0001381776760000081
in equations (9) to (12), a plurality of reference coefficients x1、x2、y1And y2May be generated by the reference coefficient generation circuit 141 of fig. 1. Accordingly, the processing circuit 142 can be designed according to equations (9) to (12). For example, in some embodiments, the processing circuit 142 may be implemented by a processor, a digital circuit or an asic performing the equations (9) to (12) to generate the compensation coefficients xt、yt、xrAnd yr. Alternatively, in other embodiments, the processing circuit 142 may be implemented by an algorithm or software executing the equations (9) to (12). Various implementations of the processing circuit 142 are within the scope of the invention.
Referring to fig. 4, fig. 4 is a flowchart illustrating a calibration method 400 according to some embodiments of the invention. For ease of description, reference is also made to fig. 1 to describe the relevant operation of the signal transceiver 100. In some embodiments, the calibration method 400 includes a plurality of operations S410-S460.
In operation S410, the switching circuit 130 couples the path TX-I to the path RX-I and couples the path TX-Q to the path RX-Q according to the control signal VC. In operation S420, the reference coefficient generation circuit 141 analyzes the output signals IR-I and IR-Q to generate the reference coefficient x1With reference coefficient y1。
For example, as shown in FIG. 3A, the output of baseband circuit 112-I is coupled to the input of baseband circuit 122-I via switching circuit 130, and the output of baseband circuit 112-Q is coupled to the input of baseband circuit 122-Q via switching circuit 130. Under this condition, the reference coefficient generating circuit 141 can generate the reference coefficient x accordingly1With reference coefficient y1。
In operation S430, the switching circuit 130 couples the path TX-I to the path RX-Q and couples the path TX-Q to the path RX-I according to the control signal VC. In operation S440, the reference coefficient generation circuit 141 analyzes the output signals IR-I and IR-Q to generate the reference coefficient x2With reference coefficient y2。
For example, as shown in FIG. 3B, the output of baseband circuit 112-I is coupled to the input of baseband circuit 122-Q via switching circuit 130, and the output of baseband circuit 112-Q is coupled to the input of baseband circuit 122-I via switching circuit 130. Under this condition, the reference coefficient generating circuit 141 can generate the reference coefficient x accordingly2With reference coefficient y2。
In operation S450, the processing circuit 142 generates a plurality of reference coefficients x1、x2、y1And y2Generating a plurality of compensation coefficients xt、yt、xrAnd yr. For example, the processing circuit 142 may calculate according to the above equations (9) to (12) to obtain a plurality of compensation coefficients xt、yt、xrAnd yr。
In operation S460, the calibration circuit 150 compensates the compensation coefficient xtAnd compensation coefficient ytCorrecting the mismatch between the paths TX-I and TX-Q and based on a compensation factor xrAnd compensation coefficient yrThe mismatch between paths RX-I and RX-Q is corrected.
For example, as shown in FIG. 2, the calculation circuit 150-T may be based on the compensation factor xtAnd compensation coefficient ytThe input signals IT-I and IT-Q are processed to correct for mismatches between the paths TX-I and TX-Q. The calculation circuit 150-R may be based on the compensation factor xrAnd compensation coefficient yrThe outputs of ADCs 121-I and 121-Q are processed to correct for mismatches between paths RX-I and RX-Q.
In some embodiments, the plurality of compensation coefficients x are not performed before the calibration method 400 is performedrAnd compensation factor xtSet to 1, and a plurality of compensation coefficients yrAnd compensation coefficient ytSet to 0 to ensure that the signal transceiving apparatus 100 can operate properly. The above numerical values are merely examples, and the present invention is not limited thereto.
In some embodiments, the input signals IT-I and IT-Q of the transmitter 110 are set to test signals having a particular frequency when the calibration method 400 is performed. In some embodiments, after the calibration method 400 is executed, the switching circuit 130 is disabled (disabled) to disconnect the connection between the transmitter 110 and the receiver 120. The above arrangement is merely an example, but the present invention is not limited thereto.
The steps of the calibration method 400 are merely exemplary, and need not be performed in the order shown in this example. Various operations under the calibration method 400 may be added, substituted, omitted, or performed in a different order, as appropriate, without departing from the manner of operation and scope of various embodiments of the disclosure.
In some related art, the mismatch between the signal transmission paths of the transmitter and the mismatch between the signal transmission paths of the receiver are usually corrected separately. In other words, in these techniques, the calibration mechanism of the transmitter and the calibration mechanism of the receiver are independent of each other. In contrast to the above-mentioned techniques, the signal transceiver 100 can share the calibration function in the baseband circuit portions of the transmitter 110 and the receiver 120A positive mechanism, and respectively generating a plurality of compensation coefficients x for correcting the transmitter 110tAnd ytAnd a plurality of compensation coefficients x for correcting the receiver 120rAnd yr。
In summary, the signal transceiver and the calibration method provided by the present invention can use the calibration mechanism to calibrate the mismatch between the transmitter and the receiver.
Although the present invention has been described with reference to the above embodiments, it should be understood that various changes and modifications can be made by those skilled in the art without departing from the spirit and scope of the invention.

Claims (8)

1. A signal transceiving apparatus, comprising:
a transceiver circuit comprising a transmitter and a receiver, wherein the receiver comprises a first in-phase signal baseband path and a first quadrature signal baseband path, and the transmitter comprises a second in-phase signal baseband path;
a switching circuit having a first configuration and a second configuration, wherein the transmitter is coupled to the receiver via the switching circuit, and wherein in the first configuration the second in-phase signal baseband path is coupled to the first in-phase signal baseband path via the switching circuit, and in the second configuration the second in-phase signal baseband path is coupled to the first quadrature signal baseband path via the switching circuit;
a compensation circuit for analyzing the output of the receiver to obtain a first analysis result and a second analysis result, and generating a plurality of first compensation coefficients and a plurality of second compensation coefficients according to the first analysis result and the second analysis result, wherein the first analysis result corresponds to the first setting mode, and the second analysis result corresponds to the second setting mode; and
and the correcting circuit is used for correcting the transmitter according to the first compensation coefficients and correcting the receiver according to the second compensation coefficients.
2. The signal transceiver device of claim 1, wherein the compensation circuit obtains the first analysis result when the switching circuit operates in the first setting and obtains the second analysis result when the switching circuit operates in the second setting.
3. The signal transceiver device of claim 1, wherein the transmitter further comprises a second orthogonal signal baseband path coupled to the first orthogonal signal baseband path via the switching circuit in the first configuration, and coupled to the first in-phase signal baseband path via the switching circuit in the second configuration.
4. A signal transceiving apparatus, comprising:
a transceiver circuit comprising a transmitter and a receiver, the transmitter comprising a first in-phase signal baseband path and a first quadrature signal baseband path, and the receiver comprising a second in-phase signal baseband path and a second quadrature signal baseband path;
a switching circuit having a first configuration and a second configuration, wherein the transmitter is coupled to the receiver via the switching circuit, and wherein in the first configuration the second in-phase signal baseband path is coupled to the first in-phase signal baseband path via the switching circuit, and in the second configuration the second in-phase signal baseband path is coupled to the first quadrature signal baseband path via the switching circuit;
a compensation circuit for generating a plurality of first compensation coefficients and a plurality of second compensation coefficients according to a first analysis result and a second analysis result associated with the output of the receiver,
the compensation circuit is further configured to obtain the first analysis result when the first in-phase signal baseband path is coupled to the second in-phase signal baseband path and the first quadrature signal baseband path is coupled to the second quadrature signal baseband path, and obtain the second analysis result when the first in-phase signal baseband path is coupled to the second quadrature signal baseband path and the first quadrature signal baseband path is coupled to the second in-phase signal baseband path; and
a correction circuit for correcting mismatch between the first in-phase signal baseband path and the first quadrature signal baseband path according to the first compensation coefficients, and for correcting mismatch between the second in-phase signal baseband path and the second quadrature signal baseband path according to the second compensation coefficients.
5. The signal transceiver device of claim 4, wherein the first quadrature signal baseband path and the first in-phase signal baseband path correspond to at least one baseband circuit of the transmitter, and the second quadrature signal baseband path and the second in-phase signal baseband path correspond to at least one baseband circuit of the receiver.
6. A calibration method, comprising:
coupling a transmitter to a receiver through a switching circuit, wherein the receiver includes a first in-phase signal baseband path and a first quadrature signal baseband path, the transmitter includes a second in-phase signal baseband path, the switching circuit has a first configuration in which the second in-phase signal baseband path is coupled to the first in-phase signal baseband path through the switching circuit and a second configuration in which the second in-phase signal baseband path is coupled to the first quadrature signal baseband path through the switching circuit;
analyzing the output of the receiver to obtain a first analysis result and a second analysis result, wherein the first analysis result corresponds to the first setting mode and the second analysis result corresponds to the second setting mode; and
and generating a plurality of first compensation coefficients and a plurality of second compensation coefficients according to the first analysis result and the second analysis result so as to respectively correct the transmitter and the receiver.
7. The calibration method of claim 6, wherein analyzing the output of the receiver comprises:
when the switching circuit is operated in the first setting mode, the output of the receiver is analyzed to obtain a first analysis result; and
when the switching circuit is operated in the second setting mode, the output of the receiver is analyzed to obtain the second analysis result.
8. The calibration method of claim 6, wherein the transmitter further comprises a second orthogonal signal baseband path coupled to the first orthogonal signal baseband path via the switching circuit in the first arrangement, and coupled to the first in-phase signal baseband path via the switching circuit in the second arrangement.
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1346544A (en) * 1999-12-14 2002-04-24 皇家菲利浦电子有限公司 Transmitter image suppression in TDD transceivers
CN1571270A (en) * 2003-04-02 2005-01-26 三星电子株式会社 Self-calibrating apparatus and method in a mobile transceiver
CN1713537A (en) * 2004-06-23 2005-12-28 瑞昱半导体股份有限公司 Correcting unit and method for mismatched phase-synchronized signal and orthogonal-phase signal
CN101442392A (en) * 2007-11-20 2009-05-27 联发科技股份有限公司 Apparatus, integrated circuit, and method of compensating iq phase mismatch

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100961260B1 (en) * 2007-12-04 2010-06-03 한국전자통신연구원 Apparatus and method for suppressing carrier feedthrough in quadrature modulator system
TWI369878B (en) * 2008-06-16 2012-08-01 Realtek Semiconductor Corp Transmitter, receiver and adjusting method for reducing i/q mismatch
US8379767B2 (en) * 2009-09-23 2013-02-19 Intel Corporation Methods and systems to compensate IQ imbalance in zero-IF tuners
TWI536779B (en) * 2014-05-29 2016-06-01 瑞昱半導體股份有限公司 Calibration method and calibration apparatus for calibrating mismatch between first signal path and second signal path of transmitter/receiver

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1346544A (en) * 1999-12-14 2002-04-24 皇家菲利浦电子有限公司 Transmitter image suppression in TDD transceivers
CN1571270A (en) * 2003-04-02 2005-01-26 三星电子株式会社 Self-calibrating apparatus and method in a mobile transceiver
CN1713537A (en) * 2004-06-23 2005-12-28 瑞昱半导体股份有限公司 Correcting unit and method for mismatched phase-synchronized signal and orthogonal-phase signal
CN101442392A (en) * 2007-11-20 2009-05-27 联发科技股份有限公司 Apparatus, integrated circuit, and method of compensating iq phase mismatch

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