CN109389925A - Display and its dynamic driving voltage compensating method - Google Patents
Display and its dynamic driving voltage compensating method Download PDFInfo
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- CN109389925A CN109389925A CN201710671827.9A CN201710671827A CN109389925A CN 109389925 A CN109389925 A CN 109389925A CN 201710671827 A CN201710671827 A CN 201710671827A CN 109389925 A CN109389925 A CN 109389925A
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- display
- sequence controller
- display panel
- control end
- main control
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
Abstract
It includes: a display panel that the present invention, which provides a kind of display and its dynamic driving voltage compensating method, display,；And time schedule controller, display picture to the display driving Combining soft control display panel according to a display drive signals and the display panel from a main control end, wherein the sequence controller is to judge whether the display drive signals generate mistake, and an error count numerical value is calculated accordingly, wherein whether the sequence controller is to judge the error count numerical value less than a predetermined threshold, if so, the sequence controller is normally shown in the display panel according to the display drive signals；If it is not, the sequence controller is one display error signal of return to the main control end, configuration is driven by the display that the main control end dynamically updates the display panel whereby.Display provided by the invention and its dynamic driving voltage compensating method can solve the display drive signals decaying of different panels manufacturer and cause the situation for showing mistake of display panel.
Description
Technical field
The present invention relates to display technology fields, in particular to a kind of display and its dynamic driving voltage compensation
Method.
Background technique
In the design of laptop in the current market, display panel is using embedded display interface
(embedded DisplayPort, eDP).In addition, sequence controller (the timing provisioned in display panel end
Controller, TCON) itself there is basic compensation mechanism.For example, when sequence controller judges that main control end is given
Display signal driving capability deficiency when, can by voltage position rank automatically up single order use.However, be used for a long time or
It is different in the configuration (layout) of the printed circuit board (PCB) of different panels manufacturer, it often can all occur showing
Thrust required by panel end is insufficient, in turn results in the abnormal situation of display.
In Qualify Phase before product export, ensure that signal quality received by display panel can meet design rule
Eye figure (eye diagram) can be used in the benchmark of model, measurement, and confirms that driving signal cannot be pressed onto the intermediate region of a figure.
However, in the case where the design of each panel manufacturing plant quotient is different, driving signal on a printed circuit there may be decaying,
And then allow the driving signal after decaying received by display panel, cause the intermediate region of a figure to be forced into.At this point, timing control
Device processed will receive the driving signal of mistake and in showing vicious picture on display panel, this will cause user and sees
There are Hua Ping or flash-point phenomenon on a display panel.
Fig. 2A is the schematic diagram for the eye figure for showing that embedded display interface signals are not extruded.As shown in Figure 2 A, work as insertion
When the eye figure of formula display interface signals is not extruded, the intermediate region 210 in eye figure can form a complete polygon.At this point,
Sequence controller can accurately judge display picture in each pixel (pixel) each bit level (for example, 0 or
1), shown picture will not generate the flower screen or flash-point phenomenon of mistake on a display panel.
Fig. 2 B is the schematic diagram for the eye figure for showing that embedded display interface signals are extruded.As shown in Figure 2 B, when embedded
When the eye figure of display interface signals is extruded, the intermediate region 220 in eye figure can not form a complete polygon.At this point,
It may when level (for example, 0 or 1) of each bit of each pixel (pixel) of the sequence controller in judgement display picture
The case where generating misjudgment, this pixel value that will cause certain pixels generate mistake, and user may also perceive display picture
Face generates the phenomenon that mistake or flash-point.
In view of this, needing a kind of display and its dynamic driving voltage compensating method to solve the above problems.
Summary of the invention
The present invention provides a kind of display, comprising: a display panel；And time schedule controller, to according to from one
The display picture of the one display driving Combining soft control display panel of a display drive signals and display panel for main control end,
In the sequence controller judge whether the display drive signals generate mistake, and calculate an error count numerical value accordingly, wherein should
Sequence controller judges the error count numerical value whether less than a predetermined threshold, if so, the sequence controller drives according to the display
Dynamic signal is normally shown in the display panel；If it is not, one display error signal of sequence controller return is to the main control end,
Configuration is driven by the display that the main control end dynamically updates the display panel whereby.
The present invention also provides a kind of dynamic driving voltage compensating method for display, which includes a timing control
Device processed and a display panel, this method comprises: using the sequence controller according to the display drive signals from a main control end
And the display picture of a display driving Combining soft control display panel of the display panel；Judge that this is aobvious using the sequence controller
Show whether driving signal generates mistake, and calculates an error count numerical value accordingly；Judge that the mistake is counted using the sequence controller
Whether number numerical value is less than a predetermined threshold, if so, using the sequence controller according to the display drive signals normally in the display
Panel is shown；And if it is not, using one display error signal of sequence controller return to the main control end, whereby by the master
Control end dynamically updates the display driving configuration of the display panel.
Detailed description of the invention
Fig. 1 is the block diagram for showing the computer system in an embodiment according to the present invention.
Fig. 2A is the schematic diagram for the eye figure for showing that embedded display interface signals are not extruded.
Fig. 2 B is the schematic diagram for the eye figure for showing that embedded display interface signals are extruded.
Fig. 3 is the process shown in an embodiment according to the present invention for the dynamic driving voltage compensating method of display
Figure.
Description of symbols:
100~computer system；
110~main control end；
111~central processing unit；
112~graphics processor；
113~coffret；
114~data line；
115~basic input/output；
120~display；
121~sequence controller；
122~display panel；
123~printed circuit board；
124~coffret；
210-220~intermediate region；
S310-S380~step.
Specific embodiment
To enable the above objects, features and advantages of the present invention to be clearer and more comprehensible, a preferred embodiment is cited below particularly, and match
Figure of description is closed, is described in detail below.
Fig. 1 is the block diagram for showing the computer system in an embodiment according to the present invention.Computer system 100 may be, for example, one
Laptop or PC.As shown in Figure 1, computer system 100 includes a main control end (host) 110 and a display 120.
Main control end 110 includes a central processing unit (central processing unit, CPU) 111, one graphics processor
(graphics processing unit, GPU) 112, one display interface 113 and a basic input/output (basic
input/output system,BIOS)115.Display 120 includes time schedule controller 121, a display panel 122, one print
Printed circuit board (printed circuit board, PCB) 123 and a display interface.
Coffret 113 and 124 may be, for example, an embedded display interface (embedded DisplayPort, eDP), but
The present invention is not limited thereto.Main control end 110 and display 120 pass through the data line between display interface 113 and 124
114 to be attached.BIOS 115 can be obtained the manufacturer of the display panel 122 by coffret 113 by display 120
And product number, and the amplitude position rank and preposition processing position rank of the driving voltage for the display panel 122 to be set are determined whereby.One
As for, the amplitude position rank of the driving voltage of display panel 122 acquired by BIOS 115 and preposition processing position rank are for master control
121 initial setting of sequence controller at 120 end of graphics processor 112 and aobvious device at end 110 to be transmitted and received display
The amplitude position rank of driving signal and preposition processing position rank.
In one embodiment, graphics processor 112 can block at the figure of (graphics card) to be individually located at a display
Manage chip.In some embodiments, graphics processor 112 can be integrated among central processing unit 111.
In one embodiment, graphics processor 112 displays signal to display 120 by the transmission of display interface 113 one, and
Can control the display signal driving voltage amplitude position rank (swing level) and preposition processing position rank (pre emphasis
Level), allow the sequence controller 121 of display 120 that can show correctly display picture on display panel 122 whereby.
In another embodiment, graphics processor 112 also can be aobvious to control using the panel driving technology that manufacturer has developed
Show the driving voltage of driving signal, such as can be adjusted using the iBoost technology of Intel.
Sequence controller 121 receives the display drive signals from main control end 110 by coffret 124, and carries out phase
The voltage compensation processing answered, then according to display drive signals after compensation deals to control the display panel 122 displays corresponding
Picture.
In one embodiment, before the factory of main control end 110, come using the testing tool (Tool kit) of a VESA standard
Measure the amplitude position rank and preposition processing position rank of the display drive signals that it is exported.For example, the position usually measured is
In the input terminal of the coffret 124 at display end, imply that the display drive signals exported from main control end 110 by eDP
When data line 114 reaches display end, it can guarantee the amplitude position rank of display drive signals and preposition processing position rank be to meet
It is set by manufacturer detected by BIOS 115.However, display manufactured by each panel vendor is before factory.
Fig. 2A is the schematic diagram for the eye figure for showing that embedded display interface signals are not extruded.The horizontal axis of eye figure is the time,
The longitudinal axis is then voltage, and sequence controller 121 is to judge that the display drive signals are to belong to patrol according to set amplitude position rank
Collect 1 or logical zero.When set amplitude position rank is bigger, sequence controller 121 more easily determines the display drive signals
Logic level, however, main control end 110 will also spend more power consumption to generate the display driving letter with large magnitude position rank
Number.In general, under the premise of the logic level of 121 energy accurate judgement display drive signals of sequence controller, amplitude position rank
Smaller better, system can reduce more power consumptions.
As shown in Figure 2 A, when the eye figure of embedded display interface signals is not extruded, the intermediate region 210 in eye figure can
Form a complete polygon.At this point, sequence controller 121 can accurately judge each pixel in display picture
(pixel) level (for example, 0 or 1) of each bit, shown picture will not generate mistake on display panel 122
Hua Ping or flash-point phenomenon.
Fig. 2 B is the schematic diagram for the eye figure for showing that embedded display interface signals are extruded.As shown in Figure 2 B, when embedded
When the eye figure of display interface signals is extruded, the intermediate region 220 in eye figure can not form a complete polygon.At this point,
It can when level (for example, 0 or 1) of each bit of each pixel (pixel) of the sequence controller 121 in judgement display picture
The case where capable of generating misjudgment, this pixel value that will cause certain pixels generate mistake, and user may also perceive aobvious
Show the phenomenon that picture generates mistake or flash-point.
In one embodiment, when computer system 100 is switched on, BIOS 115 can first read group of pictures and set (GOP
Setting), and by data line 114 and coffret 113 by display 120 its extension of displaying identified data is read
(extended display identification data, EDID) is to obtain manufacturer and its production of display panel 122
Product number (product number), and can confirm the associated drives setup parameter of display panel 122, e.g. amplitude position rank and
Preposition processing position rank.
Then, sequence controller 121 can confirm the signal quality of the display drive signals from main control end 110, and carry out
Automatic training (auto training).For example, sequence controller 121 understands the first phase according to acquired display panel 122
Driving setup parameter is closed to be set, after the completion of setting, can normal control display panel 122 shown.When in work
When making state, sequence controller 121 also can constantly confirm whether received display drive signals are abnormal.
Whenever judging that received display drive signals are abnormal, error count is miscalculated in 121 accounting of sequence controller
Number numerical value (such as the buffer that can be stored in sequence controller 121), and added 1.When error count numerical value is accumulate to
When one predetermined threshold, sequence controller 121, which then judges display picture, may generate unexpected abnormal conditions.At this point,
Error count numerical value calculated can be then reported to main control end 110 by sequence controller 121.
The situation that display drive signals generate mistake may be that amplitude position rank is insufficient or preposition processing position rank is insufficient, cause
The case where intermediate region in eye figure generates extruding in turn results in sequence controller 121 in the logic electricity for the bit for judging pixel
Mistake can usually be generated.As long as sequence controller 121 has detected display drive signals, an error has occurred, every time can be by mistake
Count value adds 1.In some embodiments, error count numerical value can be sent out for the mistake accumulated after the booting of computer system 100
Raw number.In further embodiments, error count numerical value can be periodically to calculate the mistake accumulated within during one
Frequency.
Then, the BIOS 115 in main control end 110 then will be updated amplitude position rank, preposition processing position rank or using other
The adjustment technology (such as iBoost technology of Intel) of display driving carrys out dynamic and adjusts the display drive exported from main control end 110
The amplitude position rank and/or preposition processing position rank of dynamic signal.It, can be by computer system 100 after BIOS115 updates display driving configuration
It turns back on to apply new display and drive configuration.
For example, if the amplitude position rank of 122 initial settings of display panel is 400mV, and preposition processing position rank is
0dB, but initial setting will cause the excessively high situation of error count numerical value.At this point, sequence controller 121 can be reported to error count
Numerical value is to main control end 110.At this point, it is 400mV that display driving configuration can be updated to amplitude position rank by BIOS 115, in addition preposition place
Reason position rank is 3.5dB, then can avoid generating the excessively high situation of error count numerical value.
In another embodiment, it is 400mV that display driving configuration can be maintained amplitude position rank by BIOS 115, in addition preposition
Processing position rank is 0dB, but joined the iBoost technology of Intel, also can avoid generating the excessively high situation of error count numerical value.
In another embodiment, it is 600mV that display driving configuration can be updated to amplitude position rank by BIOS 115, in addition preposition
Processing position rank is 0dB, same to can avoid generating the excessively high situation of error count numerical value.
Need to understand when because the technical specification of the display panel of each panel vendor is different, therefore when error count occurs
When the excessively high situation of numerical value, the adjustment mode for the display driving configuration being applicable in may be also not identical.In some cases, it can be possible to
Needing to carry out multiple adjustment could allow error count numerical value to maintain in reasonable range.
In a situation, when computer system 100 is switched on, if the display driving configuration of initial setting is not inconsistent sequence controller
121 requirement, then the error count numerical value calculated of sequence controller 121 can quickly reach the predetermined threshold, timing control
Error count numerical value can be then reported to main control end 110 by device 121, and update display driving configuration by BIOS 115, and by computer
100 boots of system, user only may feel that the start process of computer system 100 slightly long a bit, but not influence normal
It uses.
Fig. 3 is the process shown in an embodiment according to the present invention for the dynamic driving voltage compensating method of display
Figure.It please also refer to Fig. 1 and Fig. 3, in step S310, start computer system 110.A figure is read in step S320, BIOS 115
As group sets.
In step S330, the extension of displaying identified data (EDID) of display panel 122 is read to confirm the one of display panel
Product number.At this point, main control end 110 and sequence controller 121 can be learnt according to the product number of acquired display panel
The adjustment modes of its relevant display driving setting and its voltage amplitude position rank and preposition processing position rank.
In step S340, one of the embedded display interface signals from main control end 110 is checked using sequence controller 121
Error count quantity.
In step S350, judge the error count quantity whether less than a predetermined threshold T.If so, normally showing picture
In display 120.If it is not, then showing error signal to BIOS 115 to update display using the return of sequence controller 121 one
It drives configuration (step S370).
In step S380, computer system 100 is restarted and updates group of pictures setting.
In conclusion the present invention provides a kind of display and its dynamic driving compensation method, using sequence controller
Constantly detect whether the display drive signals (e.g. one embedded display interface signals) from main control end have generation mistake,
And calculate an error count numerical value of mistake occurred.When the error count numerical value is more than predetermined threshold, sequence controller
Error count numerical value or relevant display error signal can be reported to main control end, BIOS is allowed to dynamically update display whereby
The driving configuration of device, the display mistake of display panel is decayed and caused to the display drive signals of solution different panels manufacturer whereby
Situation.
Though the present invention is disclosed as above with preferred embodiment, the range that however, it is not to limit the invention, any affiliated skill
Technical staff in art field, without departing from the spirit and scope of the invention, when a little variation and retouching, therefore this hair can be done
Bright protection scope is subject to view as defined in claim.
Claims (10)
1. a kind of display, comprising:
One display panel；And
Time schedule controller, to the display driving according to a display drive signals and the display panel from a main control end
The display picture of the Combining soft control display panel,
Wherein the sequence controller judges whether the display drive signals generate mistake, and calculates an error count numerical value accordingly,
Wherein the sequence controller judge the error count numerical value whether less than a predetermined threshold,
If so, the sequence controller is normally shown in the display panel according to the display drive signals；
If it is not, one display error signal of sequence controller return dynamically updates this by the main control end whereby to the main control end
The display of display panel drives configuration.
2. display as described in claim 1, wherein the sequence controller is by embedded display interface (eDP) by the master control
End receives the display drive signals.
3. display as described in claim 1, wherein the display driving configuration of the display panel includes a voltage amplitude position rank
An and/or preposition processing position rank.
4. display as described in claim 1, wherein the display driving configuration of the display panel passes through the iBoost skill of Intel
Art is updated into mobile state.
5. display as described in claim 1, wherein a basic input/output of the main control end is to update the display
The display of panel drives configuration.
6. a kind of dynamic driving voltage compensating method for display, which includes time schedule controller and a display surface
Plate, this method comprises:
A display driving using the sequence controller according to a display drive signals and the display panel from a main control end
The display picture of the Combining soft control display panel；
Judge whether the display drive signals generate mistake using the sequence controller, and calculates an error count numerical value accordingly；
Using the sequence controller judge the error count numerical value whether less than a predetermined threshold,
If so, normally being shown in the display panel using the sequence controller according to the display drive signals；And
If it is not, using one display error signal of sequence controller return to the main control end, whereby dynamically more by the main control end
The display of the new display panel drives configuration.
7. method as claimed in claim 6, wherein the sequence controller is received by embedded display interface by the main control end
The display drive signals.
8. method as claimed in claim 6, wherein the display panel display driving configuration include a voltage amplitude position rank and/
An or preposition processing position rank.
9. method as claimed in claim 6, the iBoost technology that wherein the display driving configuration of the display panel passes through Intel
It is updated into mobile state.
10. method as claimed in claim 6, further includes:
Configuration is driven by the display that a basic input/output of the main control end updates the display panel.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710671827.9A CN109389925A (en) | 2017-08-08 | 2017-08-08 | Display and its dynamic driving voltage compensating method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710671827.9A CN109389925A (en) | 2017-08-08 | 2017-08-08 | Display and its dynamic driving voltage compensating method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN109389925A true CN109389925A (en) | 2019-02-26 |
Family
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710671827.9A Withdrawn CN109389925A (en) | 2017-08-08 | 2017-08-08 | Display and its dynamic driving voltage compensating method |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111883036A (en) * | 2020-07-28 | 2020-11-03 | 华兴源创(成都)科技有限公司 | Compensation method and compensation device of display panel |
| CN113096595A (en) * | 2020-01-08 | 2021-07-09 | 敦泰电子股份有限公司 | Panel module, display driving integrated circuit and method for restarting abnormal voltage of display driving integrated circuit |
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|---|---|---|---|---|
| US20100277514A1 (en) * | 2009-04-30 | 2010-11-04 | Yeo Dong-Min | Method for driving a light source module and display apparatus for performing the method |
| US20130036335A1 (en) * | 2011-08-05 | 2013-02-07 | Apple Inc. | Devices and methods for bit error rate monitoring of intra-panel data link |
| US20130094557A1 (en) * | 2011-10-14 | 2013-04-18 | Colin Whitby-Strevens | Methods and apparatus for low power audio visual interface calibration |
| US20150154943A1 (en) * | 2013-12-03 | 2015-06-04 | Samsung Electronics Co., Ltd. | Timing Controller, Source Driver, and Display Driver Integrated Circuit Having Improved Test Efficiency and Method of Operating Display Driving Circuit |
-
2017
- 2017-08-08 CN CN201710671827.9A patent/CN109389925A/en not_active Withdrawn
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100277514A1 (en) * | 2009-04-30 | 2010-11-04 | Yeo Dong-Min | Method for driving a light source module and display apparatus for performing the method |
| US20130036335A1 (en) * | 2011-08-05 | 2013-02-07 | Apple Inc. | Devices and methods for bit error rate monitoring of intra-panel data link |
| US20130094557A1 (en) * | 2011-10-14 | 2013-04-18 | Colin Whitby-Strevens | Methods and apparatus for low power audio visual interface calibration |
| US20150154943A1 (en) * | 2013-12-03 | 2015-06-04 | Samsung Electronics Co., Ltd. | Timing Controller, Source Driver, and Display Driver Integrated Circuit Having Improved Test Efficiency and Method of Operating Display Driving Circuit |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113096595A (en) * | 2020-01-08 | 2021-07-09 | 敦泰电子股份有限公司 | Panel module, display driving integrated circuit and method for restarting abnormal voltage of display driving integrated circuit |
| CN111883036A (en) * | 2020-07-28 | 2020-11-03 | 华兴源创(成都)科技有限公司 | Compensation method and compensation device of display panel |
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