CN109388835B - Data voting method and equipment - Google Patents
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Abstract
The application provides a data voting method and equipment, wherein the data voting method comprises the following steps: the first processing control unit sends first data to be voted to the second processing control unit and receives second data to be voted in a synchronous task period; storing the first data to be voted and the second data to be voted in a programmable logic device; performing data voting to obtain a first data voting result after the programmable logic device performs congruent voting on the first data to be voted and the second data to be voted; sending the first data voting result to a second processing control unit, and receiving a second data voting result sent by the second processing control unit; and processing the first data according to the first data voting result and the second data voting result. The method and the device can realize the voting of two data based on the SoC, improve the electromagnetic compatibility characteristic of the application electronic system and enable the performance of the application electronic system to be close to an ideal design target.
Description
Technical Field
The present application relates to the field of data control technologies, and in particular, to a data voting method and device.
Background
In the design of the traditional application electronic system, the whole system needs to be integrated according to the functional modules required by the design, namely, a corresponding integrated circuit is searched according to the functions required by the design, and then the connection form and parameters of the selected circuit are designed according to the technical indexes required by the design. The result of this design is a distributed application electronics system architecture based on functional integrated circuits. Whether the design result can satisfy the design requirement depends not only on the technical parameters of the Circuit chip, but also on the electromagnetic compatibility of the Printed Circuit Board (PCB). Meanwhile, for a system which needs to realize digitization, a single chip microcomputer and the like are often required to participate, so that the influence of a distributed system on the circuit firmware characteristics must be considered. Obviously, the traditional application electronic system is realized by adopting a distributed function synthesis technology, and the performance of the traditional application electronic system is influenced by various factors and is often far away from the ideal design target.
Disclosure of Invention
The present application is directed to solving, at least to some extent, one of the technical problems in the related art.
Therefore, a first objective of the present application is to provide a data voting method to achieve two-out voting of data based on a System on Chip (SoC), so as to improve the electromagnetic compatibility of the application electronic System and make the performance of the application electronic System approach to an ideal design target.
A second object of the present application is to propose a data voting device.
A third object of the present application is to propose a non-transitory computer-readable storage medium.
To achieve the above object, an embodiment of a first aspect of the present application provides a data voting method, including: the method comprises the steps that a first processing control unit sends first data to be voted to a second processing control unit in a synchronous task period, and receives second data to be voted sent by the second processing control unit; storing the first data to be voted and the second data to be voted in a programmable logic device of the first processing control unit; performing data voting to obtain a first data voting result after the programmable logic device of the first processing control unit performs congruent voting on the first data to be voted and the second data to be voted; sending the first data voting result to the second processing control unit, and receiving a second data voting result sent by the second processing control unit; and processing the first data according to the first data voting result and the second data voting result.
In the data voting method of the embodiment of the application, a first processing control unit sends first data to be voted to a second processing control unit and receives second data to be voted sent by the second processing control unit in a synchronous task period, then the first data to be voted and the second data to be voted are stored in a programmable logic device of the first processing control unit for data voting, a first data voting result obtained by performing congruent voting on the first data to be voted and the second data to be voted by the programmable logic device of the first processing control unit is obtained, finally the first data voting result is sent to the second processing control unit and a second data voting result sent by the second processing control unit is received, the first data is processed according to the first data voting result and the second data voting result, the first processing control unit is a first SoC processing control unit, and the second processing control unit is a second SoC processing control unit, so that two-out voting of data based on SoC can be realized, the electromagnetic compatibility characteristic of the application electronic system is improved, the performance of the application electronic system is close to an ideal design target, and the power consumption and the realization cost of the application electronic system are reduced.
To achieve the above object, an embodiment of a second aspect of the present application provides a data voting device, including: the device comprises a first processing control unit, a second processing control unit and a serial communication unit; the first processing control unit is used for sending first data to be voted to the second processing control unit and receiving second data to be voted sent by the second processing control unit in a synchronous task period; storing the first data to be voted and the second data to be voted in a programmable logic device of the first processing control unit; performing data voting to obtain a first data voting result after the programmable logic device of the first processing control unit performs congruent voting on the first data to be voted and the second data to be voted; sending the first data voting result to the second processing control unit, and receiving a second data voting result sent by the second processing control unit; processing the first data according to the first data voting result and the second data voting result; and the second processing control unit is used for sending second data to be voted to the first processing control unit and sending a second data voting result to the first processing control unit.
In the data voting equipment of the embodiment of the application, a first processing control unit sends first data to be voted to a second processing control unit and receives second data to be voted sent by the second processing control unit in a synchronous task period, then the first processing control unit stores the first data to be voted and the second data to be voted in a programmable logic device of the first processing control unit for data voting, obtains a first data voting result obtained by the programmable logic device of the first processing control unit after the first data to be voted and the second data to be voted are voted equally, finally sends the first data voting result to the second processing control unit and receives a second data voting result sent by the second processing control unit, and processes the first data according to the first data voting result and the second data voting result, the first processing control unit is a first SoC processing control unit, and the second processing control unit is a second SoC processing control unit, so that two-out voting of data based on SoC can be realized, the electromagnetic compatibility characteristic of the application electronic system is improved, the performance of the application electronic system is close to an ideal design target, and the power consumption and the realization cost of the application electronic system are reduced.
To achieve the above object, a non-transitory computer-readable storage medium is provided in an embodiment of the third aspect of the present application, on which a computer program is stored, and the computer program, when executed by a processor, implements the method as described above.
Additional aspects and advantages of the present application will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the present application.
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The foregoing and/or additional aspects and advantages of the present application will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
FIG. 1 is a flow chart of an embodiment of a data voting method of the present application;
FIG. 2 is a flow chart of another embodiment of a data voting method according to the present application;
FIG. 3 is a schematic diagram illustrating an embodiment of a service process in the data voting method according to the present application;
FIG. 4 is a flow chart of another embodiment of a data voting method according to the present application;
FIG. 5 is a flow chart of yet another embodiment of a data voting method according to the present application;
FIG. 6 is a schematic structural diagram of an embodiment of a data voting device according to the present application.
Detailed Description
Reference will now be made in detail to embodiments of the present application, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are exemplary and intended to be used for explaining the present application and should not be construed as limiting the present application.
For SoC, the application electronic system is designed according to the function and parameter requirements, but the design is substantially different from the traditional application electronic system. The SoC is not a distributed system integration technology based on functional circuits, but a system firmware and circuit integration technology based on a functional IP core multiplexing technology. Firstly, the realization of the application electronic system function does not integrate the function circuit any more, but integrates the circuit aiming at the whole system firmware realization, namely, the whole system is integrated by using the IP technology. Secondly, the final result of the circuit design is related to the IP functional module and the firmware characteristics, and is basically unrelated to the way of circuit partitioning and the wiring technology on the PCB. Therefore, the electromagnetic compatibility characteristic of the design result is greatly improved. In other words, it is the result of the design that is very close to the ideal design goal.
The key technologies of SoC design mainly comprise a bus architecture technology, an IP core multiplexing technology, a software and hardware collaborative design technology, a SoC verification technology, a testability design technology, a low-power-consumption design technology, an ultra-deep submicron circuit implementation technology and the like, and embedded software transplantation, development and research are also needed, so that the SoC design is an interdisciplinary emerging research field.
Fig. 1 is a flowchart of an embodiment of a data voting method according to the present application, as shown in fig. 1, the method may include:
And 102, storing the first data to be voted and the second data to be voted in a programmable logic device of the first processing control unit.
The Programmable logic device of the first processing control unit may be a Field Programmable Gate Array (FPGA), which may also be other Programmable logic devices, such as: the present embodiment does not limit the specific form of the Complex Programmable Logic Device (CPLD).
And 103, performing data voting to obtain a first data voting result after the programmable logic device of the first processing control unit performs congruent voting on the first data to be voted and the second data to be voted.
In this embodiment, the first processing control unit initiates data voting, the programmable logic device of the first processing control unit performs congruent voting on the first data to be voted and the second data to be voted that are stored in the programmable logic device, and then the first processing control unit obtains a first data voting result of the programmable logic device of the first processing control unit.
And 104, sending the first data voting result to the second processing control unit, and receiving a second data voting result sent by the second processing control unit.
And 105, processing the first data according to the first data voting result and the second data voting result.
In this embodiment, after obtaining the first data voting result, the first processing control unit sends the first data voting result to the second processing control unit, and receives the second data voting result sent by the second processing control unit, that is, the first processing control unit exchanges the data voting result with the second processing control unit, and the subsequent first processing control unit processes the first data according to the first data voting result and the second data voting result.
In this embodiment, the first processing control unit is a first SoC processing control unit, and the second processing control unit is a second SoC processing control unit.
In the data voting method, a first processing control unit sends first data to be voted to a second processing control unit and receives second data to be voted sent by the second processing control unit in a synchronous task period, then the first data to be voted and the second data to be voted are stored in a programmable logic device of the first processing control unit for data voting, a first data voting result obtained after the programmable logic device of the first processing control unit votes the first data to be voted and the second data to be voted equally is obtained, finally the first data voting result is sent to the second processing control unit and a second data voting result sent by the second processing control unit is received, and the first data is processed according to the first data voting result and the second data voting result, the first processing control unit is a first SoC processing control unit, and the second processing control unit is a second SoC processing control unit, so that two-out voting of data based on SoC can be realized, the electromagnetic compatibility characteristic of the application electronic system is improved, the performance of the application electronic system is close to an ideal design target, and the power consumption and the realization cost of the application electronic system are reduced.
Fig. 2 is a flowchart of another embodiment of the data voting method, as shown in fig. 2, in the embodiment shown in fig. 1 of the present application, step 101 may include:
In this embodiment, the first processing control unit and the second processing control unit are electrically isolated and are respectively connected to the serial communication unit. The serial communication unit is digital isolation communication, and in the embodiment, 8 channels are used to realize full-duplex communication.
Further, after the first processing control unit sends the first data to be voted to the second processing control unit in the synchronous task period, the first processing control unit may also receive a data response sent by the second processing control unit through the serial communication unit;
after receiving the second data to be voted sent by the second processing control unit, a data response may also be sent to the second processing control unit through the serial communication unit.
That is to say, in this embodiment, in order to ensure the integrity and the state of the data, a response is required in the process of transmitting the data to be voted, as shown in fig. 3, fig. 3 is a schematic diagram of an embodiment of a service process in the data voting method of the present application, and as can be seen from fig. 3, the process of transmitting the data to be voted may be initiated by one processing control unit, and the other processing control unit performs response confirmation.
Fig. 4 is a flowchart of another embodiment of the data voting method, as shown in fig. 4, in the embodiment shown in fig. 1 of the present application, before step 103, the method may further include:
That is to say, before performing data voting, the first processing control unit needs to exchange a control command with the second processing control unit to obtain the data transmission status of the first data to be voted, and referring to fig. 3 as well, the interaction process of the control command may also be initiated by one processing control unit, and the other processing control unit performs response confirmation.
Fig. 5 is a flowchart of a further embodiment of the data voting method, as shown in fig. 5, in the embodiment shown in fig. 1 of the present application, step 104 may include:
Referring to fig. 3, the interactive process of the data voting result may also be initiated by one processing control unit, and the other processing control unit performs response confirmation.
The data voting method provided by the embodiment of the application is a two-out voting method realized based on the SoC. The key technologies of the SoC mainly comprise a bus architecture technology, an IP core multiplexing technology, a software and hardware collaborative design technology, an SoC verification technology, a testability design technology, a low-power design technology and an ultra-deep submicron circuit. The method has obvious advantages in aspects of performance, cost, power consumption, reliability, life cycle and application range. The data voting method provided by the embodiment is based on the SoC-FPGA, high-speed digital isolation serial communication is realized, parallel processing is realized, and the data voting method is programmable and has high real-time performance; and reliable data transmission and data synchronization are realized through three data transmission service protocols.
Fig. 6 is a schematic structural diagram of an embodiment of the data voting device in the present application, and as shown in fig. 6, the data voting device may include: a first process control unit 61, a second process control unit 62, and a serial communication unit 63; wherein the first process control unit 61 includes a programmable logic device 611;
the first processing control unit 61 is configured to send first data to be voted to the second processing control unit 62 and receive second data to be voted sent by the second processing control unit 62 in a synchronous task period; storing the first data to be voted and the second data to be voted in the programmable logic device of the first processing control unit 61; performing data voting to obtain a first data voting result obtained by performing congruent voting on the first data to be voted and the second data to be voted by the programmable logic device of the first processing control unit 61; sending the first data voting result to the second processing control unit 62, and receiving a second data voting result sent by the second processing control unit 62; processing the first data according to the first data voting result and the second data voting result;
and a second processing control unit 62, configured to send the second data to be voted to the first processing control unit 61, and send the second data voting result to the first processing control unit 61.
The programmable logic device of the first processing control unit 61 may be an FPGA in the first processing control unit 61, and of course, the programmable logic device may also adopt other programmable logic devices, for example: the CPLD, which is a specific form of the programmable logic device, is not limited in this embodiment.
In this embodiment, the first processing control unit 61 initiates data voting, the programmable logic device 611 of the first processing control unit 61 performs congruent voting on the first data to be voted and the second data to be voted, which are stored in the programmable logic device 611, and then the first processing control unit 61 obtains a first data voting result of the programmable logic device 611 of the first processing control unit 61.
In this embodiment, after the first processing control unit 61 obtains the first data voting result, the first data voting result is sent to the second processing control unit 62, and the second data voting result sent by the second processing control unit 62 is received, that is, the first processing control unit 61 and the second processing control unit 62 exchange the data voting result, and then the first processing control unit 61 processes the first data according to the first data voting result and the second data voting result.
In this embodiment, the first process control unit 61 may be a first SoC process control unit, and the second process control unit 62 may be a second SoC process control unit.
In this embodiment, the first processing control unit 61 is specifically configured to send, in a synchronous task cycle, first data to be voted to the second processing control unit 62 through the serial communication unit 63, and receive second data to be voted, which is sent by the second processing control unit 62 through the serial communication unit 63.
In this embodiment, the first processing control unit 61 and the second processing control unit 62 are electrically isolated and connected to the serial communication unit 63, respectively. The serial communication unit 63 is digital isolation communication, and in the present embodiment, 8 channels are used to implement full duplex communication.
Further, the first processing control unit 61 is further configured to receive a data response sent by the second processing control unit 62 through the serial communication unit 63 after sending the first data to be voted to the second processing control unit 62; and after receiving the second data to be voted, which is transmitted from the second process control unit 62, transmitting a data response to the second process control unit 62 through the serial communication unit 63.
That is to say, in this embodiment, in order to ensure the integrity and the state of the data, the process of transmitting the data to be voted needs to be answered, as shown in fig. 3, the process of transmitting the data to be voted may be initiated by one processing control unit, and the other processing control unit performs response confirmation.
Further, the first process control unit 61 is further configured to send a control command request to the second process control unit 62 through the serial communication unit 63 before performing data voting; receiving a control command response sent by the second processing control unit 62 through the serial communication unit 63, where the control command response carries data transmission status information of the first data to be voted after transmission; and receiving a control command request sent by the second processing control unit 62 through the serial communication unit 63, and sending a control command response to the second processing control unit 62 through the serial communication unit 63, where the control command response carries data transmission status information of the second data transmission to be voted.
That is, before performing data voting, the first processing control unit 61 needs to exchange a control command with the second processing control unit 62 to obtain the data transmission status of the first data to be voted, and referring to fig. 3 as well, the interaction process of the control command may also be initiated by one processing control unit and the response confirmation by the other processing control unit.
In this embodiment, the first processing control unit 61 is specifically configured to send the first data voting result to the second processing control unit 62 through the serial communication unit 63, and receive the second data voting result sent by the second processing control unit 62 through the serial communication unit 63.
Referring to fig. 3, the interactive process of the data voting result may also be initiated by one processing control unit, and the other processing control unit performs response confirmation.
The data voting equipment provided by the embodiment of the application is two-out voting equipment realized based on the SoC. The key technologies of the SoC mainly comprise a bus architecture technology, an IP core multiplexing technology, a software and hardware collaborative design technology, an SoC verification technology, a testability design technology, a low-power design technology and an ultra-deep submicron circuit. The method has obvious advantages in aspects of performance, cost, power consumption, reliability, life cycle and application range. The data voting equipment provided by the embodiment is based on the SoC-FPGA, realizes high-speed digital isolation serial communication, parallel processing, programmability and high real-time performance; and reliable data transmission and data synchronization are realized through three data transmission service protocols.
The present application also provides a non-transitory computer-readable storage medium, on which a computer program is stored, where the computer program, when executed by a processor, implements the data voting method provided in the embodiments of the present application.
The non-transitory computer readable storage medium described above may take any combination of one or more computer readable media. The computer readable medium may be a computer readable signal medium or a computer readable storage medium. A computer readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples (a non-exhaustive list) of the computer readable storage medium would include the following: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a Read Only Memory (ROM), an Erasable Programmable Read Only Memory (EPROM), a flash Memory, an optical fiber, a portable compact disc Read Only Memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the context of this document, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.
A computer readable signal medium may include a propagated data signal with computer readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated data signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device.
Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.
Computer program code for carrying out operations for aspects of the present application may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, Smalltalk, C + +, and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of Network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet service provider).
In the description herein, reference to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the application. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present application, "plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
Any process or method descriptions in flow charts or otherwise described herein may be understood as representing modules, segments, or portions of code which include one or more executable instructions for implementing steps of a custom logic function or process, and alternate implementations are included within the scope of the preferred embodiment of the present application in which functions may be executed out of order from that shown or discussed, including substantially concurrently or in reverse order, depending on the functionality involved, as would be understood by those reasonably skilled in the art of the present application.
The logic and/or steps represented in the flowcharts or otherwise described herein, e.g., an ordered listing of executable instructions that can be considered to implement logical functions, can be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions. For the purposes of this description, a "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of the computer-readable medium would include the following: an electrical connection portion (electronic device) having one or more wires, a portable computer cartridge (magnetic device), a Random Access Memory (RAM), a Read Only Memory (ROM), an Erasable Programmable Read Only Memory (EPROM) or a flash Memory, an optical fiber device, and a portable Compact Disc Read Only Memory (CD-ROM). Additionally, the computer-readable medium could even be paper or another suitable medium upon which the program is printed, as the program can be electronically captured, via for instance optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner if necessary, and then stored in a computer memory.
It should be understood that portions of the present application may be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, the various steps or methods may be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. If implemented in hardware, as in another embodiment, any one or combination of the following techniques, which are known in the art, may be used: a discrete logic circuit having a logic Gate circuit for implementing a logic function on a data signal, an asic having an appropriate combinational logic Gate circuit, a Programmable Gate Array (PGA), a Field Programmable Gate Array (FPGA), and the like.
It will be understood by those skilled in the art that all or part of the steps carried by the method for implementing the above embodiments may be implemented by hardware related to instructions of a program, which may be stored in a computer readable storage medium, and when the program is executed, the program includes one or a combination of the steps of the method embodiments.
In addition, functional units in the embodiments of the present application may be integrated into one processing module, or each unit may exist alone physically, or two or more units are integrated into one module. The integrated module can be realized in a hardware mode, and can also be realized in a software functional module mode. The integrated module, if implemented in the form of a software functional module and sold or used as a stand-alone product, may also be stored in a computer readable storage medium.
The storage medium mentioned above may be a read-only memory, a magnetic or optical disk, etc. Although embodiments of the present application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present application, and that variations, modifications, substitutions and alterations may be made to the above embodiments by those of ordinary skill in the art within the scope of the present application.
Claims (9)
1. A method of data voting, comprising:
the method comprises the steps that a first processing control unit sends first data to be voted to a second processing control unit in a synchronous task period, and receives second data to be voted sent by the second processing control unit;
storing the first data to be voted and the second data to be voted in a programmable logic device of the first processing control unit;
sending a control command request to the second process control unit through a serial communication unit; receiving a control command response sent by the second processing control unit through the serial communication unit, wherein the control command response carries data transmission state information of the completion of the transmission of the first data to be voted; and the number of the first and second groups,
receiving a control command request sent by the second processing control unit through the serial communication unit, and sending a control command response to the second processing control unit through the serial communication unit, wherein the control command response carries data transmission state information of the completion of the transmission of the second data to be voted;
performing data voting to obtain a first data voting result after the programmable logic device of the first processing control unit performs congruent voting on the first data to be voted and the second data to be voted;
sending the first data voting result to the second processing control unit, and receiving a second data voting result sent by the second processing control unit;
and processing the first data according to the first data voting result and the second data voting result, wherein the first processing control unit and the second processing control unit are electrically isolated, the first processing control unit is a first system on chip (SoC) processing control unit, and the second processing control unit is a second SoC processing control unit.
2. The method of claim 1, wherein sending, by the first processing control unit, first data to be voted to a second processing control unit and receiving, by the second processing control unit, second data to be voted during a synchronous task cycle comprises:
and the first processing control unit sends first data to be voted to the second processing control unit through the serial communication unit in a synchronous task period and receives second data to be voted sent by the second processing control unit through the serial communication unit.
3. The method of claim 1, wherein the first processing control unit, after sending the first data to be voted to the second processing control unit within the synchronous task period, further comprises:
the first processing control unit receives a data response sent by the second processing control unit through a serial communication unit;
after receiving the second data to be voted sent by the second processing control unit, the method further includes:
and sending a data response to the second processing control unit through the serial communication unit.
4. The method of claim 1, wherein sending the first data voting result to the second processing control unit and receiving a second data voting result sent by the second processing control unit comprises:
and sending the first data voting result to the second processing control unit through a serial communication unit, and receiving a second data voting result sent by the second processing control unit through the serial communication unit.
5. A data voting device, comprising: the device comprises a first processing control unit, a second processing control unit and a serial communication unit; the first processing control unit comprises a programmable logic device, wherein the first processing control unit is electrically isolated from the second processing control unit, the first processing control unit is a first system on chip (SoC) processing control unit, and the second processing control unit is a second SoC processing control unit;
the first processing control unit is used for sending first data to be voted to the second processing control unit and receiving second data to be voted sent by the second processing control unit in a synchronous task period; storing the first data to be voted and the second data to be voted in a programmable logic device of the first processing control unit; sending a control command request to the second process control unit through a serial communication unit; receiving a control command response sent by the second processing control unit through the serial communication unit, wherein the control command response carries data transmission state information of the completion of the transmission of the first data to be voted; receiving a control command request sent by the second processing control unit through the serial communication unit, and sending a control command response to the second processing control unit through the serial communication unit, wherein the control command response carries data transmission state information of the completion of the transmission of the second data to be voted; performing data voting to obtain a first data voting result after the programmable logic device of the first processing control unit performs congruent voting on the first data to be voted and the second data to be voted; sending the first data voting result to the second processing control unit, and receiving a second data voting result sent by the second processing control unit; processing the first data according to the first data voting result and the second data voting result;
and the second processing control unit is used for sending second data to be voted to the first processing control unit and sending a second data voting result to the first processing control unit.
6. The apparatus of claim 5,
the first processing control unit is specifically configured to send first data to be voted to a second processing control unit through the serial communication unit in a synchronous task period, and receive second data to be voted sent by the second processing control unit through the serial communication unit.
7. The apparatus of claim 5,
the first processing control unit is also used for receiving a data response sent by the second processing control unit through the serial communication unit after sending the first data to be voted to the second processing control unit; and after receiving the second data to be voted sent by the second processing control unit, sending a data response to the second processing control unit through the serial communication unit.
8. The apparatus of claim 5,
the first processing control unit is specifically configured to send the first data voting result to the second processing control unit through a serial communication unit, and receive a second data voting result sent by the second processing control unit through the serial communication unit.
9. A non-transitory computer-readable storage medium having stored thereon a computer program, wherein the computer program, when executed by a processor, implements the method of any one of claims 1-4.
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