CN109379304A - A kind of equity dispatching method for reducing low priority packet delay - Google Patents

A kind of equity dispatching method for reducing low priority packet delay Download PDF

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Publication number
CN109379304A
CN109379304A CN201811276225.4A CN201811276225A CN109379304A CN 109379304 A CN109379304 A CN 109379304A CN 201811276225 A CN201811276225 A CN 201811276225A CN 109379304 A CN109379304 A CN 109379304A
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queue
virtual queue
virtual
label
data packet
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CN201811276225.4A
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CN109379304B (en
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张卜方
刘淑涛
魏璇
尚云骅
刘扬
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CETC 54 Research Institute
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CETC 54 Research Institute
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/50Queue scheduling
    • H04L47/62Queue scheduling characterised by scheduling criteria
    • H04L47/6285Provisions for avoiding starvation of low priority queues
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/50Queue scheduling
    • H04L47/62Queue scheduling characterised by scheduling criteria
    • H04L47/625Queue scheduling characterised by scheduling criteria for service slots or service orders
    • H04L47/6275Queue scheduling characterised by scheduling criteria for service slots or service orders based on priority

Abstract

That the invention discloses a kind of average retardations suitable for CICQ switching fabric is low, scalability is strong, hardware realization simply reduces the equity dispatching method of low priority packet delay.It is related to high speed serialization exchange input queue's scheduling field.The present invention, when designing different allocation strategies according to the height of priority, can not take into account justice for support priority scheduling algorithm to low priority traffice, meanwhile, when in face of the demand of multi-user's different QoS, scalability is poor, the higher problem of complexity.Using this method have the advantage that can determine the maximum delay of low priority packet transmission by way of parameter configuration, and existing dispatching algorithm can be flexibly extended according to design requirement, while complexity is low, versatile suitable for all high-speed switch fabrics for supporting priority service.

Description

A kind of equity dispatching method for reducing low priority packet delay
Technical field
The present invention relates to a kind of preferable high speed serializations of fairness to exchange dispatching algorithm, it is particularly suitable for supporting priority The CICQ switched circuit of scheduling can be realized with preferable fairness and flexibility and be supported the QOS of multipriority business.
Background technique
Exchange system is mainly responsible for transmission of the data from a port to another port, it mainly includes three parts: defeated Enter port, switching fabric, control module (out).Wherein control module is the core of entire exchange system.And switching fabric and control Molding block can also be together into exchange kernel.Since the characteristics of switching fabric multiport, determines different input/output terminals Mouth can only have a cell input or output, switching fabric to want good routing algorithm, must just save in each time slot Point setting buffer area.Therefore, occur with regard to the case where You Liao input queue and output work queue.
Firstly, having several cells etc. to be output in a linear passageway X, since the input of the queue is only by queue The limitation of spatial cache size, and during output, only the cell of head of the queue participates in scheduling.Thus cause in the buffer queue Obstruction of other cells by head of the queue cell, other cells are all not involved in scheduling in the queue, so generating hol blocking (HOL) problem.By mathematical analysis it is found that the attainable maximum throughput rate of switching port is limited in 58.6%.Solution Much mainly include the following types: fenestration, accelerated process and virtual output queue method.Wherein, virtual output queue method is to solve to be somebody's turn to do The major technique of problem.
When using virtual output queue method, input competition will be introduced.Input terminal competition refers to, arrives in the same input terminal Up to multiple cells of different output ends, require to transmit in same time slot;Consequently, it is desirable to which efficiently fair dispatching algorithm solves The competition of cell input/output terminal establishes a plurality of input/output terminal connection, and controls switching fabric work, guarantees that ensuring escapement from confliction passes Defeated cell.
Summary of the invention
It, can be with using the algorithm the technical problem to be solved by the invention is to provide a kind of dispatching algorithm of efficient justice Priority polling dispatching is avoided to switch in strict priority polling dispatching and starvation.It is set using configurable threshold parameter The count threshold of scheduler effectively reduces the average retardation of lower-priority data packet, avoids the famine of certain resulting business It starves.
The technical solution adopted by the present invention are as follows:
A kind of equity dispatching method for reducing low priority packet delay, comprising the following steps:
(1) threshold parameter is configured, and input data packet is cached in input terminal, while generating the label of data packet, The label of data packet is divided into different virtual queues according to priority and target port, and is each virtual queue setting one A counter;
(2) each virtual queue issues to scheduler according to the hollow full situation of the queue and applies;
(3) scheduler selects the virtual queue authorization arbitration of highest priority, same priority from application signal set The authorization by the way of poll of the virtual queue of different target port is arbitrated;The counter of each virtual queue is counted simultaneously Number, counting rule are as follows: when virtual queue non-empty, and authorize arbitrate other virtual queues when, the Counter Value of the virtual queue Increase by 1, when counting arrival configuration threshold parameter, marking the virtual queue is over, is otherwise labeled as under;
(4) scheduler judges whether there is the virtual queue labeled as over, if so, then lock token is scheduler always The virtual queue of over, prior authorization arbitrate the queue, the over status releasing when queue is empty;Otherwise, return step (3), until all virtual queues are sky;
(5) according to arbitration result, label is read from virtual queue, selects data packet to be sent to corresponding mesh according to label Port.
Wherein, the memory space position in step (1) in label comprising input data packet, output end slogan and priority letter Breath.
Wherein, the scheduler virtual queue that lock token is over always, prior authorization arbitrate the queue in step (4), The over status releasing when queue is empty, specifically: scheduler selection highest from the virtual queue labeled as over is excellent The virtual queue authorization of first grade is arbitrated, the over virtual queue of same priority, is arbitrated with the policy authorization of poll, until the void Quasi- queue is space-time over status releasing.
Wherein, step (5) specifically:
Label is read from virtual queue according to arbitration result, extracts the storage location serial number and output of data packet in label Port numbers read corresponding data packet from input terminal buffer area according to storage location serial number, are sent out according to output end slogan in label Give the data packet to the corresponding crosspoint of output target port.
Compared with the background technology, the present invention, it has the advantages that
(1) it is logical to can be effectively reduced intermodule by way of virtual queuing differentiated service priority and target port by the present invention Traffic makes queue inherently carry priority and routing iinformation, therefore, reduces the design difficulty and complexity of dispatching algorithm.
(2) present invention calculated by way of for each virtual queuing setting counter each queue by service frequency, By being compared with preset threshold parameter, determines the limiting value of each queue, therefore, low priority traffice packet can be limited Maximum delay prevents some queue or certain business from hungry situation occur.
(3) present invention is classified by increasing the queue of over and under, has further expanded the different attribute of priority, Making the real-time of business in this way can more be guaranteed.
(4) present invention also have stronger flexibility and applicability, can in a variety of queuing switching fabrics with other Algorithm is used cooperatively, and can also be that exchange reaches preferable performance according to type of service flexible configuration threshold parameter.
Detailed description of the invention
Fig. 1 is that the present invention implements dispatching algorithm flow chart.
Fig. 2 is the label generation of present invention input packet and join the team process and virtual queue arrangement.
Fig. 3 is that the counter that the present invention is each queue setting realizes block diagram.
Fig. 4 is the functional block diagram of CICQ switching fabric of the present invention.
Specific embodiment
Explanation that the present invention will be further explained with reference to the accompanying drawing.
Referring to Fig.1, a kind of equity dispatching method for reducing low priority packet delay of the present invention the following steps are included:
(1) threshold parameter is configured, and input data packet is cached in input terminal, while generating the label of data packet, The label of data packet is divided into different virtual queues according to priority and target port, and is each virtual queue setting one A counter;It include memory space position, output end slogan and the precedence information of input data packet in label.
Fig. 2 is the label generation of present invention input packet and join the team process and virtual queue arrangement.The meeting after the completion of Packet analyzing A label is generated, which can be stored in the virtual queue in the label waiting area.The queuing principle of label is: same excellent First grade, the label of same target port are cached in same virtual queue in the way of first in, first out, and same virtual queue is pressed It is cached according to the mode of first in, first out.
(2) each virtual queue issues to scheduler according to the hollow full situation of the queue and applies;
(3) scheduler selects the virtual queue authorization arbitration of highest priority, same priority from application signal set The authorization by the way of poll of the virtual queue of different target port is arbitrated;The counter of each virtual queue is counted simultaneously Number, counting rule are as follows: when virtual queue non-empty, and authorize arbitrate other virtual queues when, the Counter Value of the virtual queue Increase by 1, when counting arrival configuration threshold parameter, marking the virtual queue is over, is otherwise labeled as under;
(4) scheduler judges whether there is the virtual queue labeled as over, if so, then scheduler is from labeled as over's The virtual queue authorization arbitration of highest priority, the over virtual queue of same priority, with poll are selected in virtual queue Policy authorization arbitration, until the virtual queue is space-time over status releasing;Otherwise, return step (3), until all virtual Queue is sky;
(5) according to arbitration result, label is read from virtual queue, selects data packet to be sent to corresponding mesh according to label Port.Specifically: label is read from virtual queue according to arbitration result, extracts the storage location serial number of data packet in label With output end slogan, corresponding data packet is read from input terminal buffer area according to storage location serial number, according to output end in label Slogan sends the data packet to the corresponding crosspoint of output target port.
Wherein, such as Fig. 1, Packet analyzing designed by the present invention mainly completes the function of joining the team of data packet.It mainly includes ground Location application, label generation, control of joining the team, the virtual queuing tissue based on output code character and priority and scheduling application and result treatment Several main process.
Application IP addresses are mainly that the data packet that will be joined the team applies for an actual address from the ram of shared buffer memory, Data packet can be stored in this RAM.Meanwhile out team when pass through receive scheduling result obtain label in packet store sequence Number complete out team.
When there is packet to need to join the team, data bag processing function can be the free address of current packet application and acquisition and the number According to wrapping in corresponding information write-in label, these information include memory space position, output end slogan and precedence information etc..And Control of joining the team the label newly obtained can be written in corresponding virtual queuing according to the priority and destination port information in label, from And complete the storage of data packet and the link of label virtual queue organizational form.
Wherein, according to the state in current virtual queue, scheduling application is sent to scheduling controlling, after scheduling is completed, According to scheduling as a result, reading respective queue label information.It is defeated according to the information cooperation such as data packet storage serial number in label information Bus control unit out, moving data packet are sent to crosspoint corresponding to output port or next stage.
Wherein, the realization process of step (4) is: when there is the high over virtual queue of priority, high priority over is empty Quasi- queue is first dispatched;The over virtual queue of same priority, with the strategy of poll in the virtual queue labeled as " over " Selection;If selected in the queue of under without the presence of over virtual queue with the strategy of poll.
Wherein, the realization process of step (5) is to read the head of the queue mark of respective virtual queue according to scheduler arbitration result Label obtain the information such as packet storage serial number, output end slogan in label.Matched according to the information such as data packet storage serial number in label information Output bus controller is closed, moving data packet is sent to crosspoint corresponding to output port or next stage.
Fig. 3 is the Counter Design functional block diagram of (3) step.Decision logic is according to each arbitration result and the current void The caching situation of quasi- queue KN, if having packet in the team, but arbitration result pointer direction is another queue, then the counter increases Add.When the value of counter reaches preconfigured value, the over signal of the queue is drawn high, and otherwise under signal is drawn high.
Fig. 4 is the functional block diagram of CICQ switching fabric.Wherein N is switching fabric port numbers.When data packet is from certain Single port After, virtual line-up is first carried out at input port, and file an application to input scheduling device, receive arbitration result.Wherein (5) the realization process of step is that corresponding data packet is sent to data packet output according to output port information in arbitration result and label Crosspoint corresponding to port is cached.For example, enter from port 1 be sent to port 3 data packet can be sent in figure (4) the The crosspoint of 1 row the 3rd column is cached.Output scheduling is sent to defeated according to the state in same row difference crosspoint selection data packet Exit port.A kind of equity dispatching method for reducing low priority packet delay of the present invention refers to input scheduling process.

Claims (4)

1. a kind of equity dispatching method for reducing low priority packet delay, it is characterised in that the following steps are included:
(1) threshold parameter is configured, and input data packet is cached in input terminal, while generating the label of data packet, according to The label of data packet is divided into different virtual queues by priority and target port, and a meter is arranged for each virtual queue Number device;
(2) each virtual queue issues to scheduler according to the hollow full situation of the queue and applies;
(3) scheduler selects the virtual queue authorization arbitration of highest priority from application signal set, and same priority is different The authorization by the way of poll of the virtual queue of target port is arbitrated;The counter of each virtual queue is counted simultaneously, is counted Number rule are as follows: when virtual queue non-empty, and authorize when arbitrating other virtual queues, the Counter Value of the virtual queue increases by 1, When counting arrival configuration threshold parameter, marking the virtual queue is over, is otherwise labeled as under;
(4) scheduler judges whether there is the virtual queue labeled as over, if so, then lock token is over to scheduler always Virtual queue, prior authorization arbitrates the queue, the over status releasing when queue is empty;Otherwise, return step (3), Until all virtual queues are sky;
(5) according to arbitration result, label is read from virtual queue, selects data packet to be sent to corresponding destination according to label Mouthful.
2. a kind of equity dispatching method for reducing low priority packet delay according to claim 1, it is characterised in that: It include memory space position, output end slogan and the precedence information of input data packet in label in step (1).
3. a kind of equity dispatching method for reducing low priority packet delay according to claim 1, it is characterised in that: The scheduler virtual queue that lock token is over always, prior authorization arbitrate the queue in step (4), until the queue is sky When over status releasing, specifically: scheduler from labeled as over virtual queue in select highest priority virtual queue Authorization arbitration, the over virtual queue of same priority are arbitrated with the policy authorization of poll, until the virtual queue is space-time Over status releasing.
4. the fair scheduling algorithm according to claim 1 for multipriority exchange, it is characterised in that: step (5) tool Body are as follows:
Label is read from virtual queue according to arbitration result, extracts the storage location serial number and output port of data packet in label Number, corresponding data packet is read from input terminal buffer area according to storage location serial number, sending according to output end slogan in label should Data packet is to the corresponding crosspoint of output target port.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112491748A (en) * 2020-11-20 2021-03-12 中国电子科技集团公司第五十四研究所 Credit-based proportional fair scheduling method supporting data packet exchange
CN114531399A (en) * 2020-11-05 2022-05-24 中移(苏州)软件技术有限公司 Memory blocking balance method and device, electronic equipment and storage medium

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1993001553A1 (en) * 1991-07-08 1993-01-21 Seiko Epson Corporation Microprocessor architecture capable of supporting multiple heterogeneous processors
CN1875584A (en) * 2003-10-31 2006-12-06 皇家飞利浦电子股份有限公司 Integrated circuit and method for avoiding starvation of data
TW200819990A (en) * 2006-10-27 2008-05-01 Nvidia Corp Priority adjustable system resources arbitration method
CN101478483A (en) * 2009-01-08 2009-07-08 中国人民解放军信息工程大学 Method for implementing packet scheduling in switch equipment and switch equipment
CN102394829A (en) * 2011-11-14 2012-03-28 上海交通大学 Reliability demand-based arbitration method in network on chip
CN104994132A (en) * 2015-05-20 2015-10-21 北京麓柏科技有限公司 Storage system, centralized control equipment and service quality control method and device

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1993001553A1 (en) * 1991-07-08 1993-01-21 Seiko Epson Corporation Microprocessor architecture capable of supporting multiple heterogeneous processors
CN1875584A (en) * 2003-10-31 2006-12-06 皇家飞利浦电子股份有限公司 Integrated circuit and method for avoiding starvation of data
TW200819990A (en) * 2006-10-27 2008-05-01 Nvidia Corp Priority adjustable system resources arbitration method
CN101478483A (en) * 2009-01-08 2009-07-08 中国人民解放军信息工程大学 Method for implementing packet scheduling in switch equipment and switch equipment
CN102394829A (en) * 2011-11-14 2012-03-28 上海交通大学 Reliability demand-based arbitration method in network on chip
CN104994132A (en) * 2015-05-20 2015-10-21 北京麓柏科技有限公司 Storage system, centralized control equipment and service quality control method and device

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
伊鹏等: "一种可提供QoS保障的新型交换结构", 《电子学报》 *
彭来献等: "一种支持多优先级的高速Crossbar调度算法", 《电子学报》 *

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114531399A (en) * 2020-11-05 2022-05-24 中移(苏州)软件技术有限公司 Memory blocking balance method and device, electronic equipment and storage medium
CN114531399B (en) * 2020-11-05 2023-09-19 中移(苏州)软件技术有限公司 Memory blocking balancing method and device, electronic equipment and storage medium
CN112491748A (en) * 2020-11-20 2021-03-12 中国电子科技集团公司第五十四研究所 Credit-based proportional fair scheduling method supporting data packet exchange
CN112491748B (en) * 2020-11-20 2022-05-27 中国电子科技集团公司第五十四研究所 Credit-based proportional fair scheduling method supporting data packet exchange

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