CN109379085B - Decoding method, device and storage medium for burst channel based on LDPC code - Google Patents

Decoding method, device and storage medium for burst channel based on LDPC code Download PDF

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CN109379085B
CN109379085B CN201811126470.7A CN201811126470A CN109379085B CN 109379085 B CN109379085 B CN 109379085B CN 201811126470 A CN201811126470 A CN 201811126470A CN 109379085 B CN109379085 B CN 109379085B
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王斌
孙彦景
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Xian University of Science and Technology
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105Decoding
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148Structural properties of the code parity-check or generator matrix

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Abstract

The application provides a decoding method of a burst channel based on an LDPC code, which comprises the following steps: receiving variable nodes, assigning all the variable nodes to be 0 or 1 or erasing signals E, and assigning all the check nodes to be 0; determining a first variable node of which the assignment is not an erasure signal among the received variable nodes, adding modulo two information of the first variable node to all check nodes connected with the first variable node, and erasing the first variable node and an edge connected with the first variable node from a predetermined bipartite graph; and determining a first check node with the surplus degree of 1 in the remaining bipartite graph, and enabling a variable node value connected with the searched first check node to be equal to the value of the first check node so as to recover a deleted variable node. The decoding algorithm provided by the application can reduce the complexity of the decoding algorithm and reduce software and hardware resources occupied by decoding.

Description

Decoding method, device and storage medium for burst channel based on LDPC code
Technical Field
The present invention relates to the field of communications, and in particular, to a method, an apparatus, and a storage medium for decoding a burst channel based on an LDPC code.
Background
When special conditions (such as burst) occur in a channel, the performance of the error rate is obviously reduced, and the disadvantage is particularly obvious when physical layer network coding is used. The reliability of a wireless communication system can be severely affected by the burst. In actual communication, the burst may occur anywhere during transmission, and the position and length of the erasure error are random.
A Low Density Parity Check Code (LDPC) Code is a linear error control Code that is highly popular in research under time. The LDPC code has the characteristics of self structure, so that the error code performance of the LDPC code is closer to the Shannon limit compared with the Turbo code, and compared with the Turbo code, the LDPC code has lower complexity and stronger error correction capability.
Currently, there is less research on the correlation of LDPC codes in burst channels.
Disclosure of Invention
Compared with the existing decoding algorithm, the complexity of the decoding algorithm is reduced, and software and hardware resources occupied by decoding are reduced.
In a first aspect, an embodiment of the present invention provides a method for decoding a burst channel based on an LDPC code, where the method includes: receiving variable nodes, assigning all the variable nodes to be 0 or 1 or erasing signals E, and assigning all the check nodes to be 0; determining a first variable node of which the assignment is not an erasure signal among the received variable nodes, adding modulo two information of the first variable node to all check nodes connected with the first variable node, and erasing the first variable node and an edge connected with the first variable node from a predetermined bipartite graph; and determining a first check node with the surplus degree of 1 in the remaining bipartite graph, and assigning the value of the first check node to the variable node value connected with the searched first check node so as to recover a deleted variable node.
In some embodiments of the invention, the method further comprises: and determining a second check node with the surplus degree of 1 in the remaining bipartite graph, and assigning the value of the second check node to the variable node value connected with the searched second check node until all the variable nodes are recovered.
In some embodiments of the invention, the method further comprises: and determining a second check node with the surplus degree of 1 in the remaining bipartite graph, and assigning the value of the second check node to the variable node value connected with the searched second check node until the check node degrees of the remaining bipartite graph are not 1.
In some embodiments of the present invention, the parity check matrix of the low density parity check LDPC code employs a hierarchical construction method.
In some embodiments of the invention, the layered construction method comprises: if the degree of the partial variable nodes is n, dividing the check nodes into n layers, wherein n is a positive integer; regarding all variable nodes with the degree of n as a set, and allocating the ith edge of each variable node in the set to the check node of the ith layer, wherein the value of i is 1 to n; after the edges are distributed every time, four-ring detection is carried out once, if four rings exist, the edges are distributed in the layer where the four rings are located again at random until the four-ring verification result shows that no four rings exist; after all the edges of the variable nodes with the degree of n are distributed to the check nodes of the ith layer, the check node edges of the i +1 layer are distributed continuously until all the edges are distributed completely; and the variable node distribution rule with the degree greater than n is the same as the variable node rule with the degree n, and the process is continued until all the variable node edges are distributed completely.
In some embodiments of the present invention, the assigning the ith edge of each variable node to the check node of the ith layer includes randomly and uniformly assigning the number of edges in the check node of each layer, so that the edge number difference of the variable node with the check node inclusion degree n in the ith layer is smaller than 1 and the number of check nodes in each layer is smaller than the number of edges assigned to the ith layer.
In some embodiments of the invention, the burst channel is BPSK modulated using binary phase shift keying.
In some embodiments of the invention, the method further comprises: and at the relay node, soft decoding is carried out firstly, and then physical layer network coding (PNC) mapping is carried out.
In a second aspect, embodiments of the present invention provide a computer device, including a memory and a processor, where the memory stores computer instructions; a processor configured to execute the computer instructions to cause the computer device to perform the method of the first aspect.
In a third aspect, the present invention provides a computer readable storage medium, on which computer instructions are stored, and when executed by a memory, the computer instructions implement the method of the first aspect.
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Fig. 1 shows a schematic structural diagram of a relay system of physical layer network coding according to an embodiment of the invention.
Fig. 2 illustrates a tanner schematic of a parity check matrix according to an embodiment of the present invention.
Figure 3 shows a model of an AWGN channel PNC transmission system for bursts in accordance with an embodiment of the present invention.
Fig. 4 shows three cases of a burst according to an embodiment of the present invention.
Fig. 5 is a flowchart illustrating a method for decoding a burst channel based on an LDPC code according to an embodiment of the present invention.
Figure 6 shows a communication system block diagram of a PNC according to an embodiment of the present invention.
Fig. 7 shows a decoding simulation diagram of different LDPC code construction methods.
Fig. 8 shows a simulation diagram of the bit error rate of a burst channel according to an embodiment of the present invention.
Fig. 9 is a diagram illustrating bit error rate simulation of another burst channel according to an embodiment of the present invention.
Fig. 10 is a diagram illustrating bit error rate simulation of another burst channel according to an embodiment of the present invention.
Fig. 11 shows a schematic structural diagram of a computer device according to an embodiment of the present invention.
Detailed Description
Various aspects of the invention are described in detail below with reference to the figures and the detailed description. Well-known modules, units and their interconnections, links, communications or operations with each other are not shown or described in detail. Furthermore, the described features, architectures, or functions may be combined in any manner in one or more embodiments. It will be understood by those skilled in the art that the various embodiments described below are illustrative only and are not intended to limit the scope of the present invention. It will also be readily understood that the modules or units or processes of the embodiments described herein and illustrated in the figures can be combined and designed in a wide variety of different configurations.
In the following, a brief description of the terms used herein is provided, it being understood by those skilled in the art that such description is not intended to limit the scope of the invention.
In a relay system using Physical-layer Network Coding as shown in fig. 1, a relay node R can simultaneously receive information sent by source nodes a and B without processing them as interference. In the 1 st time slot, the information source nodes A and B simultaneously send information s1 and s3 to the relay node R, the relay node R superposes the received information to obtain (s 1+ s 3) and simultaneously forwards the superposed information to A and B in the 2 nd time slot. Nodes a and B may map to the corresponding modulation symbol s2 from the received superimposed signal and obtain the signal transmitted by the other node according to its own signal.
LDPC (Low Density Parity Check) can be represented in a matrix manner or in a bipartite graph manner. Bipartite graphs, which may also be referred to as bipartite graphs, are used interchangeably herein. Taking a binary LDPC code as an example, assuming that H is an m × n sparse (the proportion of 1 in H is less than 0.01) check matrix, an LDPC code (denoted as C) with a code length n is generated corresponding to a zero space. That is, the information sequence is mapped by a check matrix H to form codeword sequences C, and all the codeword sequences C form a null space of H, that is, H · C T =0. Therefore, the structural characteristics of the check matrix H directly affect the generated LDPC codeword. The sparse m × n matrix H has the following structural characteristics:
(1) The rows of the H matrix are repeated by ρ, the number of non-zero elements "1" per row.
(2) The column weight of the H matrix is γ, the number of non-zero elements "1" per column.
(3) The number of non-zero elements "1" having the same position between any two rows (or columns) is not greater than 1, also referred to as no four rings.
(4) Compared with the code length n and the number m of rows of the matrix, the row weight ρ and the column weight γ are small, that is, the number of non-zero elements in the matrix is small, which means that the H matrix is a sparse matrix with sparse characteristics.
If the check matrix H has a row weight ρ and a column weight γ that are constant, then the LDPC code constructed from this matrix, commonly referred to as a regular LDPC code, is denoted as a (γ, ρ, n) LDPC code. Conversely, if the row weight and column weight of the check matrix H are not fixed, such an LDPC code is generally referred to as an irregular LDPC code. LDPC codes discussed herein and referred to hereafter are regular LDPC codes.
The best tool to intuitively understand the working principle of LDPC codes is the Tanner graph. Each check matrix H has a corresponding Tanner graph. The principle of construction of the Tanner graph is illustrated below, where equation 1 is an H matrix for a (2, 3, 6) LDPC code:
Figure GDA0003760666170000041
each row of the H matrix corresponds to a parity check, and the nth column of each '1' in the mth row is reduced into a combination
N m ={n:H mn =1} (formula 2)
For example, N 1 ={1,2,4},N 2 = 2,3,5, the parity of the nth row can be expressed as:
Figure GDA0003760666170000051
wherein c is n Is an element in the m-th row.
According to the above H matrix, the corresponding tanner graph can be represented as shown in fig. 2.
In actual communication, the burst may occur anywhere during transmission, and the position and length of the erasure error are random. As shown in fig. 3, an erasure error may occur in the first and/or second time slots. For the first slot, the erasure errors of s1 and s3 are independent of each other. If the erasure errors of s1 and s3 are in the same location, then the erasure error of modulated signal s2 will also be in the same location. If the erasure errors of s1 and s3 are located at different positions, then the erasure error of s2 is the sum of s1 and s 3. In the second slot, there are two cases of the occurrence of an erasure symbol. One is that the erasure symbol occurs at the erasure location of node N2, so there is no additional erasure error. Another situation is that the new erasure symbol is different from the original erasure symbol, which results in the addition of additional erasure errors.
Burst signature analysis
The source information is typically transmitted in frames. Assume that the frame length is equal to N symbols. In general, the mathematical model of a burst can be divided into three different cases, as shown in fig. 4. In case one, there are multiple bursts in a frame, each burst lasting one symbol time. In case two, there is only one burst pulse in a frame lasting N symbol times, the burst lasting L symbol times. In case three, a plurality of burst pulses occur in one frame, and the pulse lengths are randomly distributed.
Case one is simply referred to as single symbol multi-pulse. In this case several bursts occur in a segment of the code, each burst lasting only one symbol time. The probability density function of the burst follows a ergodic distribution. For the convenience of the later mathematical analysis, the probability of occurrence of the burst is represented by P pulse And (4) showing.
Case two is simply referred to as a multi-symbol monopulse. In this case, there is only one burst in each frame, which has L symbols, where L is determined by the Variable Length Burst Scheduling (VLBS) algorithm. It is further noted that the starting position of the burst generation is random.
Case three is simply referred to as multi-symbol multi-pulse. In this case, there are multiple pulses in a frame, each lasting L symbols, L being subject to a uniform distribution at [ Lmin, lmax ], where Lmin and Lmax are the minimum and maximum pulse lengths, respectively, which can be generally estimated according to channel conditions. Herein, in order to simplify the model, the number of pulses in each frame is set to λ, which is uniformly distributed in the range of [ λ min, λ max ], where λ min and λ max are the minimum and maximum number of pulses determined by channel conditions. And it is assumed herein that in this multi-symbol multi-pulse case, each burst lasts L times.
From the above, the case one and the case two are special cases of the case three. However, in practical communication systems, the occurrence of bursts appears to be more common in cases one and two.
Belief Propagation (BP) can be used for decoding based on LDPC codes, and the LLR BP algorithm steps of the decoding algorithm in the log domain are described below. Assuming that during the transmission of the signal through the channel and the BPSK modulation of the input signal, each codeword c = (c) 1 ,c 2 ,…,c n ) Are mapped to the sequence x = (x) 1 ,x 2 ,…,x n ) The input sequence x is transmitted over a channel,the received sequence is y = (y) 1 ,y 2 ,…,y n ) Then decoding is carried out according to the received sequence y, and finally a decoding sequence is obtained
Figure GDA0003760666170000061
For convenience of description, a symbol is defined in which y = { y = y, after passing through an Additive White Gaussian Noise (AWGN) channel 1 ,y 2 ,…,y n Is the received information, r ji (b) =0,1 represents external probability information that the check node j passes to the variable node i. q. q of ij (b) Representing the external probability information passed by the variable node i to the check node j, C (i) representing the set of check nodes connected to the variable node, and R (j) representing the set of variable nodes connected to the check node.
And (5) initializing. Setting the maximum iteration number as Imax, and defining the initial probability likelihood ratio message transmitted to the variable node by the channel as:
Figure GDA0003760666170000062
and (5) performing iterative processing.
(1) And processing the check node message. Message transmitted from calculation variable node to check node
Figure GDA0003760666170000063
(2) And (4) processing the messages of the variable nodes. Calculating messages from variable nodes to check nodes
Figure GDA0003760666170000064
(3) And (6) decoding and judging. Computing decision messages for all variable nodes
Figure GDA0003760666170000071
If it is not
Figure GDA0003760666170000072
Then
Figure GDA0003760666170000073
Otherwise
Figure GDA0003760666170000074
(4) Stop
When Hc is present T If not, continuing to return to iteration, and if not, ending the operation when the number of iterations is not less than 0 or the number of iterations has reached the set maximum number of iterations. The BP decoding algorithm can effectively improve the decoding speed and reduce the decoding delay. Because the iterative process is implemented in parallel, however, the algorithm introduces the tanh function, and the calculation of the tanh function is complex and occupies many hardware resources, so the complexity of decoding implementation is relatively large.
Under the burst channel, the signal received by the receiving end has an erasure signal E, and the signal can not be decoded by a general BP decoding algorithm, so that the BP decoding algorithm under the burst channel is different from the decoding algorithm under the common condition.
Referring to fig. 5, fig. 5 is a flow chart illustrating a method for decoding a burst channel based on an LDPC code according to an embodiment of the present invention, and specifically, the method may include step S501, step S502, and step S503, which are described in detail below.
Step S501, initialization: variable nodes are received, all variable nodes are assigned to 0,1 or an erasure signal E, and all check nodes are still assigned to 0.
In some embodiments, for the BP decoding algorithm of the burst channel, the initialization formula of decoding is:
Figure GDA0003760666170000075
wherein y is a received code word, j is a jth code word, and f is the posterior probability of a variable node j.
For the LDPC code, the LDPC code is encoded at the source nodes a and B and then modulated by Binary Phase Shift Keying (BPSK). At the relay node R, the system firstly performs soft decoding, then performs PNC mapping and then sends the PNC mapping to the source nodes A and B through LDPC coding and BPSK.
The transmission of the communication system of the embodiment of the invention can comprise two stages: a multiple access stage (MAC) and a broadcast stage (BC). In the multiple access stage, the source nodes A and B simultaneously transmit the coded and modulated signals to the relay node R, and the relay node R receives the signals transmitted by the source nodes A and B and the mixed signal of the signals and noise. In the broadcast phase, the relay node R simultaneously sends the information after network coding to the nodes A and B, and the signals received by the nodes A and B are superposed signals of the relay signals and noise respectively. The key of the whole system is that the relay node R needs to demodulate, decode and map at the multiple access stage to obtain two-path signal network coding results, and then re-code and modulate the coding results at the broadcast stage and send the coding results to the nodes A and B, so that the nodes A and B can respectively decode to obtain information required to complete exchange. The purpose of the relay node R is to decode the received superimposed signal to obtain the result of network coding, rather than separately demodulating the information of the nodes a and B, and this decoding process is designed jointly for the physical layer network coding PNC and the LDPC code, as shown in fig. 6. In fig. 6, a and B represent two source nodes that need to complete information exchange, respectively, and R represents a relay node. A and B respectively encode the source information by the LDPC code with the same code rate of 0.5, and then obtain modulation information x after BPSK modulation A And x B After modulation is completed, the nodes A and B respectively send out the information through multiple antennas, and after the information passes through a multiple access channel, the information received by the relay node R is Y. The information is obtained through soft decoding, and the XOR information of the two original paths of signals can be obtained after mapping as shown in Table 1. Then, the signals are transmitted by the multiple antennas, and the receiving end can process the received signals to obtain the signals to be acquiredA message. Wherein the soft decoding may employ soft decoding algorithms known to those skilled in the art.
TABLE 1 Relay mapping scheme
Figure GDA0003760666170000081
Step S502, directly recovering: in the received variable nodes, if the assignment of a first variable node in the variable nodes is not the erasure signal E, the information of the first variable node is modulo-two added to all check nodes connected to the first variable node, and the edges connected to the first variable node and the first variable node are erased from a predetermined bipartite graph.
In the embodiment of the present invention, the first variable node in step S502 may refer to any one of the variable nodes, and in step S501, all the variable nodes have been assigned to 0,1 or an erase signal. In step S502, it is determined whether the information is deleted in the received variable node, specifically, it is determined whether the information of the variable node is deleted by determining the assignment of the variable node, and if the assignment is an erase signal, it indicates that the information of the variable node is deleted, and if the assignment is 0 or 1, it indicates that the information of the variable node is not deleted. For a first variable node which is not an erasure signal, namely, a variable node of which information is not deleted, information of the first variable node is modulo-two added to all check nodes connected with the first variable node, and edges connected with the first variable node and the first variable node are erased from a predetermined bipartite graph.
Step S503, iterative recovery: and determining a first check node with the surplus degree of 1 in the remaining bipartite graphs, and assigning the value of the first check node to the variable node value connected with the searched first check node so as to recover a deleted variable node.
In the embodiment of the present invention, it is determined in the remaining bipartite graph of step S502 that there is a first check node with a remaining degree of 1, and then the value of the variable node connected to the first check node is equal to the value of the check node, so that a deleted variable node is recovered.
In some embodiments of the invention, the method of the invention may further comprise: and determining a second check node with the surplus degree of 1 in the remaining bipartite graph, and assigning the value of the second check node to the variable node value connected with the searched second check node until all the variable nodes are recovered. That is, the iterative recovery of step S503 is repeatedly performed until all deleted variable nodes are recovered.
In some further embodiments of the present invention, the method of the present invention further comprises: and determining a second check node with the surplus degree of 1 in the remaining bipartite graph, and assigning the value of the second check node to the variable node value connected with the searched second check node until the check node degrees of the remaining bipartite graph are not 1. That is, the iterative recovery in step S503 is repeatedly performed until the degrees of all check nodes in the remaining bipartite graph are not 1.
Compared with the traditional BP decoding algorithm, the decoding algorithm based on the LDPC code provided by the embodiment of the invention can reduce the complexity of the algorithm and reduce the occupation of decoding resources under the condition that the error rate is not reduced basically.
In embodiments of the present invention, the parity check matrix H of the LDPC code may be constructed in various ways. In some embodiments, the parity check matrix of the LDPC code is constructed using a hierarchical approach. Specifically, the hierarchical construction method may include: if the degree of the partial variable node is n, dividing the check node into n layers, wherein n is a positive integer; regarding all variable nodes with the degree of n as a set, and allocating the ith edge of each variable node in the set to the check node of the ith layer, wherein the value of i is 1 to n; after the edges are distributed every time, carrying out four-ring detection once, if four rings exist, randomly distributing the edges in the layer where the four rings are located again until the four-ring verification result shows that no four rings exist; after all the edges of the variable nodes with the degree of n are distributed at the ith layer of check nodes, continuously distributing the check node edges of the i +1 layer until all the edges are distributed; and the variable node distribution rule with the degree greater than n is the same as the variable node rule with the degree n, and the process is continued until all the variable node edges are distributed.
In some embodiments, assigning the ith edge of each variable node to the check nodes of the ith layer may include randomly and uniformly assigning the number of edges in the check nodes of each layer, such that the variable node edge number difference with check node inclusion degree n in the ith layer is less than 1 and the number of check nodes in each layer is less than the number of edges assigned to the ith layer.
In one embodiment, the parity check matrix H of the LDPC code may be formed by: if the degree of partial variable nodes is n, the check nodes are divided into n layers. All variable nodes with the degree of n are regarded as a set, the ith edge of each variable node in the set is distributed to the check node of the ith layer, the value of i is 1 to n, and n is a positive integer. In general, the number of check nodes in each layer is smaller than the number of edges allocated to the ith layer, so that the number of edges in each layer needs to be randomly and uniformly allocated, and the edge number difference of variable nodes with the check node inclusion degree n in the ith layer is smaller than 1. And after the edge is distributed every time, carrying out four-ring inspection once, and under the condition that four rings exist, randomly distributing the edge in the layer where the four rings are located again until the four-ring verification result shows that no four rings exist. After the edges of the variable nodes (degree n) are completely distributed to the check nodes of the ith layer, the check node edges of the i +1 layer are continuously distributed until all the edges are completely distributed. And the variable node distribution rule with the degree greater than n is the same as the variable node rule with the degree n, and the process is continued until all the variable node edges are distributed.
Under AWGN channel, using traditional BP decoding algorithm, selecting BPSK in modulation mode, respectively using the above layered structure algorithm and traditional MacKay structure method to simulate, setting code length to 256 and code rate to 0.5, and obtaining the simulation result as shown in FIG. 7. As can be seen from FIG. 7, the error rate of the layered random structuring method is 10 compared with the conventional MacKay structuring method -2 ~10 -4 The gain is about 0.1-0.3 dB, and the performance is relatively improved to a certain extent.
The three different burst cases described above were simulated. Fig. 8, 9 and 10 plot simulated bit error rates for three cases to reveal the effect of burst on bit error rate performance.
For case 1, the erasure probability is P pluse =10 -3 One symbol at a time. For the second case, consecutive 10 symbols are erased in each frame. For case three, the erase length L satisfies 1 ≦ L ≦ 10, and the number of erases λ is between 1 and 5. Specific simulation parameters are shown in table 2. In this context, a (255,223) RS code and an LDPC code with a code length of 256 and a code rate of 0.5 are respectively employed to overcome the adverse effects of the burst.
TABLE 2 channel parameters
Figure GDA0003760666170000111
As shown in fig. 8, when the signal-to-noise ratio is large, the bit error rate is about 10 -3 Left and right. In fig. 8, the RS code is used to achieve a bit error rate of 10 when the Signal Noise Ratio (SNR) is 7dB -4 On the other hand, the use of LDPC code can make the bit error rate reach 10 at SNR of 5dB -4
As shown in fig. 9, the bit error rate is close to 10 at high snr -2 . In FIG. 9, the use of RS codes at SNR of about 8dB can achieve a bit error rate of 10 -5 The use of LDPC code can make the error rate reach 10 at SNR of about 6dB -5
As shown in FIG. 10, the code error rate is close to 10 at high SNR -2 . In FIG. 10, the use of RS codes at SNR of about 7dB can achieve a bit error rate of 10 -4 The use of LDPC code can make the error rate reach 10 at SNR of about 5dB -4
As can be seen from the simulation results, under AWGN channel, the results of FIGS. 8 to 10 show that the burst has significant adverse effect on the bit error rate performance of the physical layer network coding. Regarding the performance difference between the RS code and the LDPC code, it is mainly caused by the difference between the check bits between the LDPC code and the RS code and the difference between decoding algorithms. The decoding algorithm used by the LDPC is an improved BP iterative decoding algorithm in the text, and the LDPC has the advantages of the LDPC, so that the LDPC is more suitable for being transmitted on a burst channel compared with RS.
The embodiment of the invention also provides computer equipment. As shown in fig. 11, the computer device 1100 may comprise a memory 1101 and a processor 1102, wherein the memory 1101 stores computer instructions and the processor 1102 is configured to execute the computer instructions to cause the computer device 1100 to implement the method described above.
Embodiments of the present invention also provide a computer-readable storage medium having stored thereon computer instructions which, when executed by a processor, implement the method described above.
Through the above description of the embodiments, those skilled in the art will clearly understand that the present invention may be implemented by combining software and a hardware platform. With this understanding in mind, all or part of the technical solutions of the present invention that contribute to the background art may be embodied in the form of a software product, which can be stored in a storage medium, such as a ROM/RAM, a magnetic disk, an optical disk, etc., and includes instructions for causing a computer device (which may be a personal computer, a server, a smart phone, or a network device, etc.) to execute the methods according to the embodiments or some parts of the embodiments.
The terms and expressions used in the specification of the present invention have been set forth for illustrative purposes only and are not meant to be limiting. It will be appreciated by those skilled in the art that changes could be made to the details of the above-described embodiments without departing from the underlying principles thereof. The scope of the invention is, therefore, to be determined only by the following claims, in which all terms are to be interpreted in their broadest reasonable sense unless otherwise indicated.

Claims (10)

1. A method for decoding a burst channel based on an LDPC code, the method comprising:
receiving variable nodes, assigning all the variable nodes to be 0 or 1 or erasing signals E, and assigning all the check nodes to be 0;
determining a first variable node whose assignment is not an erasure signal among the received variable nodes, modulo-two adding information of the first variable node to all check nodes connected to the first variable node, and erasing the first variable node and an edge to which the first variable node is connected from a predetermined bipartite graph; repeating the steps until a first check node with the remaining degree of 1 appears;
and determining a first check node with the surplus degree of 1 in the remaining bipartite graphs, and assigning the value of the first check node to the variable node value connected with the searched first check node so as to recover a deleted variable node.
2. The method of claim 1, further comprising:
and determining a second check node with the surplus degree of 1 in the remaining bipartite graph, and assigning the value of the second check node to the variable node value connected with the searched second check node until all the variable nodes are recovered.
3. The method of claim 1, further comprising:
and determining a second check node with the surplus degree of 1 in the remaining bipartite graph, and assigning the value of the second check node to the variable node value connected with the searched second check node until the check node degrees of the remaining bipartite graph are not 1.
4. The method of claim 1, wherein the parity check matrix of the LDPC code is constructed using a hierarchical approach.
5. The method of claim 4, wherein the hierarchical construction method comprises:
if the degree of the partial variable nodes is n, dividing the check nodes into n layers, wherein n is a positive integer;
regarding all variable nodes with the degree of n as a set, and allocating the ith edge of each variable node in the set to the check node of the ith layer, wherein the value of i is 1 to n;
after the edges are distributed every time, carrying out four-ring detection once, if four rings exist, randomly distributing the edges in the layer where the four rings are located again until the four-ring verification result shows that no four rings exist;
after all the edges of the variable nodes with the degree of n are distributed at the ith layer of check nodes, continuously distributing the check node edges of the i +1 layer until all the edges are distributed;
and the variable node distribution rule with the degree greater than n is the same as the variable node rule with the degree n, and the process is continued until all the variable node edges are distributed.
6. The method in accordance with claim 5, wherein the assigning the ith edge of each variable node to a check node of an ith layer comprises:
and randomly and uniformly distributing the edge number in the check nodes of each layer, so that the edge number difference of the variable nodes with the check node inclusion degree n in the ith layer is smaller than 1, and the number of the check nodes in each layer is smaller than the number of the edges distributed to the ith layer.
7. The method of claim 1, wherein the burst channel is BPSK modulated using binary phase shift keying.
8. The method of claim 1, further comprising:
and at the relay node, soft decoding is carried out firstly, and then physical layer network coding (PNC) mapping is carried out.
9. A computer device comprising a memory and a processor, wherein,
the memory storing computer instructions;
the processor configured to execute the computer instructions to implement the method of any one of claims 1 to 8.
10. A computer readable storage medium having stored thereon computer instructions which, when executed by a processor, implement the method of any one of claims 1 to 8.
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