CN109375698A - ESD protection location and dual power supply wide-band linearity voltage-stablizer protect structure to power supply over the ground - Google Patents
ESD protection location and dual power supply wide-band linearity voltage-stablizer protect structure to power supply over the ground Download PDFInfo
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- CN109375698A CN109375698A CN201811291257.1A CN201811291257A CN109375698A CN 109375698 A CN109375698 A CN 109375698A CN 201811291257 A CN201811291257 A CN 201811291257A CN 109375698 A CN109375698 A CN 109375698A
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- 239000003990 capacitor Substances 0.000 claims description 7
- 230000003071 parasitic effect Effects 0.000 claims description 5
- 239000000758 substrate Substances 0.000 claims description 5
- 238000000034 method Methods 0.000 abstract description 9
- 230000015556 catabolic process Effects 0.000 description 4
- 238000013461 design Methods 0.000 description 3
- 230000005611 electricity Effects 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- 230000001052 transient effect Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000004088 simulation Methods 0.000 description 2
- 101100102627 Oscarella pearsei VIN1 gene Proteins 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000035568 catharsis Effects 0.000 description 1
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Classifications
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is DC
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
- G05F1/569—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection
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- Semiconductor Integrated Circuits (AREA)
- Emergency Protection Circuit Devices (AREA)
Abstract
The invention discloses a kind of power supply, ESD protection location and dual power supply wide-band linearity voltage-stablizer protect structure over the ground; the characteristics of using bipolar transistor BE knot, RC retardation ratio, Darlington NPN transistor; construct a kind of electrostatic protection unit of power supply over the ground; using the electrostatic protection unit and bipolar transistor BE characteristic, the full chip electrostatic protection network of dual power supply wide band dipole linear voltage regulator is constructed.In chip normal condition; ensure that I/O port is mutually isolated; it utmostly establishes full chip electrostatic to release access, promotes the full chip antistatic capability of dual power supply Bipolar Linear voltage-stablizer, which may extend to other bipolar, BCD technique analog circuits.
Description
Technical field
The invention belongs to bipolar Analogous Integrated Electronic Circuits technical fields, and in particular to a kind of power supply over the ground ESD protection location and
Dual power supply wide-band linearity voltage-stablizer protects structure.
Background technique
Linear voltage regulator is the important component in current electronic system, towards high power density, high conversion effect
The direction that rate, high integration, low pressure output, fast load transient respond is developed.Linear voltage regulator output adjustment pipe is brilliant using PNP
Body pipe or PMOS transistor realize the function of low voltage difference, but since circuit output impedance is larger, load transient response is slower；If
And its output adjustment pipe uses NPN transistor or NMOS transistor, realizes faster load transient response, but its input and output
Pressure difference is larger；If linear voltage regulator uses dual power supply, control section, output power NPN transistor are using different input electricity
Source individually powers, it can be achieved that linear voltage regulator has the characteristics that broadband, low voltage difference, and circuit diagram is as shown in Figure 1, and exporting and dividing
Piezoresistance R1, R2 utilize hybrid-intergated-circuit technique, realize output voltage specification reconfigurable design using thick-film resistor, meet not
With the demand of power supply system.Dual power supply wide-band linearity stabilizator structure as shown in Figure 1, including control circuit input power
VIN1, power transistor input power VIN2 adjust port Adj, output port VOUT and ground port.In the linear voltage regulator knot
In structure, in order to realize low voltage difference, broadband performance, using dual power supply, and adjusts port (Adj) and appear in outer pin, thus it is double
Antistatic protection structure design difficulty increases power supply over the ground, the antistatic net between each port of double power supply circuit entirety chip
Network design complicates.
Summary of the invention
For the port feature of dual power supply wide band dipole linear voltage regulator, a kind of full chip antistatic protection knot is provided
Structure, this method can not only guarantee between each port of chip electrical mutually isolated, but also can promote full chip electrostatic relieving capacity.
In order to achieve the above objectives, a kind of power supply of the present invention ESD protection location over the ground, which is characterized in that including crystal
Pipe Qn1, transistor Qn1Collector and emitter for connecting control circuit input power VIN1Or power transistor input power
VIN2, base stage meets transistor Qn2Emitter；Transistor Qn2Collector for connecting control circuit input power VIN1Or power
Transistor input power VIN2, base stage and resistance R1The base stage of one end and transistor Qn3 connect, and emitter meets transistor Qn1Base
Pole；Resistance R1Other end ground connection；Transistor Qn3Collector for connecting control circuit input power VIN1Or power transistor is defeated
Enter power supply VIN2, emitter and resistance R2The connection of the ground level of one end and transistor Qn4；Resistance R2Other end ground connection；Transistor Qn4Collection
Electrode is for connecting control circuit input power VIN1Or power transistor input power VIN2, emitter ground connection；Capacitor C1One end
For connecting control circuit input power VIN1Or power transistor input power VIN2, the other end connect with transistor Qn3 base stage；
Diode D1Negative end is for connecting control circuit input power VIN1Or power transistor input power VIN2, forward end ground connection.
Further, active device of the power supply over the ground in ESD protection location is all made of NPN transistor.
Further, capacitor C1Using mos capacitance.
Further, diode D1It is chip substrate to the parasitic diode of extension.
Further, resistance R1Base resistance is used with resistance R2.
Further, resistance R1 and resistance R2Length-width ratio is 45/10.
Further, resistance R1 and resistance R2Resistance value be 1.0k Ω~1.5k Ω.
A kind of dual power supply wide-band linearity voltage-stablizer protects structure, including two above-mentioned power supplys ESD protection location A over the ground1With
A2And transistor Qn9, transistor Qn10, transistor Qn11With transistor Qn12；Wherein, antistatic protection unit A1Power supply use
In connection VIN1, other end ground connection；Antistatic protection unit A2Power supply for connecting VIN2, other end ground connection；Transistor Qn9's
Collector is for connecting control circuit input power VIN1, emitter is for connecting adjustment port Adj, base stage connection transistor Qn10
Emitter；Transistor Qn10Collector for connecting control circuit input power VIN1, base earth；Transistor Qn11Collection
Electrode is for connecting control circuit input power VIN2, emitter connection output port VOUT, base stage connection transistor Qn12Transmitting
Pole；Transistor Qn12Collector for connecting control circuit input power VIN2, base earth.
Compared with prior art, the present invention at least has technical effect beneficial below, according to the characteristic of bipolar transistor,
The characteristics of using bipolar transistor BE knot, RC retardation ratio, Darlington NPN transistor, constructs a kind of power supply electrostatic protection list over the ground
Member may be implemented the electrostatic protection of power port and ground port using the classical protection structure of power supply over the ground, and use the electrostatic
Protection location and bipolar transistor BE characteristic devise the full chip electrostatic protection network of dual power supply wide band dipole linear voltage regulator,
Due to VIN1、VIN2、Adj、VOUTBackward dioded structure is all had over the ground, and diode is the transistor Q in Fig. 3 to Adj over the groundn9With
Transistor Qn10BE knot, VOUTDiode is the transistor Q in Fig. 3 over the groundn11With transistor Qn12BE knot, can not only guarantee
It is electrical mutually isolated between each port of chip, and full chip electrostatic relieving capacity can be promoted, it may extend to other bipolar, BCD
The analog circuit of technique.
Further, active device of the power supply over the ground in ESD protection location is all made of NPN transistor, and NPN transistor has
Biggish electric current relieving capacity.
Further, capacitor C1Using mos capacitance, mos capacitance simple process in bipolar process is easy to accomplish.
Further, diode D1It is chip substrate to the parasitic diode of extension, which uses substrate and extension
Between parasitic diode, not additional chip occupying area.
Further, resistance R1Base resistance is used with resistance R2, base resistance and NPN transistor base area use same
Reticle production, precision are higher.
Further, resistance R1 and resistance R2Length-width ratio is 45/10, is provided for corresponding NPN transistor suitable quiet
State operating point.
Detailed description of the invention
Fig. 1 is dual power supply wide band dipole linear voltage regulator structure chart；
Fig. 2 is power supply esd protection structure figure over the ground；
Fig. 3 is that the full chip ESD of dual power supply wide band dipole linear voltage regulator protects network.
Specific embodiment
Present invention will be described in further detail below with reference to the accompanying drawings, described to be explanation of the invention rather than limit
It is fixed.
The present invention utilizes the characteristics of bipolar transistor BE knot, RC retardation ratio, Darlington NPN transistor, constructs a kind of power supply
Electrostatic protection unit over the ground devises dual power supply wide band dipole using the electrostatic protection unit and bipolar transistor BE characteristic
The full chip electrostatic of linear voltage regulator protects network, simple circuit, which protects structure, can not only guarantee that chip is each
It is electrical mutually isolated between port, and utmostly establish full chip electrostatic and release access, it promotes full chip electrostatic and releases energy
Power promotes the full chip antistatic capability of dual power supply Bipolar Linear voltage-stablizer, may extend to other bipolar, BCD technique simulations
Circuit.
As shown in Fig. 2, in power supply over the ground ESD protection location A, transistor Qn1Collector and emitter connection control circuit
Input power VIN1(or power transistor input power VIN2), base stage meets transistor Qn2Emitter；Transistor Qn2Collector connects
Control circuit input power VIN1(or power transistor input power VIN2), base stage and resistance R1One end connects, and emitter connects crystalline substance
Body pipe Qn1Base stage；Resistance R1One termination transistor Qn2Base stage, the other end ground connection；Transistor Qn3Collector connection control circuit
Input power VIN1(or power transistor input power VIN2), base stage connecting resistance R1One end, emitter connecting resistance R2One end；Resistance
R2One termination transistor Qn3Emitter, other end ground connection；Transistor Qn4 collector connection control circuit input power VIN1(or power
Transistor input power VIN2), base stage connecting resistance R2One end, emitter ground connection；Capacitor C1One end connection control circuit input power VIN1
(or power transistor input power VIN2), another terminating resistor R1One end；Diode D1The input of negative end one end connection control circuit
Power supply VIN1(or power transistor input power VIN2), the other end ground connection of forward end.
As shown in figure 3, electrostatic protection network of the Fig. 3 between each port of full chip, utilizes the antistatic guarantor of power supply over the ground
Unit A, NPN transistor BE junction characteristic are protected, the full chip antistatic protection of dual power supply wide band dipole linear stabilized power supply is constructed
Structure.Including antistatic protection unit A1, antistatic protection unit A2And two Darlington NPN transistors.Wherein antistatic guarantor
Protect unit A1And A2It is identical with the structure of antistatic protection unit A, by transistor Qn9With transistor Qn10BE tie composition
There are two series opposing BE knots in Adj, by transistor Q over the groundn11With transistor Qn12BE knot composition VOUTThere are two strings over the ground
Join reversed BE knot, specific connection relationship is as follows:
Antistatic protection unit A1Power supply meets VIN1, other end ground connection；A2Power supply meets VIN2, other end ground connection；Transistor Qn9
Collector meets VIN1, emitter meets Adj, and base stage meets transistor Qn10Emitter；Transistor Qn10Collector meets VIN1, base stage connects
Ground, emitter meet transistor Qn9Base stage；Transistor Qn11Collector meets VIN2, emitter meets VOUT, base stage meets transistor Qn12's
Emitter；Transistor Qn12Collector meets VIN2, base earth, emitter meets transistor Qn11Base stage.
Illustrate a kind of full chip esd protection structure of dual power supply wide-band linearity voltage-stablizer provided by the present invention and application
Condition:
(1) cellular construction
As shown in Fig. 2, in the antistatic protection unit A of power supply over the ground, Qn1Using NPN transistor, emitter region area
For 30 μm of 30 μ m, first packet number is 2, and collector and emitter meets VIN1(or VIN2), base stage meets Qn2The emitter of transistor；
Qn2Transistor uses NPN transistor, and emitter region area is 30 μm of 30 μ m, and first packet number is 2, and collector meets VIN1(or
VIN2), base stage and resistance R1One end connects, and emitter meets Qn1The base stage of transistor；Resistance R1Using base resistance, length-width ratio is
45/10, a termination Qn2The base stage of transistor, other end ground connection；Qn3Using NPN transistor, emitter region area is 10 μ ms 10
μm, first packet number is 12, and transistor collector meets VIN1(or VIN2), base stage connecting resistance R1One end, emitter connecting resistance R2One end；
Resistance R2Using base resistance, length-width ratio 45/10, a termination transistor Qn3Emitter, other end ground connection；Qn4Using NPN crystalline substance
Body pipe, emitter region area are 10 μm of 10 μ m, and first packet number is 36, transistor Qn4Collector meets VIN1(or VIN2), base stage connects
R2Resistance one end, emitter ground connection；Capacitor C1Using mos capacitance, area is 70 μm of 400 μ m, a termination VIN1(or VIN2),
Another termination R1Resistance one end；Diode D1For the parasitic large area diode of chip substrate and extension, area is greater than 100 μm
× 100 μm, negative end one terminates VIN1(or VIN2), forward end one end ground connection.
As shown in figure 3, antistatic protection unit A, NPN transistor BE junction characteristic using power supply over the ground, construct double electricity
The full chip antistatic of source wide band dipole linear stabilized power supply protects structure.Antistatic protection unit A1Power supply meet VIN1, another
End ground connection；Antistatic protection unit A2Power supply meet VIN2, other end ground connection；Transistor Qn9Using NPN transistor, emitter region
Area is 30 μm of 30 μ m, and first packet number is 2, which meets VIN1, emitter meets Adj, and base stage meets transistor Qn10
Emitter；Qn10Using NPN transistor, emitter region area is 30 μm of 30 μ m, and first packet number is 2, the transistor collector
Meet VIN1, base earth, emitter meets transistor Qn9Base stage；Qn11Using NPN transistor, emitter region area is 30 μ ms 30
μm, first packet number is 2, transistor Qn11Collector meet VIN2, emitter meets VOUT, base stage meets transistor Qn12Emitter；It is brilliant
Body pipe Qn12Using NPN transistor, emitter region area is 30 μm of 30 μ m, and first packet number is 2, transistor Qn12Collector connects
VIN2, base earth, emitter meets transistor Qn11Base stage.
(2) application conditions
A kind of full chip antistatic of dual power supply wide band dipole linear voltage regulator of the invention protects network, protects using the electrostatic
The chip input voltage V of protective net networkIN1Range is 3.3V~7V, input voltage VIN2Range is 1.4V~7V, be can be widely applied to
Bipolar or BCD processing simulation circuit I O port antistatic protection.
Embodiment 1
Input voltage V based on standard bipolar process technology, in full chipIN1Range is 3.3V~7V, input voltage VIN2
Range is 1.4V~7V, protects network, V using full chip electrostatic as shown in Figure 3IN1、VIN2、Adj、VOUTIt all has over the ground anti-
To diode structure, therefore can be achieved between each port of the chip mutually isolated.
Work as VIN1When esd event occurring between port and ground port, if VIN1Port is high pressure, Qn1、Qn2Transistor BE knot is anti-
Transistor Q to after breakdown, in Darlington transistorn3And Qn4Conducting, ESD electric current pass through the crystalline substance in the transistor in Darlington
Body pipe Qn3And Qn4It is released to bottom；If VIN1Port is low pressure, and ESD electric current is by diode D1It is released to VIN1Port；VIN2Port and ground
Esd event and V between portIN1Port case is identical, no longer repeats.
When esd event occurs between the port Adj and ground port, if the port Adj is high pressure, transistor Qn9And Qn10BE
After tying reverse breakdown, ESD electric current is by transistor Qn9And Qn10BE knot reverse breakdown is released to bottom；If the port Adj is low pressure, ESD electricity
Stream is by transistor Qn9And Qn10The port Adj is released to after BE knot forward conduction；VOUTEsd event and Adj between port and ground port
Port case is identical, no longer repeats.
Work as VIN1When esd event occurring between port and the port Adj, if VIN1Port is high pressure, and ESD electric current is by VIN1Port
It is released to ground, then transistor Q is passed through by ground portn9And Qn10BE knot forward conduction after be released to the port Adj；If VIN1Port is
Low pressure, ESD electric current is by transistor Qn9And Qn10It is released to ground port after BE knot reverse breakdown, then by ground port through diode D1Just
Guide, which is removed heat by catharsis, is put into VIN1Port；VIN1Port and VOUTPort case is identical, no longer repeats.
Other esd events are similar to the above, no longer repeat.
Test result shows that the full chip ESD of a kind of dual power supply wide band dipole linear voltage regulator designed based on the invention is protected
Protection structure, antistatic protection ability reachable 4000V or more under the conditions of HBM, higher than the linear voltage stabilization under conventional ESD distributional condition
Device ESD performance indicator.
The foregoing is merely presently preferred embodiments of the present invention, all equivalent changes done according to scope of the invention as claimed with
Modification, should all belong to the covering scope of the claims in the present invention.
Claims (8)
1. a kind of power supply ESD protection location over the ground, which is characterized in that including transistor Qn1, transistor Qn1Collector and transmitting
Pole is for connecting control circuit input power VIN1Or power transistor input power VIN2, base stage meets transistor Qn2Emitter；
Transistor Qn2Collector for connecting control circuit input power VIN1Or power transistor input power VIN2, base stage and resistance
R1One end and transistor Qn3Base stage connect, emitter meets transistor Qn1Base stage；Resistance R1Other end ground connection；Transistor Qn3's
Collector is for connecting control circuit input power VIN1Or power transistor input power VIN2, emitter and resistance R2One end and
Transistor Qn4Ground level connection；Resistance R2Other end ground connection；Transistor Qn4Collector is for connecting control circuit input power VIN1
Or power transistor input power VIN2, emitter ground connection；Capacitor C1One end is for connecting control circuit input power VIN1Or function
Rate transistor input power VIN2, the other end and transistor Qn3Base stage connection；Diode D1Negative end is defeated for connecting control circuit
Enter power supply VIN1Or power transistor input power VIN2, forward end ground connection.
2. a kind of power supply according to claim 1 ESD protection location over the ground, which is characterized in that ESD protection is single over the ground for power supply
Active device in member is all made of NPN transistor.
3. a kind of power supply according to claim 1 ESD protection location over the ground, which is characterized in that capacitor C1Using mos capacitance.
4. a kind of power supply according to claim 1 ESD protection location over the ground, which is characterized in that diode D1For chip substrate
To the parasitic diode of extension.
5. a kind of power supply according to claim 1 ESD protection location over the ground, which is characterized in that resistance R1It is used with resistance R2
Base resistance.
6. a kind of power supply according to claim 5 ESD protection location over the ground, which is characterized in that resistance R1 and resistance R2Length and width
Than being 45/10.
7. a kind of power supply according to claim 1 ESD protection location over the ground, which is characterized in that resistance R1 and resistance R2Resistance
Value is 1.0k Ω~1.5k Ω.
8. a kind of dual power supply wide-band linearity voltage-stablizer protects structure, which is characterized in that including two power supplys as described in claim 1
ESD protection location A over the ground1And A2And transistor Qn9, transistor Qn10, transistor Qn11With transistor Qn12；
Wherein, antistatic protection unit A1Power supply for connecting VIN1, other end ground connection；Antistatic protection unit A2Power supply use
In connection VIN2, other end ground connection；Transistor Qn9Collector for connecting control circuit input power VIN1, emitter is for connecting
Adjustment port Adj is met, base stage connects transistor Qn10Emitter；Transistor Qn10Collector for connect control circuit input
Power supply VIN1, base earth；Transistor Qn11Collector for connecting control circuit input power VIN2, emitter connection output
Port VOUT, base stage connection transistor Qn12Emitter；Transistor Qn12Collector for connecting control circuit input power
VIN2, base earth.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811291257.1A CN109375698B (en) | 2018-10-31 | 2018-10-31 | Power supply to ground ESD protection unit and dual supply broadband linear voltage regulator protection architecture |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811291257.1A CN109375698B (en) | 2018-10-31 | 2018-10-31 | Power supply to ground ESD protection unit and dual supply broadband linear voltage regulator protection architecture |
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| CN109375698A true CN109375698A (en) | 2019-02-22 |
| CN109375698B CN109375698B (en) | 2020-08-11 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115167600A (en) * | 2022-07-29 | 2022-10-11 | 西安微电子技术研究所 | Low dropout regulator circuit capable of resisting transient overshoot of output voltage |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62115764A (en) * | 1985-11-15 | 1987-05-27 | Hitachi Vlsi Eng Corp | Semiconductor integrated circuit device |
| EP0443055A1 (en) * | 1990-02-20 | 1991-08-28 | Siemens Aktiengesellschaft | Input protection structure for integrated circuits |
| CN103036552A (en) * | 2011-10-03 | 2013-04-10 | 天钰科技股份有限公司 | Static electricity detection circuit |
| CN206610809U (en) * | 2017-03-23 | 2017-11-03 | 西安微电子技术研究所 | A kind of full chip esd protection structure of Bipolar Linear voltage-stablizer |
| CN207367971U (en) * | 2017-11-07 | 2018-05-15 | 福建晋润半导体技术有限公司 | A kind of esd protection circuit |
-
2018
- 2018-10-31 CN CN201811291257.1A patent/CN109375698B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62115764A (en) * | 1985-11-15 | 1987-05-27 | Hitachi Vlsi Eng Corp | Semiconductor integrated circuit device |
| EP0443055A1 (en) * | 1990-02-20 | 1991-08-28 | Siemens Aktiengesellschaft | Input protection structure for integrated circuits |
| CN103036552A (en) * | 2011-10-03 | 2013-04-10 | 天钰科技股份有限公司 | Static electricity detection circuit |
| CN206610809U (en) * | 2017-03-23 | 2017-11-03 | 西安微电子技术研究所 | A kind of full chip esd protection structure of Bipolar Linear voltage-stablizer |
| CN207367971U (en) * | 2017-11-07 | 2018-05-15 | 福建晋润半导体技术有限公司 | A kind of esd protection circuit |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115167600A (en) * | 2022-07-29 | 2022-10-11 | 西安微电子技术研究所 | Low dropout regulator circuit capable of resisting transient overshoot of output voltage |
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| CN109375698B (en) | 2020-08-11 |
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