CN109361882A - Modular cmos imaging system - Google Patents
Modular cmos imaging system Download PDFInfo
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- CN109361882A CN109361882A CN201811338299.6A CN201811338299A CN109361882A CN 109361882 A CN109361882 A CN 109361882A CN 201811338299 A CN201811338299 A CN 201811338299A CN 109361882 A CN109361882 A CN 109361882A
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- sensor
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- video processing
- clock
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/71—Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
- H04N25/745—Circuitry for generating timing or clock signals
Abstract
Modular cmos imaging system, it is related to a kind of modular cmos imaging system, solve the imaging system of existing cmos image sensor, it is big that there are design efforts would, process-cycle is long, the problems such as at high cost, including cmos image sensor focal plane unit and video processing unit, cmos image sensor focal plane unit are connected with video processing unit by connector；Cmos image sensor focal plane unit includes cmos image sensor and clock translation circuit, digital signal shaping and level shifting circuit, vertical drive circuit and power converting circuit；For different cmos sensor applications, it is only necessary to replace corresponding cmos image sensor focal plane unit, not need replacement video processing unit, greatly save duration, cost, reduce design risk；The power supply of cmos image sensor is divided into multiclass, is powered respectively using two or more adjustable power supply and improves power-efficient in this way, reduces total power consumption, while reducing the influence that the fever of focal plane sensor generates mechanical-optical setup thermal deformation.
Description
Technical field
The present invention relates to a kind of modular cmos imaging systems, and in particular to a kind of energy compatibility face battle array, simple spectrum section line
The versatility module imaging system of a variety of cmos image sensors such as battle array, multispectral section of linear array, TDICMOS.
Background technique
Cmos image sensor is many kinds of, includes face battle array, linear array；Linear array is divided into multispectral section, simple spectrum section again, can also divide
For TDI operating mode device and non-TDI operating mode device.Operating voltage type required for different cmos image sensors
It is different with quantity, need the mode of input clock type, control signal and output data also different, if for every kind of CMOS figure
As sensor all designs a kind of specific imaging system, then have that design efforts would is big, and the process-cycle is long, problem at high cost.
Summary of the invention
The present invention is to solve the imaging system of existing cmos image sensor, and it is big that there are design efforts would, the process-cycle
It is long, it is at high cost the problems such as, a kind of modular cmos imaging system is provided.
Modular cmos imaging system, including cmos image sensor focal plane unit and video processing unit, it is described
Cmos image sensor focal plane unit is connected with video processing unit by connector；CMOS imaging sensor focal plane unit packet
Include cmos image sensor, clock translation circuit, digital signal shaping and level shifting circuit, vertical drive circuit and power supply
Translation circuit；
It include sensor clock module, sensor pixel module, sensors A D mould inside the cmos image sensor
Block, sensor image are simultaneously gone here and there sending module, sensor vertical drive module, sensor remaining digital control module, sensor and are supplied
Electrical bias module and sensor control electric level interface module；
Sensor pixel module carries out photoelectric conversion, and the analog signal of generation is converted to digitized map through sensors A D-module
As after data, then through sensor image and goes here and there after sending module is converted to serial image data and be sent into video processing unit；
Video processing unit provide clock signal by sensor control electric level interface module after by sensor clock mould
Block receives, clock needed for the sensor clock module generates sensor；
The control signal that video processing unit provides controls electric level interface module by sensor and converts the signal of input
For level needed for remaining digital control module of sensor；
The driving signal that video processing unit provides controls electric level interface module by sensor and is sent to sensor vertical
Drive module, the sensor vertical drive module provide the vertical driving signal of electric charge transfer for sensor；
After the voltage that the power supply that the video processing unit provides is converted to needed for sensor provides through power converting circuit
It is sent into the power supply biasing module of sensor.
Beneficial effects of the present invention:
One, the present invention is directed to different cmos sensor applications, it is only necessary to replace corresponding cmos image sensor focal plane
Unit can greatly save duration, cost without replacing video processing unit, reduce design risk；
Two, the power supply of cmos image sensor is divided into multiclass by the present invention, uses the adjustable of two or more
Power supply power respectively in this way improve power-efficient, reduce total power consumption, while reduce focal plane sensor fever generate ray machine
The influence of structure thermal deformation.
Three, entire cmos imaging system is divided into sensor focal plane using a kind of general processing configuration structure by the present invention
Two parts are handled with video, the compatible various cmos image sensors of video processing unit can export the biography of high and low frequency
Sensor clock is capable of inside high frequency accompanying clock, low frequency accompanying clock or the use video processing unit that receiving sensor returns
The multi-channel serial image data that is inputted of clock be trained soldier and carry out serioparallel exchange；It is exportable to be exported with sensor
The driver' s timing signal that accompanying clock is synchronous or the low-frequency clock of video processing unit output is synchronous, also exportable TDI
The vertical transfer driving signal of cmos sensor；For the operating voltage requirements of sensor, a variety of adjustable power supply electricity are exported
Pressure.Cmos image sensor focal plane unit is different for different sensor designs, and specified work is generated according to the power supply of input
Make voltage and biasing, and is filtered.
Four, the present invention adjusts the gain parameter of sensor according to the variation of incident laser energy, can get more preferably noise
Than.
Detailed description of the invention
Fig. 1 is modular cmos imaging system construction drawing of the present invention；
Fig. 2 is the principle of cmos image sensor focal plane unit in modular cmos imaging system of the present invention
Figure；
Fig. 3 is that the output clock type of video processing unit in modular cmos imaging system of the present invention is former
Reason figure；
Fig. 4 is the data receiver BANK row of video processing unit in modular cmos imaging system of the present invention
Cloth schematic diagram；
Fig. 5 is the power supply output principle figure of video processing unit in modular cmos imaging system of the present invention；
Fig. 6 is the memory arrangement principle of video processing unit in modular cmos imaging system of the present invention
Figure.
Specific embodiment
Specific embodiment one illustrates present embodiment in conjunction with Fig. 1 to Fig. 6, modular cmos imaging system, mainly
Comprising two parts, cmos image sensor focal plane unit and video processing unit, the two all can be by one piece or muti-piece wiring boards
Composition.Cmos image sensor focal plane unit is connected with video processing unit by connector, is sensed for different cmos images
The application of device, it is only necessary to cmos image sensor focal plane unit is replaced, and video processing unit remains unchanged.
Cmos image sensor is many kinds of, includes face battle array, linear array；Linear array is divided into multispectral section, simple spectrum section again, can also divide
For TDI operating mode device and non-TDI operating mode device.Include sensor clock module, biography inside cmos image sensor
Sensor block of pixels, sensors A D-module, sensor image and go here and there sending module, sensor vertical drive module, sensor its
The all or part of unit of remaining digital control module, sensor power supply biasing module, according to sensor it is different without
Together.
Block of pixels in cmos image sensor carries out photoelectric conversion, and the analog signal of generation is through sensors A D-module
After being converted to digital image data, then serial image data is converted to through sensor image and sending module of going here and there and is exported；
Sensor clock module receives externally input clock, clock needed for generating working sensor；Sensor remaining
Level needed for signal of the digital control module through inputting is converted to sensor, and the signal that will be exported be converted to it is required
Level.Cmos image sensor focal plane unit also includes clock translation circuit, digital signal shaping and level in addition to sensor
Conversion circuit, vertical drive circuit and power converting circuit.The power supply that video processing unit provides turns through power converting circuit
It is changed to the power supply biasing module that sensor is sent into after required voltage；The control signal that video processing unit provides is sent directly into
Cmos image sensor, or be sent into after vertical drive circuit；The driving signal that video processing unit provides is sent directly into
Cmos image sensor, or be sent into after vertical drive circuit；The clock signal that video processing unit provides is sent directly into
CMOS imaging sensor, or be sent into after clock translation circuit.
In present embodiment, the compatible various cmos image sensors of video processing unit, it is possible to provide various cmos images
Control signal needed for sensor receives the image data of cmos image sensor output；It is sensed for different cmos images
Device, it is thus only necessary to replace the corresponding focal plane plate of cmos image sensor, and the corresponding video processing board of video processing unit
It does not need to replace.
In present embodiment, as shown in figure 3, video processing unit can meet sensor low frequency single ended clock (using sensing
Phaselocked loop inside device carries out clock multiplier) and high frequency differential clocks (without using phaselocked loop progress frequency multiplication) clock demand, together
When output high frequency differential clocks (100MHz≤f≤720MHz) and low frequency single ended clock (f≤50MHz), for transmitting at a distance
(l >=30mm), also exportable low frequency (f≤50MHz) difference form clock；
In present embodiment, video processing unit can receive the serial image data no more than 119 channels, serial image
The Training Control clock of data can be by the low frequency accompanying clock, high frequency accompanying clock or video of cmos image sensor at
The internal clocking of unit is managed to generate；The serial image data in 119 channels is dispersed in 6 BANK with same area clock
(upper left, lower-left, it is left, right in, lower-left, bottom right) in, CMOS imaging sensor output high frequency accompanying clock be connected between
On the MRCC pin of BANK (in the left or right side), the low frequency accompanying clock of cmos image sensor is connected to video processing unit
Global clock input pin on, after the clock multiplier circuit frequency multiplication inside video processing unit as regional clock be sent into 6
A BANK；The internal clocking of video processing unit is generated by crystal oscillator, through the clock multiplier inside video processing unit
6 BANK are sent into as regional clock after circuit frequency multiplication.
In present embodiment, as shown in figure 5, the power supply of cmos image sensor is divided into biography by video processing unit
Sensor A/D module power supply, sensor digital partial circuit (comprising sensor clock module, sensor image and go here and there sending module,
Sensor remaining digital control module) power supply, the power supply of sensor vertical drive module, sensor pixel module for power supply, sensor
Control electric level interface power supply and sensor biasing power supply.
The power supply of cmos image sensor is powered respectively using two or more adjustable power supply,
Selecting the principle of adjustable power supply type is:
(Vin-Vsensori)×Isensori≤0.2
V in formulainFor adjustable power supply output voltage, VsensoriFor i-th kind of supply voltage of sensor, IsensoriFor
The operating current of i-th kind of supply voltage of sensor.
In present embodiment, first memory group is used to carry out the storage of reset image data inside video processing unit,
Then subtract each other after reading with the photoreceptor signal of subsequent appearance；Second memory group carries out HDR algorithm, by high low-gain channel
Image data merges into the image data of single width high dynamic；Image data after third memory group merges caches, conversion
It is exported for the image data of specific protocol.
The single-ended control signal of the exportable multiple groups of video processing unit: it is exportable be no more than 80 single-ended control signal.Video
Processing unit can receive the single-ended return signal of multiple groups: can receive and is no more than 40 single-ended return signals.
In present embodiment, the imaging parameters of cmos image sensor can be adjusted, are obtained according to the variation of incident laser energy
Obtain more preferably signal-to-noise ratio.Cmos image sensor usually has the pixel gain pix_gain before charge is converted to voltage, in mould
Quasi- voltage signal is converted to the adjustable analog gain PGA_gain before digital signal, and the digital image data to ADC output
Carry out the digital gain ADC_gain of digital stretching.It, will in present embodiment in order to improve the signal-to-noise ratio of output image as far as possible
According to the distribution of incident laser energy, three kinds of gains are set: (1) working as Vs≤VADC/(kPGA×kpix_gain), pix_gain is set
It is set to maximum value kpix_gain, PGA_gain is set as maximum value kPGA, ADC_gain 1；(2) work as VADC/(kPGA×
kpix_gain) < Vs≤VADC/kpix_gain, pix_gain is set as maximum value kpix_gain, PGA_gain is set as maximum value 1,
ADC_gain is 1；
(3) work as VADC/kpix_gain< Vs< VADC, pix_gain is set as maximum value 1, and PGA_gain is set as maximum value 1,
ADC_gain is 1.Corresponding signal-to-noise ratio is as follows:
In formula, VSIt indicates to obtain cmos image sensor focal plane unit in the case where pix_gain is 1 by photogenerated charge
Cmos image sensor inside sense amplifier output voltage, kPGAIt indicates from sense amplifiers to pre- before ADC quantization
Put device gain, σsIndicate incident photon shot noise, σdIndicate dark noise, σrIndicate sense amplifier noise, σquaIndicate quantization
Noise, σampIndicate the background noise of preamplifier inside the cmos image sensor of cmos image sensor focal plane unit.
In present embodiment, cmos image sensor focal plane unit uses the cmos image sensor of Chang Guangchen core company；
The controller of video processing unit mainly selects the FPGA 6vlx550tff1760 using Xilinx company, and memory is using beauty
The DDR3 memory of light company, DCDC module use the non-isolated voltage changer of Linear Tech；Connector selects samtec public
The high-density connector of department.
Claims (9)
1. modular cmos imaging system, including cmos image sensor focal plane unit and video processing unit, it is characterized in that:
The cmos image sensor focal plane unit is connected with video processing unit by connector；Cmos image sensor focal plane unit
Including cmos image sensor, clock translation circuit, digital signal shaping and level shifting circuit, vertical drive circuit and power supply
Translation circuit；
Include sensor clock module, sensor pixel module, sensors A D-module, sensing inside the cmos image sensor
Device image simultaneously goes here and there sending module, sensor vertical drive module, sensor remaining digital control module, sensor for electrical bias mould
Block and sensor control electric level interface module；
Sensor pixel module carries out photoelectric conversion, and the analog signal of generation is converted to digital image data through sensors A D-module
Afterwards, it then through sensor image and goes here and there after sending module is converted to serial image data and is sent into video processing unit；
The clock signal that video processing unit provides after sensor control electric level interface module by sensor clock module by being connect
It receives, clock needed for the sensor clock module generates sensor；
The control signal that video processing unit provides controls electric level interface module by sensor and the signal of input is converted to biography
Level needed for remaining digital control module of sensor；
The driving signal that video processing unit provides controls electric level interface module by sensor and is sent to sensor vertical driving
Module, the sensor vertical drive module provide the vertical driving signal of electric charge transfer for sensor；
It is sent into after the voltage that the power supply that the video processing unit provides is converted to needed for sensor provides through power converting circuit
The power supply biasing module of sensor.
2. modular cmos imaging system according to claim 1, it is characterised in that:
Video processing unit provide clock signal after clock translation circuit by sensor control electric level interface module after by
Sensor clock module receives；
The control signal that video processing unit provides passes through sensor control after digital signal shaping and level shifting circuit conversion
Electric level interface module processed, which is sent to, is fed directly to remaining digital control module of sensor；
The driving signal that video processing unit provides controls electric level interface module by sensor and is sent to sensor vertical driving
Module.
3. modular cmos imaging system according to claim 1, which is characterized in that the cmos image sensor is burnt
Face unit and video processing unit are made of one piece or muti-piece wiring board, for answering for different cmos image sensors
With, it is only necessary to cmos image sensor focal plane unit is replaced, video processing unit remains unchanged.
4. modular cmos imaging system according to claim 1, which is characterized in that the video processing unit can
When meeting the needs of sensor low frequency single ended clock and high frequency differential clocks, and exporting high frequency differential clocks and single-ended low frequency simultaneously
Clock being capable of output low frequency difference form clock for transmitting at a distance.
5. modular cmos imaging system according to claim 1, which is characterized in that the video processing unit receives
Less than or equal to the serial image data in 119 channels, the Training Control clock of serial image data passes through cmos image sensor
The internal clocking of low frequency accompanying clock, high frequency accompanying clock or video processing unit generates；
The serial image data in 119 channel is dispersed in six BANK with same area clock, cmos image sensing
The high frequency accompanying clock of device output is connected between on the MRCC pin of BANK, and the low frequency accompanying clock of cmos image sensor connects
It connects on the global clock input pin of video processing unit, makees after the clock multiplier circuit frequency multiplication inside video processing unit
Six BANK are sent into for regional clock；The internal clocking of video processing unit is generated by crystal oscillator, through video processing unit
Six BANK are sent into as regional clock after internal clock multiplier circuit frequency multiplication.
6. modular cmos imaging system according to claim 1, which is characterized in that the video processing unit will
The power supply of cmos image sensor is divided into the power supply of sensors A D-module, sensor clock module, sensor image and hair of going here and there
Send the power supply of remaining digital control module of module, sensor, the power supply of sensor vertical drive module, sensor pixel module for power supply,
Sensor controls electric level interface module for power supply and the power supply of sensor biasing module.
7. modular cmos imaging system according to claim 1, which is characterized in that the power supply of cmos image sensor
Power supply is powered respectively using two or more adjustable power supply, and the principle of adjustable power supply type is selected to be:
(Vin-Vsensori)×Isensori≤0.2
V in formulainFor adjustable power supply output voltage, VsensoriFor i-th kind of supply voltage of sensor, IsensoriFor sensing
The operating current of i-th kind of supply voltage of device.
8. modular cmos imaging system according to claim 1, which is characterized in that the video processing unit also wraps
Include three groups of memory groups, first memory group is used to carry out the storage of reset image data, after then reading with subsequent appearance
Photoreceptor signal subtracts each other；
The image data of high low-gain channel is merged into the figure of single width high dynamic for carrying out HDR algorithm by second memory group
As data；
Image data after third memory group is used to merge caches, and is converted to the figure of Camera Link or 2711 agreements
As data export.
9. modular cmos imaging system according to claim 1, which is characterized in that the video processing unit can
The single-ended control signal of multiple groups is exported, the single-ended return signal of multiple groups can be received.
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Application publication date: 20190219 |