CN109361324A - A kind of three phase inverter parallel power equalization methods based on zero-sequence component - Google Patents
A kind of three phase inverter parallel power equalization methods based on zero-sequence component Download PDFInfo
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- CN109361324A CN109361324A CN201811582517.0A CN201811582517A CN109361324A CN 109361324 A CN109361324 A CN 109361324A CN 201811582517 A CN201811582517 A CN 201811582517A CN 109361324 A CN109361324 A CN 109361324A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/493—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode the static converters being arranged for operation in parallel
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Abstract
The invention discloses a kind of three phase inverter parallel power equalization methods based on zero-sequence component.Method for balancing powers of the invention is by the way that the zero curve between three phase inverter to be connected with each other, constitute zero sequence loop bus, every inverter issues a small zero-sequence component, the amplitude and phase information of zero-sequence component characterize idle and active information respectively, to realize the active and idle closed loop Balance route of equipment using the integrated information of zero-sequence component on detection zero sequence loop bus.Method proposed by the present invention realizes the interaction of power information using the zero curve of equipment itself without the communication and signal bus, communication or bus logic device without additional complexity of Conventional equalization scheme, Immunity Performance is strong, power-sharing speed is fast, and method is simple and easy, and effect is obvious.
Description
Technical field
The present invention relates to the DC-AC electrical energy changer of parallel running, and in particular to a kind of based on zero-sequence component
Three phase inverter parallel power equalization methods.
Background technique
Direct current system can be transformed to alternating current system by inverter, provide the various exchange electricity consumptions with better quality.
With the development of microgrid and intelligent power grid technology, the capacity requirement of microgrid gradually expands, therefore would generally be distributed inside microgrid
There are multiple inverters, in order to realize the stable operation and higher economic benefit of more distributed inverters, it is necessary to more
Inverter realizes the equilibrium assignment of mutual power.This requires inverters other than the voltage control of itself, also
It needs to carry out the interaction of information between each other, and then helps to realize power-sharing control.
Traditional inverter power-sharing method is generally divided into two major classes, and one kind is to realize function by droop control method
Rate is divided equally;One kind is the interaction of multiple inverter power informations to be realized by communication network or signal bus, and then complete function
Rate, which is divided equally, to be controlled.Although droop control method does not need additional communication or bus unit, due to the introducing of droop characteristic,
Inverter output voltage quality decline, and power-sharing effect is very big by line impedance characteristic and sagging index impacts, function
Respectively the effect is unsatisfactory for rate.By the interaction of power information between inverter, so it is all in net inversion electricity by calculating
Source mean power, then it is compared to the method for realizing power closed-loop control with own power, the good equal of power may be implemented
Divide effect, and does not influence output voltage characteristic.However power information interaction is realized with communication network or signal bus, first is that needing
Additional communication and bus unit, second is that power-sharing speed is influenced by communication speed and signal transmission delay, third is that weak
Electric signal is highly susceptible to strong electromagnetic in a network and influences the correctness of information exchange, finally when network or bus unit
It will lead to power information interaction when failure and mistake occur, influence the effect of power-sharing control.
Summary of the invention
The object of the present invention is to provide a kind of three phase inverter parallel power equalization methods based on zero-sequence component, can
Using the connection of a cable and a resistance, by way of injecting zero-sequence component, realize between more inverters quickly
Strong anti-interference have automatic fault isolation ability power-sharing control.
The present invention provides a kind of the three phase inverter parallel power equalization methods based on zero-sequence component, the method use
In carrying out power equalization to the inverter of multiple parallel connections, each inverter includes that three-phase distinguishes independent three-phase inversion
Independent A, B, C phase ac filter circuit of bridge, three-phase, three-phase transformer, zero sequence resistance Rz, measurement three-phase output voltage and electric current
First sensor, measure zero sequence resistance both end voltage second sensor, the power-sharing control module based on zero-sequence component
And the closed loop control module of inverter itself, wherein the connection of each three phase inverter bridge it is each be connected one exchange filter
It is connected after wave circuit with a phase winding of three-phase transformer, power-sharing control module includes zero-sequence component vector synthesizer, zero
Sequence pressure difference Fourier transformer, amplitude adjust PI arithmetic unit, phase adjusted PI arithmetic unit, which is characterized in that the power equalization
Method includes the following steps:
(1), for any one inverter, the zero curve of its three-phase transformer is connected to a zero sequence resistance Rz, respectively
The zero sequence resistance Rz of a inverter has similar resistance, and the zero sequence resistance Rz of each inverter is both connected to together,
Form zero sequence bus, the zero sequence resistance RZResistance value should be much larger than the impedance of inverter outlet line;
(2), for each inverter, the voltage and current signals that its first sensor measures are obtained, are based on the electricity
Pressure and electric current calculate the active-power P of current inverter itselfnAnd reactive power Qn, then by active-power PnWith idle function
Rate QnIt is sent into zero-sequence component vector synthesizer, the zero-sequence component ZV that the inverter should export is calculatedn, zero-sequence component
ZVnWith the three-phase voltage V detectedA,B,CThe closed loop controller of the inverter itself, the zero-sequence component are sent into after addition
Target zero-sequence component ZV is calculated using following public formula (I)s in vector synthesizern:
Wherein, M in public formula (I)0、P0、Q0It is initial setting constant, f is the frequency of zero-sequence component, every inverter
Zero-sequence component frequency is consistent, θ0For the phase of inverter output voltage, t is the time;
(3), the zero sequence resistance R that the second sensor of every inverter detects is obtainedZThe residual voltage V at both endsZnAnd
And to residual voltage VZnFourier transformation operation is carried out, the amplitude Mag of the residual voltage is obtainedZnWith residual voltage VZn's
Phase PhaZn;
(4), for each inverter, by the amplitude Mag of target amplitude poor 0 and residual voltageZnSubtract each other, is then fed into
Amplitude adjusts PI arithmetic unit, and the inverter output voltage amplitude regulated quantity Δ V, Δ V and inverter voltage are obtained after calculating
Amplitude instructs VrefThe closed loop controller of inverter itself is sent into after addition;
(5), for each inverter, by the phase Pha of target phase difference 0 and residual voltageZnSubtract each other, is then fed into
Phase adjusted PI arithmetic unit obtains inverter output voltage phase adjusted amount Δ θ, Δ θ and inverter voltage phase after calculating
Bit instruction θrefThe closed loop controller of the inverter itself is sent into after addition.
The advantages of control method of the present invention, is:
(1) multiple inverter zero curve interconnections are realized by a cable and a resistance, after constituting zero sequence bus, utilized
The zero sequence voltage component that inverter itself issues, forms the access of power information interaction, information exchange hardware circuit is simple,
It is at low cost, and information exchange can be realized by the power conversion of inverter itself;
(2) zero-sequence component is the alternating voltage amount an of physics, is delivered by two characteristic quantities of vector magnitude and phase
Active and idle two information, and zero-sequence component is transmitted using power line, information transmits real-time high-efficiency, the fast of power may be implemented
Speed, which is divided equally, to be controlled;
(3) arbitrary frequency can be set in zero-sequence component, selects the zero-sequence component of high frequency that can more accelerate power-sharing
Speed, furthermore zero-sequence component will not have an impact output voltage quality;
(4) after any inverter failure exits, which is equivalent to open circuit, will not be to zero sequence bus
Any influence is generated, power-sharing control will not be affected;
(5) forceful electric power voltage signal is transmitted using power line, it is stronger compared to communication network or signal bus interference free performance.
Detailed description of the invention
Fig. 1 is the system block diagram of the three phase inverter parallel power equalization methods based on zero-sequence component;
Fig. 2 is to utilize power-sharing waveform diagram when two inverter parallel connections of control method of the present invention;
Fig. 3 is to utilize regulation of width phase waveform diagram when two inverter parallel connections of control method of the present invention;
Fig. 4 is to utilize voltage and current waveform when two inverter parallel connections of control method of the present invention.
Specific embodiment
The present invention will be further explained below with reference to the attached drawings.
Three phase inverter parallel power equalization methods based on zero-sequence component of the invention are used for shown in the middle and upper part Fig. 1
Inverter controlled, be to be realized using control circuit shown in the middle and lower part Fig. 1.As shown, including that three-phase is distinguished
Three phase-change pressures of independent A, B, C phase bridge-type high frequency modulated circuit, independent A, B, C phase ac filter circuit of three-phase, isolated form
Device, zero sequence resistance, sensor, the power based on zero-sequence component for measuring three-phase output voltage electric current and zero sequence resistance both end voltage
The respectively closed loop control module of control module and inverter itself, wherein power-sharing control module includes zero-sequence component
Vector synthesizer, zero sequence pressure difference Fourier transformer, amplitude adjust PI arithmetic unit, phase adjusted PI arithmetic unit.
In the following, the equalization methods of n-th inverter are described in detail, other every inverter is all identical.It will
The zero curve of three-phase transformer is connected the resistance R of a similar resistance by n-th inverterZ, then resistance RZThe other end and its
He is inverter RZThe other end connection, formed zero sequence bus.Further, when n-th inverter operation, based on output electricity
The active-power P of itself is calculated in current voltage testing resultnAnd Qn, then by PnAnd QnIt is sent into zero-sequence component Vector modulation
Device obtains the zero-sequence component ZV that this inverter should export after calculatingn, zero-sequence component ZVnWith the three-phase voltage detected
VA,B,CThe closed loop controller of inverter itself is sent into after addition.Further, n-th inverter resistance RZBoth ends detect
Zero sequence pressure difference VZnFourier transformation operation is carried out, the amplitude Mag of the voltage is obtainedZnWith the phase Pha of the voltageZn.Further
Ground, by the amplitude Mag of target amplitude poor 0 and zero sequence pressure differenceZnSubtract each other, is then fed into amplitude and adjusts PI arithmetic unit, obtained after calculating
Inverter output voltage amplitude regulated quantity Δ V, Δ V and inverter voltage magnitude instruct VrefInverter is sent into after addition
The closed loop controller of itself.Further, by the phase Pha of target phase difference 0 and zero sequence pressure differenceZnSubtract each other, is then fed into phase
PI arithmetic unit is adjusted, inverter output voltage phase adjusted amount Δ θ is obtained after calculating, Δ θ refers to inverter voltage-phase
Enable θrefThe closed loop controller of inverter itself is sent into after addition.
Digital signal processor (DSP, Digital Signal Processor), monolithic can be used in the control module
Machine or field programmable gate array (FPGA, Field Programmable Gate Array) etc. have Digital Signal Processing
It is realized with the chip of control ability, embodiment selects the dsp chip TMS28335 of TI company, which is up to
150MHz, and there are 12 tunnels to compare PWM output end entirely, possess enough operational capabilities and control ability.
The controller parameter that the simulation waveform of Fig. 2~Fig. 4 uses are as follows: inverter voltage rated power 600kW, zero-sequence component base
Wave frequency rate f is 50Hz, switching frequency 3kHz, sampling period TsIt is 20ms, zero sequence impedance R for 1/3ms, primitive period TZIt is 100
Ω, M0It is 10, Q0It is 20000, P0It is 1200000, Proportional coefficient K P is 13.5 in the PI parameter of amplitude regulator, integral coefficient
KI is 1125, and Proportional coefficient K P is 0.03 in the PI parameter of phase regulator, and integral coefficient KI is 2.5.Have when emulation two it is inverse
Variable power source is in parallel, and amplitude instruction difference 20V, phase bit instruction differ 10 degree when two machine parallel connections is artificially arranged, Balance route before 0.2s
Method is not put into, 0.2s post-equalization control method investment, the inverter idle running in 0~0.4s, 0.4~0.6s impact
300kW load, 0.6~0.8s anticlimax 300kW load, 0.8~1.0s impact 300kW load again, 1.0~1.4s impact again
300kW load.
From figure 2 it can be seen that when equalization algorithm is not put into before 0.2s, between two inverters due to voltage difference and
The presence of phase difference leads to the active circulation of about 50kW and 130kVar reactive circular power flow occurred, puts into equalization algorithm at the 0.2s moment
Afterwards, power margin is reduced rapidly, regulating time about 20ms, at the load impact anticlimax moment of 0.4s, 0.6s, 0.8s and 1s, two
Platform inverter power will appear the fluctuation of transient state, however due to the presence of Balance route algorithm, point of power in dynamic process
It is still maintained within 5% with margin, into after stable state, power equalization degree is very good, and power distribution margin is less than 1%.
From figure 3, it can be seen that the phase and amplitude instruction of two inverters is fast after 0.2s equalization algorithm investment
To consistent, regulating time is less than 20ms for speed control, and at the time of load mutates, amplitude instruction only has lesser transient state
Fluctuation, and phase bit instruction is then always maintained at unanimously substantially.In " the no control interconnection inverter parallel dynamic based on droop characteristic control
Performance evaluation " in a text, conventional sagging control power equalization regulating time usually requires hundreds of ms;" it is being based on CAN bus
Inverter distribution Parallel Control " and " the Single-Phase Inverter Source parallel system of Fieldbus Control " document in, be limited
It is delayed in CAN bus communication speed and hardware, every 20ms just carries out primary information interaction, and power equalization regulating time is generally up to
To s grades.Therefore, method of the invention is substantially better than existing method.
Figure 4, it is seen that zero-sequence component injection does not bring shadow to the voltage and current waveform of two inverters
It rings, output voltage electric current maintains good quality.
The present invention is not only limited to above-mentioned specific embodiment, and persons skilled in the art are according to embodiment and attached drawing public affairs
Open content, the present invention can be implemented using other a variety of specific embodiments, therefore, it is all using design structure of the invention and
Thinking does the design of some simple transformation or change, both falls within the scope of protection of the invention.
Claims (2)
1. a kind of three phase inverter parallel power equalization methods based on zero-sequence component, the method is used for multiple parallel connections
Inverter carries out power equalization, and each inverter includes that distinguish independent three phase inverter bridge, three-phase independent for three-phase
A, B, C phase ac filter circuit, three-phase transformer, zero sequence resistance Rz, measurement three-phase output voltage and electric current first sensor,
Measure second sensor, the power-sharing control module based on zero-sequence component and the inverter of zero sequence resistance both end voltage certainly
The closed loop control module of body, wherein after each ac filter circuit that is connected of each three phase inverter bridge connection with three-phase
One phase winding of transformer is connected, and power-sharing control module includes zero-sequence component vector synthesizer, zero sequence pressure difference Fourier change
Parallel operation, amplitude adjust PI arithmetic unit, phase adjusted PI arithmetic unit, which is characterized in that the method for balancing powers includes following steps
It is rapid:
(1), for any one inverter, the zero curve of its three-phase transformer is connected to a zero sequence resistance Rz, it is each inverse
The zero sequence resistance Rz of variable power source has similar resistance, and the zero sequence resistance Rz of each inverter is both connected to together, is formed
Zero sequence bus;
(2), for each inverter, the voltage and current signals that its first sensor measures are obtained, based on the voltage and
Electric current calculates the active-power P of current inverter itselfnAnd reactive power Qn, then by active-power PnAnd reactive power Qn
It is sent into zero-sequence component vector synthesizer, the zero-sequence component ZV that the inverter should export is calculatedn;
(3), the zero sequence resistance R that the second sensor of every inverter detects is obtainedZThe residual voltage V at both endsZnAnd it is right
Residual voltage VZnFourier transformation operation is carried out, the amplitude Mag of the residual voltage is obtainedZnWith residual voltage VZnPhase
PhaZn;
(4), for each inverter, by the amplitude Mag of target amplitude poor 0 and residual voltageZnSubtract each other, is then fed into amplitude
PI arithmetic unit is adjusted, the inverter output voltage amplitude regulated quantity Δ V, Δ V and inverter voltage magnitude are obtained after calculating
Instruct VrefThe closed loop controller of inverter itself is sent into after addition;
(5), for each inverter, by the phase Pha of target phase difference 0 and residual voltageZnSubtract each other, is then fed into phase
PI arithmetic unit is adjusted, inverter output voltage phase adjusted amount Δ θ is obtained after calculating, Δ θ refers to inverter voltage-phase
Enable θrefThe closed loop controller of the inverter itself is sent into after addition.
2. the three phase inverter parallel power equalization methods according to claim 1 based on zero-sequence component, feature exist
In the zero sequence resistance RZResistance value be much larger than the impedance of inverter outlet line.
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Cited By (3)
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CN110336476A (en) * | 2019-07-31 | 2019-10-15 | 天津大学 | Closed loop residual voltage for cascaded H-bridges converter optimizes injection method |
CN113872227A (en) * | 2021-10-12 | 2021-12-31 | 华为数字能源技术有限公司 | Power supply system, converter and circulating current restraining method of converter |
CN116526817A (en) * | 2023-06-26 | 2023-08-01 | 深圳市首航新能源股份有限公司 | Inverter parallel zero sequence circulation suppression method and device and inverter parallel system |
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