CN109360844A - A kind of display panel and a kind of display device - Google Patents
A kind of display panel and a kind of display device Download PDFInfo
- Publication number
- CN109360844A CN109360844A CN201811234837.7A CN201811234837A CN109360844A CN 109360844 A CN109360844 A CN 109360844A CN 201811234837 A CN201811234837 A CN 201811234837A CN 109360844 A CN109360844 A CN 109360844A
- Authority
- CN
- China
- Prior art keywords
- sub
- signal wire
- thickness
- signal
- line width
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/131—Interconnections, e.g. wiring lines or terminals
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Geometry (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Electroluminescent Light Sources (AREA)
Abstract
The present invention provides a kind of display panel and a kind of display device.A kind of display panel, comprising: viewing area and the non-display area around viewing area；A plurality of first signal wire and multiple pixels；Viewing area includes the first display area, the second display area, and a plurality of first signal wire includes the first sub first signal wire and the second sub first signal wire, and the first sub first signal wire is located at the first display area, and the second sub first signal wire is located at the second display area；The quantity for pixel connect with one first sub first signal wire is a, and the quantity for pixel connect with one second sub first signal wire is b, wherein a, b are integer, and 0 < a < b；First sub first signal wire has the first conductivity, and the second sub first signal wire has the second conductivity, and the first conductivity is less than the second conductivity.The display performance of the first display area where first sub first signal wire is substantially the same with the display performance of the second display area where the second sub first signal wire.
Description
[technical field]
The present invention relates to field of display technology more particularly to a kind of display panel and a kind of display devices.
[background technique]
Fig. 1 is a kind of floor map of display panel in the prior art.Fig. 2 is the another of display panel in the prior art
Kind floor map.Display panel 100 includes viewing area 110 and the non-display area 120 around viewing area 110.It wraps viewing area 110
Include the first display area 111, the second display area 112.First display area 111 has recess 150.Display panel 100 also wraps
Include connected signal wire 130 and pixel 140.It is aobvious to be substantially equal to second for the conductivity of signal wire 130 in first display area 111
Show the conductivity of signal wire 130 in region 112.Display panel 100 is shown unevenly.
[summary of the invention]
In order to solve the above technical problem, the present invention provides a kind of display panels and a kind of display device.
On the one hand, the present invention provides a kind of display panel, comprising:
Viewing area and non-display area around the viewing area；
A plurality of first signal wire and multiple pixels；
The viewing area includes the first display area, the second display area, and a plurality of first signal wire includes the first son
First signal wire and the second sub first signal wire,
Described first sub first signal wire is located at first display area, and the described second sub first signal wire is located at described
Second display area；
The quantity for pixel connect with first sub first signal wire is a, with one article of second son the
The quantity of the pixel of one signal wire connection is b, wherein a, b are integer, and 0 < a < b；
Described first sub first signal wire has the first conductivity, and the described second sub first signal wire has the second conductance
Rate, first conductivity are less than second conductivity.
Optionally, first signal wire includes one or more of scan signal line and transmitting signal wire.
Optionally, the display panel further include:
Active layer；
In the first overlapping region that the described first sub first signal wire and the active layer overlap, first son first is believed
Number line has the first line width and first thickness；In the second crossover region that the described second sub first signal wire and the active layer overlap
Domain, the described second sub first signal wire have the second line width and second thickness；
The ratio of first line width and second line width is 0.98 to 1.02, the first thickness and second thickness
The ratio of degree is 0.98 to 1.02.
Optionally, outside first overlapping region that the described first sub first signal wire and the active layer overlap, institute
Stating the first sub first signal wire has third line width and third thickness；It is handed in the described second sub first signal wire and the active layer
Outside folded second overlapping region, the described second sub first signal wire has the 4th line width and the 4th thickness；
The third line width is less than the 4th line width, and/or, the third thickness is less than the 4th thickness.
Optionally, the third line width is less than the 4th line width, and between the third line width and the 4th line width
Ratio be more than or equal to 3%, be less than or equal to 60%.
Optionally, the third thickness is less than the 4th thickness, and between the third thickness and the 4th thickness
Ratio be more than or equal to 10%, be less than or equal to 96%.
Optionally, first signal wire includes data signal line.
Optionally, the display panel further include:
The first metal layer；
The overlapping area of the first metal layer and first sub first signal wire is S1；The first metal layer and institute
The overlapping area for stating the second sub first signal wire is S2, wherein 0≤S2 < S1.
Optionally, the described first sub first signal wire has the 5th line width and the 5th thickness, the described second sub first signal
Line has the 6th line width and the 6th thickness；
5th line width is less than the 6th line width, and/or, the 5th thickness is less than the 6th thickness.
Optionally, the 5th line width is less than the 6th line width, and between the 5th line width and the 6th line width
Ratio be more than or equal to 3%, be less than or equal to 7%.
Optionally, the 5th thickness is less than the 6th thickness, and between the 5th thickness and the 6th thickness
Ratio be more than or equal to 94%, be less than equal 98%.
On the other hand, the present invention provides a kind of display device, including the display panel.
In a kind of display panel of the present invention, the first sub first signal wire is located at the first display area, and the second son first is believed
Number line is located at the second display area.Less than one second son first of quantity of the pixel of one first sub first signal wire connection is believed
The quantity of the pixel of number line connection.Less than one second the first signal wire of son of pixel load of one first sub first signal wire
Pixel load.Second conductivity of first conductivity of the first sub first signal wire less than the second sub first signal wire.For example, the
The line width of one sub first signal wire less than the second sub first signal wire line width so that the first conductance of the first sub first signal wire
Second conductivity of the rate less than the second sub first signal wire；Alternatively, the thickness of the first sub first signal wire is less than the second son first
The thickness of signal wire, so that second conductance of the first conductivity of the first sub first signal wire less than the second sub first signal wire
Rate.The conductor loading of one first sub first signal wire is greater than the conductor loading of one second sub first signal wire.When the first son
The second conductivity setting of first conductivity of the first signal wire and the second sub first signal wire is appropriate, then first son first
The difference of the conductor loading of the conductor loading of signal wire and one second sub first signal wire is substantially equal to first son first
The pixel of signal wire loads and the difference of the pixel load of one second sub first signal wire.One first sub first signal wire is led
The pixel that the difference of the conductor loading of linear load and one second sub first signal wire compensates one first sub first signal wire loads
And the difference of the pixel load of one second sub first signal wire.The conductor loading of one first sub first signal wire is loaded with pixel
The sum of be substantially equal to or close to the sum of the conductor loading of one second sub first signal wire and pixel load.One first son
The total load of first signal wire is substantially the same with the one second sub total load of first signal wire.When same drive module point
Not Cai Yong the first sub first signal wire, the second sub first signal wire transmission driving signal when, the driving of the first sub first signal wire
Signal is substantially the same with the second sub driving signal of first signal wire, so that each pixel of the first sub first signal wire connection
Luminous intensity it is substantially the same with the luminous intensity of each pixel of the second sub first signal wire connection.Therefore, the first son
The second display area where the display performance of the first display area where one signal wire and the second sub first signal wire it is aobvious
Show that performance is substantially the same, the display of display panel is substantially uniform.
[Detailed description of the invention]
In order to illustrate the technical solution of the embodiments of the present invention more clearly, below will be to needed in the embodiment attached
Figure is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for this field
For those of ordinary skill, without creative efforts, it can also be obtained according to these attached drawings other attached drawings.
Fig. 1 is a kind of floor map of display panel in the prior art；
Fig. 2 is another floor map of display panel in the prior art；
Fig. 3 is a kind of a kind of floor map of display panel provided in an embodiment of the present invention；
Fig. 4 is a kind of another floor map of display panel provided in an embodiment of the present invention；
Fig. 5 is the driving circuit figure of pixel in a kind of display panel provided in an embodiment of the present invention；
Fig. 6 is a kind of floor map of the first display area in a kind of display panel provided in an embodiment of the present invention；
Fig. 7 is a kind of floor map of the second display area in a kind of display panel provided in an embodiment of the present invention；
Fig. 8 is a kind of another floor map of display panel provided in an embodiment of the present invention；
Fig. 9 is another floor map of the first display area in a kind of display panel provided in an embodiment of the present invention；
Figure 10 is another floor map of the second display area in a kind of display panel provided in an embodiment of the present invention；
Figure 11 is a kind of another floor map of display panel provided in an embodiment of the present invention；
Figure 12 is a kind of floor map of display device provided in an embodiment of the present invention.
[specific embodiment]
For a better understanding of the technical solution of the present invention, being retouched in detail to the embodiment of the present invention with reference to the accompanying drawing
It states.
It will be appreciated that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.Base
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts it is all its
Its embodiment, shall fall within the protection scope of the present invention.
The term used in embodiments of the present invention is only to be not intended to be limiting merely for for the purpose of describing particular embodiments
The present invention.In the embodiment of the present invention and the "an" of singular used in the attached claims, " described " and "the"
It is also intended to including most forms, unless the context clearly indicates other meaning.
It should be appreciated that term "and/or" used herein is only a kind of incidence relation for describing affiliated partner, indicate
There may be three kinds of relationships, for example, A and/or B, can indicate: individualism A, exist simultaneously A and B, individualism B these three
Situation.In addition, character "/" herein, typicallys represent the relationship that forward-backward correlation object is a kind of "or".
It will be appreciated that though display area may be described in embodiments of the present invention using term first, second etc., but
These display areas should not necessarily be limited by these terms.These terms are only used to for being distinguished from each other out display area.For example, not departing from
In the case where range of embodiment of the invention, the first display area can also be referred to as the second display area, similarly, the second display
Region can also be referred to as the first display area.
Fig. 3 is a kind of a kind of floor map of display panel provided in an embodiment of the present invention.Fig. 4 is the embodiment of the present invention
A kind of another floor map of the display panel provided.
As shown in Figure 3 and Figure 4, a kind of display panel 200 provided in an embodiment of the present invention, comprising: viewing area 210 and surround
The non-display area 220 of viewing area 210；A plurality of first signal wire 230 and multiple pixels 240；Viewing area 210 includes the first viewing area
Domain 211, the second display area 212, a plurality of first signal wire 230 include that first the first signal wire of son 231 and the second son first are believed
Number line 232, the first sub first signal wire 231 are located at the first display area 211, and the second sub first signal wire 232 is located at second and shows
Show region 212；The quantity for the pixel 240 connecting with one first sub first signal wire 231 is a, is believed with one second son first
The quantity of the pixel 240 of number line connection 232 is b, wherein a, b are integer, and 0 < a < b；First sub first signal wire 231 tool
There is the first conductivity, the second sub first signal wire 232 has the second conductivity, and the first conductivity is less than the second conductivity.
As depicted in figs. 1 and 2, in the display panel of the prior art 100, the first display area 111 has recess 150,
Second display area 112 does not have recess 150.Signal wire 130 is arranged or is arranged along second direction, first along a first direction
Direction is perpendicular to second direction.The quantity for the pixel 140 that a signal line 130 connects in first display area 111 is less than second
The quantity for the pixel 140 that a signal line 130 connects in display area 112.A signal line 130 in first display area 111
Pixel load less than in the second display area 112 signal line 130 pixel load.Signal in first display area 111
The conductivity of line 130 is substantially equal to the conductivity of signal wire 130 in the second display area 112.One in first display area 111
The conducting wire that the conductor loading of signal line 130 is substantially equal or less tnan a signal line 130 in the second display area 112 is negative
It carries.The sum of the pixel load of a signal line 130 and conductor loading are less than the second display area 112 in first display area 111
In a signal line 130 pixel load the sum of with conductor loading.A signal line 130 is total negative in first display area 111
Carry less than a signal line 130 in the second display area 112 total load so that the display performance of the first display area 111 with
The display performance of second display area 112 difference.This results in display panel 100 and shows unevenly.
In a kind of display panel 200 provided in an embodiment of the present invention, the first sub first signal wire 231 is located at the first display
Region 211, the second sub first signal wire 232 are located at the second display area 212.What one first sub first signal wire 231 connected
Quantity b of the quantity a of pixel 240 less than the pixel 240 of one second sub first signal wire 232 connection.One the first son first
Pixel load of the pixel load of signal wire 231 less than one second sub first signal wire 232.First sub first signal wire 231
The first conductivity less than the second sub first signal wire 232 the second conductivity.For example, the line of the first sub first signal wire 231
The wide line width less than the second sub first signal wire 232, so that the first conductivity of the first sub first signal wire 231 is less than the second son
Second conductivity of the first signal wire 232；Alternatively, the thickness of the first sub first signal wire 231 is less than the second sub first signal wire
232 thickness, so that second electricity of the first conductivity of the first sub first signal wire 231 less than the second sub first signal wire 232
Conductance.The conductor loading of one first sub first signal wire 231 is greater than the conductor loading of one second sub first signal wire 232.
When the first conductivity of the first sub first signal wire 231 and the second conductivity of the second sub first signal wire 232 are arranged appropriately, then
The conductor loading of one first sub first signal wire 231 and the difference of the conductor loading of one second the first signal wire 232 of son are basic
The pixel of the upper pixel load for being equal to one first sub first signal wire 231 and one second sub first signal wire 232 loads it
Difference.The difference benefit of the conductor loading of one first sub first signal wire 231 and the conductor loading of one second sub first signal wire 232
Repay the difference of the pixel load of one first sub first signal wire 231 and the pixel load of one second sub first signal wire 232.One
The sum of the conductor loading of sub first signal wire 231 of item first and pixel load are substantially equal to or close to second sons first
The sum of conductor loading and pixel load of signal wire 232.The total load of one first sub first signal wire 231 and one second son
The total load of first signal wire 232 is substantially the same.When same drive module be respectively adopted the first sub first signal wire 231,
When the second sub first signal wire 232 transmission driving signal, the driving signal of the first sub first signal wire 231 is believed with the second son first
The driving signal of number line 232 is substantially the same, so that the strong light of each pixel 240 of the first sub first signal wire 231 connection
It spends substantially the same with the luminous intensity of each pixel 240 of the second sub first signal wire 232 connection.Therefore, the first son first
The second viewing area where the display performance of the first display area 211 where signal wire 231 and the second sub first signal wire 232
The display performance in domain 212 is substantially the same, and the display of display panel 200 is substantially uniform.
As shown in Figure 3 and Figure 4, the first display area 211 has recess 250, and the second display area 212 does not have recess 250.
X is arranged or sets along second direction Y along a first direction for first the first signal wire of son 231 and the second sub first signal wire 232
It sets, first direction X is perpendicular to second direction Y.First sub first signal wire 231 is shorter than the second sub first signal wire 232.This just makes
The quantity a for obtaining the pixel 240 connecting with one first sub first signal wire 231 is less than to be connect with one second sub first signal wire
The quantity b of 232 pixel 240.
Fig. 5 is the driving circuit figure of pixel in a kind of display panel provided in an embodiment of the present invention.
As shown in figure 5, the driving circuit of pixel 240 includes first switch transistor M1, second switch transistor M2, the 4th
Switching transistor M4, the 5th switching transistor M5, the 6th switching transistor M6, the 7th switching transistor M7, driving transistor M3,
Storage C, Organic Light Emitting Diode D, the first scan signal line SCAN1, the second scan signal line SCAN2, transmitting signal
Line EMIT, data signal line DATA, reference signal line VREF, the first power signal line PVDD, second source signal wire PVEE.
The coordination electrode of 5th switching transistor M5 is electrically connected the first scan signal line SCAN1, the 5th switching transistor M5
First electrode be electrically connected reference signal line VREF, the second electrode electrical connection driving transistor M3 of the 5th switching transistor M5
Coordination electrode.When the first scan signal line SCAN1 controls the 5th switching transistor M5 conducting, reference signal line VREF transmission ginseng
Signal is examined to the coordination electrode for driving transistor M3, so that the coordination electrode initialization of driving transistor M3.
The coordination electrode of 7th switching transistor M7 is electrically connected the first scan signal line SCAN1, the 7th switching transistor M7
First electrode be electrically connected reference signal line VREF, the second electrode of the 7th switching transistor M7 is electrically connected Organic Light Emitting Diode
The anode of D.When the first scan signal line SCAN1 controls the 7th switching transistor M7 conducting, reference signal line VREF transmission ginseng
The anode of signal to Organic Light Emitting Diode D is examined, so that the anode of Organic Light Emitting Diode D initializes.
The coordination electrode of second switch transistor M2 is electrically connected the second scan signal line SCAN2, second switch transistor M2
First electrode be electrically connected data signal line DATA, the second electrode electrical connection driving transistor M3 of second switch transistor M2
First electrode.When the second scan signal line SCAN2 control second switch transistor M2 conducting, data signal line DATA transmits number
It is believed that number to drive transistor M3 first electrode so that driving transistor M3 conducting.
The coordination electrode of 4th switching transistor M4 is electrically connected the second scan signal line SCAN2, the 4th switching transistor M4
First electrode electrical connection driving transistor M3 coordination electrode, the second electrode electrical connection driving of the 4th switching transistor M4 is brilliant
The second electrode of body pipe M3.When the second scan signal line SCAN2 controls the 4th switching transistor M4 conducting, data signal line
DATA fills the coordination electrode of driving transistor M3 by the 4th switching transistor M4 of the driving transistor M3, conducting that are connected
Electricity, so that the gate source voltage of driving transistor M3 becomes equal to the threshold voltage of driving transistor M3.
The coordination electrode of first switch transistor M1, which is electrically connected, emits signal wire EMIT, and the first of first switch transistor M1
Electrode is electrically connected the first power signal line PVDD, and the of the second electrode electrical connection driving transistor M3 of first switch transistor M1
One electrode.When emitting signal wire EMIT control first switch transistor M1 conducting, the first power signal line PVDD transmission first
Power supply signal is to the first electrode for driving transistor M3, so that driving transistor M3 conducting.
The coordination electrode of 6th switching transistor M6, which is electrically connected, emits signal wire EMIT, and the first of the 6th switching transistor M6
The second electrode of electrode electrical connection driving transistor M3, the second electrode of the 6th switching transistor M6 are electrically connected organic light-emitting diodes
The anode of pipe D.When emitting signal wire EMIT control the 6th switching transistor M6 conducting, the driving current of driving transistor M3 is passed
The anode of Organic Light Emitting Diode D is transported to, so that driving transistor M3 driving Organic Light Emitting Diode D shines.
The cathode of Organic Light Emitting Diode D is electrically connected second source signal wire PVEE, drives the driving current of transistor M3
It shines by Organic Light Emitting Diode D, Organic Light Emitting Diode D.
Driving transistor M3 driving Organic Light Emitting Diode D luminous driving current is expressed as ID, the first power signal line
PVDD is expressed as V by the first power supply signal that first switch transistor M1 is inputtedPVDD, data signal line DATA opens by second
The data-signal for closing transistor M2 input is expressed as VDATA, the structural parameters of transistor M3 is driven to be expressed as K, ID、VPVDD、VDATA、
The relationship of K is expressed as: ID=K* (VPVDD-VDATA)2.When the first power signal line PVDD is inputted by first switch transistor M1
The first power supply signal be VPVDD1, then data signal line DATA be by the data-signal that second switch transistor M2 is inputted
VDATA1, the structural parameters of driving transistor M3 are K1, then the driving electricity that drives transistor M3 driving Organic Light Emitting Diode D luminous
Stream is ID1.When the first power signal line PVDD is V by the first power supply signal of first switch transistor M1 inputPVDD2, then count
It is V according to the data-signal that signal wire DATA passes through second switch transistor M2 inputDATA2, driving transistor M3 structural parameters be
K2, then the driving current for driving transistor M3 driving Organic Light Emitting Diode D luminous is ID2.Work as VPVDD1With VPVDD2Difference, or
Person, VDATA1With VDATA2Difference, alternatively, K1With K2Difference, then ID1With ID2It is different.Work as VPVDD1With VPVDD2It is identical, also, VDATA1With
VDATA2It is identical, also, K1With K2It is identical, then ID1With ID2It is identical.
In addition, transmitting signal wire EMIT is expressed as V to the first switch transistor M1 transmitting signal inputtedEMIT, second sweeps
It retouches signal wire SCAN2 and V is expressed as to the second switch transistor M2 scanning signal inputtedSCAN。VEMITInfluence VPVDD, to influence
ID；VSCANInfluence VDATA, to influence ID.When transmitting signal wire EMIT is to the first switch transistor M1 transmitting signal inputted
VEMIT1, then the first power signal line PVDD is V by the first power supply signal of first switch transistor M1 inputPVDD1, driving crystalline substance
The driving current that body pipe M3 drives Organic Light Emitting Diode D luminous is ID1.When transmitting signal wire EMIT is to first switch transistor
The transmitting signal of M1 input is VEMIT2, then the first power signal line PVDD passes through the first power supply of first switch transistor M1 input
Signal is VPVDD2, driving transistor M3 driving Organic Light Emitting Diode D luminous driving current is ID2.Work as VEMIT1With VEMIT2No
Together, V is inputtedEMIT1When first switch transistor M1 gate source voltage and input VEMIT2When first switch transistor M1 grid source electricity
Pressure is different, inputs VEMIT1When first switch transistor M1 source and drain conducting resistance and input VEMIT2When first switch transistor M1
Source and drain conducting resistance it is different, then VPVDD1With VPVDD2Difference, so that ID1With ID2It is different.When the second scan signal line SCAN2 is to
The scanning signal of two switching transistor M2 input is expressed as VSCAN1, then data signal line DATA is defeated by second switch transistor M2
The data-signal entered is VDATA1, driving transistor M3 driving Organic Light Emitting Diode D luminous driving current is ID1.When second
Scan signal line SCAN2 is expressed as V to the second switch transistor M2 scanning signal inputtedSCAN2, then data signal line DATA is logical
The data-signal for crossing second switch transistor M2 input is VDATA2, transistor M3 driving Organic Light Emitting Diode D is driven to shine
Driving current is ID2.Work as VSCAN1With VSCAN2Difference inputs VSCAN1When second switch transistor M2 gate source voltage and input
VSCAN2When second switch transistor M2 gate source voltage it is different, input VSCAN1When second switch transistor M2 source and drain electric conduction
Resistance and input VSCAN2When second switch transistor M2 source and drain conducting resistance it is different, then VDATA1With VDATA2Difference, so that ID1With
ID2It is different.Therefore, VEMIT1With VEMIT2Difference, alternatively, VSCAN1With VSCAN2Difference, so that ID1With ID2It is different；VEMIT1With VEMIT2Phase
Together, also, VSCAN1With VSCAN2It is identical, I can be madeD1With ID2It is identical.
Fig. 6 is a kind of floor map of the first display area in a kind of display panel provided in an embodiment of the present invention.Fig. 7
It is a kind of floor map of the second display area in a kind of display panel provided in an embodiment of the present invention.
Optionally, as shown in Fig. 3, Fig. 6, Fig. 7, a kind of first signal of display panel 200 provided in an embodiment of the present invention
Line 230 includes one or more of scan signal line and transmitting signal wire.
Optionally, in a kind of display panel 200 provided in an embodiment of the present invention, the first signal wire 230, that is, the first son
First the 231, second sub first signal wire 232 of signal wire, is scan signal line.First signal wire 230 is used as scan signal line, uses
In the pixel 240 that transmission scanning signal is connected to the first signal wire 230.When same scanning signal drive module is respectively adopted
First the 231, second sub first signal wire 232 of the first signal wire of son transmits scanning signal, and one first sub first signal wire
231 total load is substantially the same with the one second sub total load of first signal wire 232, then the first sub first signal wire 231
The scanning signal of transmission is substantially the same with the scanning signal of the second sub first signal wire 232 transmission.First sub first signal wire
Each pixel 240 that each pixel 240 of 231 connections is connect with the second sub first signal wire 232, which has basically the same, sweeps
Retouch signal.As described above, second scan signal line SCAN2 is to second switch in the driving circuit of pixel 240 shown in Fig. 5
Transistor M2 inputs identical scanning signal VSCAN, the second scan signal line SCAN2 is avoided to input second switch transistor M2
Different scanning signal VSCANData signal line DATA is caused to pass through the data-signal V of second switch transistor M2 inputDATANo
Together, so that driving transistor M3 driving Organic Light Emitting Diode D luminous driving current IDIdentical, pixel 240 luminous intensity
It is identical.Therefore, each pixel 240 of the first sub first signal wire 231 connection each of is connect with second the first signal wire 232 of son
Pixel 240 can have substantially the same luminous intensity.
Optionally, in a kind of display panel 200 provided in an embodiment of the present invention, the first signal wire 230, that is, the first son
First the 231, second sub first signal wire 232 of signal wire, is transmitting signal wire.First signal wire 230 is used as transmitting signal wire
In the pixel 240 that transmitting signal is connected to the first signal wire 230.When similarly transmitting signal driver module is respectively adopted
First the first signal wire of son 232 transmitting signal of the 231, second sub first signal wire, and one first sub first signal wire
231 total load is substantially the same with the one second sub total load of first signal wire 232, then the first sub first signal wire 231
The transmitting signal of transmission is substantially the same with the transmitting signal of the second sub first signal wire 232 transmission.First sub first signal wire
Each pixel 240 that each pixel 240 of 231 connections is connect with the second sub first signal wire 232 has basically the same hair
Penetrate signal.As described above, emitting signal wire EMIT to first switch transistor in the driving circuit of pixel 240 shown in Fig. 5
M1 inputs identical transmitting signal VEMIT, avoid transmitting signal wire EMIT from inputting different transmittings to first switch transistor M1 and believe
Number VEMITThe first power signal line PVDD is caused to pass through the first power supply signal V of first switch transistor M1 inputPVDDDifference, with
Make the driving current I for driving transistor M3 driving Organic Light Emitting Diode D luminousDIdentical, pixel 240 luminous intensity is identical.
Therefore, each pixel that each pixel 240 of the first sub first signal wire 231 connection is connect with the second sub first signal wire 232
240 can have substantially the same luminous intensity.
Optionally, in a kind of display panel 200 provided in an embodiment of the present invention, some first sub first signal wires 231,
Some second sub first signal wires 232 are used as scan signal line, also, other first sub first signal wires 231, other the
Two sub first signal wires 232 are used as transmitting signal wire.As described above, being used as the first sub first signal wire 231 of scan signal line
Substantially the same scanning signal can be transmitted with the second sub first signal wire 232 for being used as scan signal line, also, is used as hair
First the first signal wire of son 231 for penetrating signal wire can transmit base with the second sub first signal wire 232 for being used as transmitting signal wire
Identical transmitting signal in sheet.The each pixel 240 and the second sub first signal wire 232 of first sub first signal wire 231 connection
Each pixel 240 of connection has basically the same scanning signal, and has basically the same transmitting signal, avoids it
In scanning signal and/or transmitting signal difference lead to that data-signal therein and/or the first power supply signal be different, driving current
Difference, so that each pixel 240 of the first sub first signal wire 231 connection each of is connect with second the first signal wire 232 of son
Pixel 240 has basically the same luminous intensity.
Optionally, as shown in Figure 6 and Figure 7, display panel 200 further include: active layer 260；In the first sub first signal wire
231 the first overlapping regions overlapped with active layer 260, the first sub first signal wire 231 have the first line width and first thickness；?
The second overlapping region that second the first signal wire of son 232 is overlapped with active layer 260, the second sub first signal wire 232 have second
Line width and second thickness；The ratio of first line width and the second line width is 0.98 to 1.02, the ratio of first thickness and second thickness
It is 0.98 to 1.02.
As shown in fig. 6, the first overlapping region includes overlapping region A1, A2, A4, A5, A6, A7, overlapping region A1, A2, A4,
A5, A6, A7 respectively constitute first switch transistor M1 shown in fig. 5, second switch transistor M2, the 4th switching transistor M4,
5th switching transistor M5, the 6th switching transistor M6, the 7th switching transistor M7.
As shown in fig. 7, the second overlapping region includes overlapping region B1, B2, B4, B5, B6, B7, overlapping region B1, B2, B4,
B5, B6, B7 respectively constitute first switch transistor M1 shown in fig. 5, second switch transistor M2, the 4th switching transistor M4,
5th switching transistor M5, the 6th switching transistor M6, the 7th switching transistor M7.
In a kind of display panel 200 provided in an embodiment of the present invention, sub first signal wire of the first of the first overlapping region
231 and active layer 260 respectively constitute the grid and active area of switching transistor in the first display area 211, the second overlapping region
The second sub first signal wire 232 and active layer 260 respectively constitute the grid of switching transistor in the second display area 212 and have
Source region.The first line width of the first sub first signal wire 231 is substantially equal to second in the second overlapping region in first overlapping region
Second line width of sub first signal wire 232.The grid width of switching transistor is substantially equal to second in first display area 211
The grid width of switching transistor in display area 212.The first thickness of first sub first signal wire 231 in first overlapping region
It is substantially equal to the second thickness of the second sub first signal wire 232 in the second overlapping region.Switch is brilliant in first display area 211
The gate of body pipe is substantially equal to the gate of switching transistor in the second display area 212.First display area 211
The grid size of interior switching transistor is substantially the same with the grid size of switching transistor in the second display area 212.First
The switch performance of switching transistor and the switch performance of switching transistor in the second display area 212 are basic in display area 211
It is upper identical, so that the display performance of the first display area 211 is substantially the same with the display performance of the second display area 212.
Optionally, as shown in Figure 6 and Figure 7, it is overlapped in first the first signal wire of son 231 with active layer 260 overlaps first
Outside region, the first sub first signal wire 231 has third line width and third thickness；The second sub first signal wire 232 with it is active
Outside the second overlapping overlapping region of layer 260, the second sub first signal wire 232 has the 4th line width and the 4th thickness；Third line width
Less than the 4th line width, and/or, third thickness is less than the 4th thickness.
Optionally, in a kind of display panel 200 provided in an embodiment of the present invention, the first son except the first overlapping region
Fourth line width of the third line width of one signal wire 231 less than the except the second overlapping region second sub first signal wire 232.First hands over
There are linewidth differences for second the first signal wire 232 of son except the first sub first signal wire 231 and the second overlapping region except folded region
It is different, so that there are conductivity differences for first the first signal wire of son 231 and the second sub first signal wire 232.First overlapping region it
Conductivity of the conductivity of outer first sub first signal wire 231 less than the except the second overlapping region second sub first signal wire 232.
Conductivity of the conductivity of first sub first signal wire 231 less than the second sub first signal wire 232.
Optionally, in a kind of display panel 200 provided in an embodiment of the present invention, the first son except the first overlapping region
Fourth thickness of the third thickness of one signal wire 231 less than the except the second overlapping region second sub first signal wire 232.First hands over
There are thickness differences for second the first signal wire 232 of son except the first sub first signal wire 231 and the second overlapping region except folded region
It is different, so that there are conductivity differences for first the first signal wire of son 231 and the second sub first signal wire 232.First overlapping region it
Conductivity of the conductivity of outer first sub first signal wire 231 less than the except the second overlapping region second sub first signal wire 232.
Conductivity of the conductivity of first sub first signal wire 231 less than the second sub first signal wire 232.
Optionally, in a kind of display panel 200 provided in an embodiment of the present invention, the first son except the first overlapping region
The third line width of one signal wire 231 less than the except the second overlapping region second sub first signal wire 232 the 4th line width, also,
The third thickness of the first sub first signal wire 231 is believed less than the second son first except the second overlapping region except first overlapping region
4th thickness of number line 232.It is second sub except the first sub first signal wire 231 and the second overlapping region except first overlapping region
First signal wire 232 is there are line width difference and there are difference in thickness, so that the first sub first signal wire 231 and the second son first
There are conductivity differences for signal wire 232.The conductivity of the first sub first signal wire 231 is handed over less than second except first overlapping region
The conductivity of second sub first signal wire 232 except folded region.The conductivity of first sub first signal wire 231 is less than the second son the
The conductivity of one signal wire 232.
Fig. 8 is a kind of another floor map of display panel provided in an embodiment of the present invention.
As shown in figure 8, in a kind of display panel 200 provided in an embodiment of the present invention, the recess of the first display area 211
250 include the first notched region 250A with evagination fillet, not the second notched region 250B of fillet, have Inside concave fillet
Third notched region 250C.First display area 211 include the first sub-viewing areas 211A, the second sub-viewing areas 211B,
Third sub-viewing areas 211C.First notched region 250A is in the first sub-viewing areas 211A.Second notched region 250B exists
In second sub-viewing areas 211B.Third notched region 250C is in third sub-viewing areas 211C.Second notched region 250B
The length of X is identical along a first direction.The length of first notched region 250A X along a first direction is slightly larger than the second recessed area
The length of domain 250B X along a first direction.The length of third notched region 250C X along a first direction is slightly smaller than the second recess
The length of region 250B X along a first direction.X crosses over 50 column pixels 240 to 500 to second notched region 250B along a first direction
Column pixel 240.First notched region 250A can cross over the pixels 240 for being slightly larger than 500 column with X along a first direction.Third is recessed
Mouth region domain 250C can cross over the pixel 240 for being slightly smaller than 50 column with X along a first direction.
Optionally, in a kind of display panel 200 provided in an embodiment of the present invention, third line width less than the 4th line width, and
Ratio between third line width and the 4th line width is more than or equal to 3%, is less than or equal to 60%.
In a kind of display panel 200 provided in an embodiment of the present invention, the second notched region 250B along a first direction X across
240 to 500 column pixel 240 of more 50 column pixel, in the second sub-viewing areas 211B the in third line width and the second display area 212
Ratio between four line widths is more than or equal to 5% and is less than or equal to 50%.First notched region 250A can be with X along a first direction
Across the pixel 240 of slightly larger than 500 column, in the first sub-viewing areas 211A the in third line width and the second display area 212
Ratio between four line widths can be more than or equal to 3% and be less than or equal to 5%.Third notched region 250C can be along first party
The pixel 240 for being slightly smaller than 50 column is crossed over to X, in third sub-viewing areas 211C in third line width and the second display area 212
Ratio between 4th line width can be more than or equal to 50% and be less than or equal to 60%.
When X crosses over 50 column pixel, 240 to 500 column pixel 240 to the second notched region 250B along a first direction, the second son
The pixel of one first sub first signal wire 231 loads the picture with one second sub first signal wire 232 in the 211B of display area
The difference of element load is substantially equal to the load of 50 pixels, 240 to 500 pixels 240.When in the second sub-viewing areas 211B
When ratio in three line widths and the second display area 212 between the 4th line width is more than or equal to 5% and is less than or equal to 50%, second
The total conductor loading and one second sub first signal wire 232 of one first sub first signal wire 231 in sub-viewing areas 211B
The difference of total conductor loading be substantially equal to the load of 50 pixels, 240 to 500 pixels 240.Then, the second sub-viewing areas
Total conductor loading of one first sub first signal wire 231 and total conducting wire of one second sub first signal wire 232 are born in 211B
The difference carried is substantially equal in the second sub-viewing areas 211B the pixel load of one article of first sub first signal wire 231 and one article the
The difference of the pixel load of two sub first signal wires 232.One first sub first signal wire 231 in second sub-viewing areas 211B
The difference of total conductor loading of total conductor loading and one second sub first signal wire 232 compensates one in the second sub-viewing areas 211B
The difference of the pixel load of sub first signal wire 231 of item first and the pixel load of one second sub first signal wire 232.Similarly,
X is across the pixels 240 for being slightly larger than 500 column along a first direction by first notched region 250A, in the first sub-viewing areas 211A
Ratio in third line width and the second display area 212 between the 4th line width is more than or equal to 3% and is less than or equal to 5%, first
The total conductor loading and one second sub first signal wire 232 of one first sub first signal wire 231 in sub-viewing areas 211A
The difference of total conductor loading compensate the pixel load and one of one first sub first signal wire 231 in the first sub-viewing areas 211A
The difference of the pixel load of sub first signal wire 232 of item second；X leap is slightly smaller than third notched region 250C along a first direction
The pixels 240 of 50 column, the ratio in third sub-viewing areas 211C in third line width and the second display area 212 between the 4th line width
Value is more than or equal to 50% and is less than or equal to 60%, one first sub first signal wire 231 in third sub-viewing areas 211C
One in the difference compensation third sub-viewing areas 211C of total conductor loading of total conductor loading and one second sub first signal wire 232
The difference of the pixel load of sub first signal wire 231 of item first and the pixel load of one second sub first signal wire 232.To sum up institute
It states, the total conductor loading and one second the first letter of son of any one first sub first signal wire 231 in the first display area 211
The difference of total conductor loading of number line 232 compensate sub first signal wire 231 of this first pixel load and second son first
The difference of the pixel load of signal wire 232.
Optionally, in a kind of display panel 200 provided in an embodiment of the present invention, third thickness less than the 4th thickness, and
Ratio between third thickness and the 4th thickness is more than or equal to 10%, is less than or equal to 96%.
In a kind of display panel 200 provided in an embodiment of the present invention, the second notched region 250B along a first direction X across
240 to 500 column pixel 240 of more 50 column pixel, in the second sub-viewing areas 211B in third thickness and the second display area 212
Ratio between four thickness is more than or equal to 18.5% and is less than or equal to 94.5%.First notched region 250A can be along first
Direction X crosses over the pixels 240 for being slightly larger than 500 column, third thickness and the second display area 212 in the first sub-viewing areas 211A
Ratio between interior 4th thickness can be more than or equal to 10% and be less than or equal to 18.5%.Third notched region 250C can edge
First direction X across being slightly smaller than the pixels 240 of 50 column, third thickness and the second viewing area in third sub-viewing areas 211C
Ratio in domain 212 between the 4th thickness can be more than or equal to 94.5% and be less than or equal to 96%.
When X crosses over 50 column pixel, 240 to 500 column pixel 240 to the second notched region 250B along a first direction, the second son
The pixel of one first sub first signal wire 231 loads the picture with one second sub first signal wire 232 in the 211B of display area
The difference of element load is substantially equal to the load of 50 pixels, 240 to 500 pixels 240.When in the second sub-viewing areas 211B
Ratio in three thickness and the second display area 212 between the 4th thickness is more than or equal to 18.5% and is less than or equal to 94.5%
When, total conductor loading of one first sub first signal wire 231 and one second the first letter of son in the second sub-viewing areas 211B
The difference of total conductor loading of number line 232 is substantially equal to the load of 50 pixels, 240 to 500 pixels 240.Then, the second son
Total conductor loading of one first sub first signal wire 231 and one second the first signal wire 232 of son in the 211B of display area
The difference of total conductor loading is substantially equal to the pixel load of one first sub first signal wire 231 in the second sub-viewing areas 211B
And the difference of the pixel load of one second sub first signal wire 232.One first son first is believed in second sub-viewing areas 211B
The difference of total conductor loading of total conductor loading of number line 231 and one second sub first signal wire 232 compensates the second sub- viewing area
The pixel load of the pixel load of one first sub first signal wire 231 and one second sub first signal wire 232 in the 211B of domain
Difference.Similarly, X is shown the first notched region 250A across the pixel 240 for being slightly larger than 500 column, the first son along a first direction
Ratio in the 211A of region in third thickness and the second display area 212 between the 4th thickness is more than or equal to 10% and is less than etc.
In the total conductor loading and one second son of one first in 18.5%, first sub-viewing areas 211A first signal wire 231
The difference of total conductor loading of first signal wire 232 compensates one first sub first signal wire 231 in the first sub-viewing areas 211A
Pixel load and one second sub first signal wire 232 the difference that loads of pixel；250C is along first party for third notched region
The pixel 240 for being slightly smaller than 50 column is crossed over to X, in third sub-viewing areas 211C in third thickness and the second display area 212
Ratio between 4th thickness is more than or equal to 94.5% and less than or equal to 96%, one first in third sub-viewing areas 211C
The difference of total conductor loading of total conductor loading of sub first signal wire 231 and one second sub first signal wire 232 compensates third
The pixel load of one first sub first signal wire 231 and one second sub first signal wire 232 in sub-viewing areas 211C
The difference of pixel load.In conclusion total conducting wire of any one first sub first signal wire 231 is negative in the first display area 211
The difference of total conductor loading of load and one second sub first signal wire 232 compensates the pixel of sub first signal wire 231 of this first
The difference of load and the pixel load of one second sub first signal wire 232.Optionally, as shown in figure 4, the first signal wire 230 wraps
Include data signal line.
In a kind of display panel 200 provided in an embodiment of the present invention, the first signal wire 230, that is, the first son first is believed
Sub first signal wire 232 of number line 231, second, is data signal line.First signal wire 230 is used as data signal line, is used for transmission
In the pixel 240 that data-signal is connected to the first signal wire 230.When the first son is respectively adopted in same data-signal drive module
Sub first signal wire 232 of first signal wire 231, second transmits data-signal, and one first sub first signal wire 231 is total
Load is substantially the same with the one second sub total load of first signal wire 232, then the number of the first sub first signal wire 231 transmission
It is believed that number substantially the same with the data-signal of the second sub first signal wire 232 transmission.First sub first signal wire 231 connection
Each pixel 240 that each pixel 240 is connect with the second sub first signal wire 232 has basically the same data-signal.Such as
Upper described, in the driving circuit of pixel 240, data signal line DATA inputs identical data by second switch transistor M2
Signal VDATA, data signal line DATA is avoided to input different data-signal V by second switch transistor M2DATACause to drive
The driving current I that transistor M3 drives Organic Light Emitting Diode D luminousDDifference, so that the luminous intensity of pixel 240 is identical.Cause
This, each pixel 240 that each pixel 240 of the first sub first signal wire 231 connection is connect with the second sub first signal wire 232
It can have substantially the same luminous intensity.
Fig. 9 is that another plane of the first display area 211 in a kind of display panel 200 provided in an embodiment of the present invention is shown
It is intended to.Figure 10 is another plane signal of the second display area 212 in a kind of display panel 200 provided in an embodiment of the present invention
Figure.
Optionally, as shown in figure 9, a kind of display panel 200 provided in an embodiment of the present invention further include: the first metal layer
MC；The overlapping area of sub first signal wire 231 of the first metal layer MC and first is S1；Of the first metal layer MC and second first is believed
The overlapping area of number line 232 is S2, wherein 0≤S2 < S1.
Wherein, the first metal layer MC is used as the electrode plate of capacitor C shown in fig. 5.
In a kind of display panel 200 provided in an embodiment of the present invention, sub first signal wire of the first metal layer MC and first
231 overlapping region constitutes first capacitor load, and the overlapping region of sub first signal wire 232 of the first metal layer MC and second is constituted
Second capacitive load.The overlapping area S1 of sub first signal wire 231 of the first metal layer MC and first be greater than the first metal layer MC with
The overlapping area S2 of second sub first signal wire 232.The first capacitor of sub first signal wire 231 of the first metal layer MC and first is negative
Carry the second capacitive load for being greater than sub first signal wire 232 of the first metal layer MC and second.The electricity of first sub first signal wire 231
Hold the capacitive load that load is greater than the second sub first signal wire 232.The capacitive load and the second son of first sub first signal wire 231
The pixel load of sub first signal wire 231 of difference compensation first of the capacitive load of first signal wire 232 and the second sub first signal
The difference of the pixel load of line 232.
As shown in Figure 9 and Figure 10, in a kind of display panel 200 provided in an embodiment of the present invention, it is used as data signal line
The first sub first signal wire 231 there is the 5th line width and the 5th thickness, sub first signal wire of second as data signal line
232 have the 6th line width and the 6th thickness；5th line width less than the 6th line width, and/or, the 5th thickness is less than the 6th thickness.
In a kind of display panel 200 provided in an embodiment of the present invention, the 5th line width of the first sub first signal wire 231 is small
In the 6th line width of the second sub first signal wire 232.First the first signal wire of son 231 and the second sub first signal wire 232 exist
Line width difference, so that there are conductivity differences for first the first signal wire of son 231 and the second sub first signal wire 232.First son
Conductivity of the conductivity of one signal wire 231 less than the second sub first signal wire 232.
In a kind of display panel 200 provided in an embodiment of the present invention, the 5th thickness of the first sub first signal wire 231 is small
In the 6th thickness of the second sub first signal wire 232.First the first signal wire of son 231 and the second sub first signal wire 232 exist
Difference in thickness, so that there are conductivity differences for first the first signal wire of son 231 and the second sub first signal wire 232.First son
Conductivity of the conductivity of one signal wire 231 less than the second sub first signal wire 232.
In a kind of display panel 200 provided in an embodiment of the present invention, the 5th line width of the first sub first signal wire 231 is small
In the 6th line width of the second sub first signal wire 232, also, the 5th thickness of the first sub first signal wire 231 is less than the second son
6th thickness of the first signal wire 232.There are line width differences for first the first signal wire of son 231 and the second sub first signal wire 232
And there are difference in thickness, so that there are conductivity differences for first the first signal wire of son 231 and the second sub first signal wire 232.
Conductivity of the conductivity of first sub first signal wire 231 less than the second sub first signal wire 232.
Figure 11 is a kind of another floor map of display panel provided in an embodiment of the present invention.
As shown in figure 11, in a kind of display panel 200 provided in an embodiment of the present invention, the first display area 211 it is recessed
Mouthfuls 250 include the 4th notched region 250D with Inside concave fillet, the 5th notched region 250E of not no fillet.First viewing area
Domain 211 includes the 4th sub-viewing areas 211D, the 5th sub-viewing areas 211E.4th notched region 250D is in the 4th sub- viewing area
In the 211D of domain.5th notched region 250E is in the 5th sub-viewing areas 211E.5th notched region 250E is along second direction Y
Length it is identical.4th notched region 250D is slightly smaller than the 5th notched region 250E along the length of second direction Y
The length of two direction Y.5th notched region 250E crosses over 80 row pixel, 240 to 100 row pixel 240 along second direction Y.4th
Notched region 250D can cross over the pixel 240 for being slightly smaller than 80 rows along second direction Y.
Optionally, in a kind of display panel 200 provided in an embodiment of the present invention, the 5th line width less than the 6th line width, and
Ratio between 5th line width and the 6th line width is more than or equal to 3%, is less than or equal to 7%.
In a kind of display panel 200 provided in an embodiment of the present invention, the 5th notched region 250E along second direction Y across
240 to 100 row pixel 240 of more 80 row pixel, in the 5th sub-viewing areas 211E the in the 5th line width and the second display area 212
Ratio between six line widths is more than or equal to 3% and is less than or equal to 5%.4th notched region 250D can be along second direction Y
Across the pixel 240 for being slightly smaller than 80 rows, in the 4th sub-viewing areas 211D the 6th in the 5th line width and the second display area 212
Ratio between line width can be more than or equal to 5% and be less than or equal to 7%.
When the 5th notched region 250E crosses over 80 row pixel, 240 to 100 row pixel 240 along second direction Y, the 5th son
The pixel of one first sub first signal wire 231 loads the picture with one second sub first signal wire 232 in the 211E of display area
The difference of element load is substantially equal to the load of 80 pixels, 240 to 100 pixels 240.When in the 5th sub-viewing areas 211E
When ratio in five line widths and the second display area 212 between the 6th line width is more than or equal to 3% and is less than or equal to 5%, the 5th
The total conductor loading and one second sub first signal wire 232 of one first sub first signal wire 231 in sub-viewing areas 211E
The difference of total conductor loading be substantially equal to the load of 80 pixels, 240 to 100 pixels 240.Then, the 5th sub-viewing areas
Total conductor loading of one first sub first signal wire 231 and total conducting wire of one second sub first signal wire 232 are born in 211E
The difference carried is substantially equal in the 5th sub-viewing areas 211E the pixel load of one article of first sub first signal wire 231 and one article the
The difference of the pixel load of two sub first signal wires 232.One article of first sub first signal wire 231 in 5th sub-viewing areas 211E
The difference of total conductor loading of total conductor loading and one article of second sub first signal wire 232 compensates one in the 5th sub-viewing areas 211E
The difference of the pixel load of sub first signal wire 231 of item first and the pixel load of one second sub first signal wire 232.Similarly,
4th notched region 250D along second direction Y across being slightly smaller than the pixels 240 of 80 rows, the in the 4th sub-viewing areas 211D
Ratio in five line widths and the second display area 212 between the 6th line width is more than or equal to 5% and is less than or equal to 7%, the 4th son
Total conductor loading of one first sub first signal wire 231 and one second the first signal wire 232 of son in the 211D of display area
The pixel that the difference of total conductor loading compensates one article of first sub first signal wire 231 in the 4th sub-viewing areas 211D loads and one article
The difference of the pixel load of second sub first signal wire 232.In conclusion any one article of first son in the first display area 211
The difference of total conductor loading of total conductor loading of one signal wire 231 and one second sub first signal wire 232 compensates this first
The difference of the pixel load of sub first signal wire 231 and the pixel load of one second sub first signal wire 232.Optionally, at this
In a kind of display panel 200 that inventive embodiments provide, the 5th thickness less than the 6th thickness, and the 5th thickness and the 6th thickness it
Between ratio be more than or equal to 94%, be less than or equal to 98%.
In a kind of display panel 200 provided in an embodiment of the present invention, the 5th notched region 250E along second direction Y across
240 to 100 row pixel 240 of more 80 row pixel, in the 5th sub-viewing areas 211E in the 5th thickness and the second display area 212
Ratio between six thickness is more than or equal to 94% and is less than or equal to 96%.4th notched region 250D can be along second direction
Y is across being slightly smaller than the pixels 240 of 80 rows, in the 4th sub-viewing areas 211D the in the 5th thickness and the second display area 212
Ratio between six thickness can be more than or equal to 96% and be less than or equal to 98%.
When the 5th notched region 250E crosses over 80 row pixel, 240 to 100 row pixel 240 along second direction Y, the 5th son
The pixel of one first sub first signal wire 231 loads the picture with one second sub first signal wire 232 in the 211E of display area
The difference of element load is substantially equal to the load of 80 pixels, 240 to 100 pixels 240.When in the 5th sub-viewing areas 211E
When ratio in five thickness and the second display area 212 between the 6th thickness is more than or equal to 94% and is less than or equal to 96%, the
The total conductor loading and one second sub first signal wire of one first sub first signal wire 231 in five sub-viewing areas 211E
The difference of 232 total conductor loading is substantially equal to the load of 80 pixels, 240 to 100 pixels 240.Then, the 5th son display
Total conductor loading of one first sub first signal wire 231 and one second the first signal wire 232 of son always leads in the 211E of region
The difference of linear load is substantially equal to the pixel load and one of one article of first sub first signal wire 231 in the 5th sub-viewing areas 211E
The difference of the pixel load of sub first signal wire 232 of item second.One article of first sub first signal wire in 5th sub-viewing areas 211E
The difference of total conductor loading of 231 total conductor loading and one article of second sub first signal wire 232 compensates the 5th sub-viewing areas
The pixel of one first sub first signal wire 231, which is loaded, in 211E loads it with the pixel of one second sub first signal wire 232
Difference.Similarly, the 4th notched region 250D crosses over the pixel 240 for being slightly smaller than 80 rows, the 4th sub-viewing areas along second direction Y
Ratio in 211D in the 5th thickness and the second display area 212 between the 6th thickness is more than or equal to 96% and is less than or equal to
The total conductor loading and one article of second son first of one article of first sub first signal wire 231 in 98%, the 4th sub-viewing areas 211D
The difference of total conductor loading of signal wire 232 compensates the picture of one article of first sub first signal wire 231 in the 4th sub-viewing areas 211D
The difference of element load and the pixel load of one second sub first signal wire 232.In conclusion any in the first display area 211
The difference of total conductor loading of one first sub first signal wire 231 and total conductor loading of one second the first signal wire 232 of son
Compensate the difference of the pixel load of sub first signal wire 231 of this first and the pixel load of one second sub first signal wire 232.
Figure 12 is a kind of floor map of display device 300 provided in an embodiment of the present invention.
As shown in figure 12, the present invention provides a kind of display device 300, including display panel 200.Display panel 200 is upper
It states in embodiment and is described in detail, repeat no more.Display device 300 can be electronic equipment having a display function, such as mobile phone,
Computer, television set.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all in essence of the invention
Within mind and principle, any modification, equivalent substitution, improvement and etc. done be should be included within the scope of the present invention.
Claims (12)
1. a kind of display panel characterized by comprising
Viewing area and non-display area around the viewing area；
A plurality of first signal wire and multiple pixels；
The viewing area includes the first display area, the second display area, and a plurality of first signal wire includes the first son first
Signal wire and the second sub first signal wire,
Described first sub first signal wire is located at first display area, and the described second sub first signal wire is located at described second
Display area；
The quantity for the pixel connecting with described first sub first signal wire is a, is believed with second son first
The quantity of the pixel of number line connection is b, wherein a, b are integer, and 0 < a < b；
Described first sub first signal wire has the first conductivity, and the described second sub first signal wire has the second conductivity, institute
The first conductivity is stated less than second conductivity.
2. display panel according to claim 1, which is characterized in that first signal wire includes scan signal line and hair
Penetrate one or more of signal wire.
3. display panel according to claim 2, which is characterized in that the display panel further include:
Active layer；
In the first overlapping region that the described first sub first signal wire and the active layer overlap, the described first sub first signal wire
With the first line width and first thickness；In the second overlapping region that the described second sub first signal wire and the active layer overlap,
Described second sub first signal wire has the second line width and second thickness；
The ratio of first line width and second line width is 0.98 to 1.02, the first thickness and the second thickness
Ratio is 0.98 to 1.02.
4. display panel according to claim 3, which is characterized in that the described first sub first signal wire with it is described active
Outside overlapping first overlapping region of layer, the described first sub first signal wire has third line width and third thickness；Described
Outside second overlapping region that second sub first signal wire and the active layer overlap, the described second sub first signal wire has
4th line width and the 4th thickness；
The third line width is less than the 4th line width, and/or, the third thickness is less than the 4th thickness.
5. display panel according to claim 4, which is characterized in that the third line width is less than the 4th line width, and
Ratio between the third line width and the 4th line width is more than or equal to 3%, is less than or equal to 60%.
6. display panel according to claim 4, which is characterized in that the third thickness is less than the 4th thickness, and
Ratio between the third thickness and the 4th thickness is more than or equal to 10%, is less than or equal to 96%.
7. display panel according to claim 1, which is characterized in that first signal wire includes data signal line.
8. display panel according to claim 1, which is characterized in that the display panel further include:
The first metal layer；
The overlapping area of the first metal layer and first sub first signal wire is S1；The first metal layer and described the
The overlapping area of two sub first signal wires is S2, wherein 0≤S2 < S1.
9. display panel according to claim 7, which is characterized in that the described first sub first signal wire has the 5th line width
With the 5th thickness, the described second sub first signal wire has the 6th line width and the 6th thickness；
5th line width is less than the 6th line width, and/or, the 5th thickness is less than the 6th thickness.
10. display panel according to claim 9, which is characterized in that the 5th line width is less than the 6th line width, and
Ratio between 5th line width and the 6th line width is more than or equal to 3%, is less than or equal to 7%.
11. display panel according to claim 9, which is characterized in that the 5th thickness is less than the 6th thickness, and
Ratio between 5th thickness and the 6th thickness is more than or equal to 94%, is less than and waits 98%.
12. a kind of display device, which is characterized in that including display panel described in any one of claim 1 to 11.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811234837.7A CN109360844A (en) | 2018-10-23 | 2018-10-23 | A kind of display panel and a kind of display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811234837.7A CN109360844A (en) | 2018-10-23 | 2018-10-23 | A kind of display panel and a kind of display device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN109360844A true CN109360844A (en) | 2019-02-19 |
Family
ID=65346234
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811234837.7A Pending CN109360844A (en) | 2018-10-23 | 2018-10-23 | A kind of display panel and a kind of display device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109360844A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2023225865A1 (en) * | 2022-05-24 | 2023-11-30 | 京东方科技集团股份有限公司 | Array substrate, display panel and display device |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107749247A (en) * | 2017-11-03 | 2018-03-02 | 武汉天马微电子有限公司 | Display panel and display device |
| US20180090061A1 (en) * | 2016-09-23 | 2018-03-29 | Samsung Display Co., Ltd. | Display device |
| CN107870494A (en) * | 2017-11-30 | 2018-04-03 | 武汉天马微电子有限公司 | Array substrate, display panel and display device |
| CN107887399A (en) * | 2017-11-30 | 2018-04-06 | 武汉天马微电子有限公司 | Array substrate, organic light-emitting display panel and organic light-emitting display device |
| CN108492775A (en) * | 2018-05-14 | 2018-09-04 | 昆山国显光电有限公司 | Array substrate, display screen and display device |
| CN108682375A (en) * | 2018-05-14 | 2018-10-19 | 昆山国显光电有限公司 | Display panel and display device |
-
2018
- 2018-10-23 CN CN201811234837.7A patent/CN109360844A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20180090061A1 (en) * | 2016-09-23 | 2018-03-29 | Samsung Display Co., Ltd. | Display device |
| CN107749247A (en) * | 2017-11-03 | 2018-03-02 | 武汉天马微电子有限公司 | Display panel and display device |
| CN107870494A (en) * | 2017-11-30 | 2018-04-03 | 武汉天马微电子有限公司 | Array substrate, display panel and display device |
| CN107887399A (en) * | 2017-11-30 | 2018-04-06 | 武汉天马微电子有限公司 | Array substrate, organic light-emitting display panel and organic light-emitting display device |
| CN108492775A (en) * | 2018-05-14 | 2018-09-04 | 昆山国显光电有限公司 | Array substrate, display screen and display device |
| CN108682375A (en) * | 2018-05-14 | 2018-10-19 | 昆山国显光电有限公司 | Display panel and display device |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2023225865A1 (en) * | 2022-05-24 | 2023-11-30 | 京东方科技集团股份有限公司 | Array substrate, display panel and display device |
| CN117616902A (en) * | 2022-05-24 | 2024-02-27 | 京东方科技集团股份有限公司 | Array substrate, display panel and display device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN107622749B (en) | A kind of display panel, electroluminescence display panel and display device | |
| US11765939B2 (en) | Display device | |
| US10424248B2 (en) | Display panel and display device | |
| CN110310961A (en) | Has jagged display device | |
| CN108735779A (en) | Include the display device of emission layer | |
| CN108133688A (en) | EL display device | |
| CN110391274A (en) | Display panel and electronic equipment including display panel | |
| US10908734B2 (en) | Display device | |
| CN108469697A (en) | Display panel and display device | |
| CN110246869A (en) | Show equipment | |
| CN107994056A (en) | Display panel and the display device with the display panel | |
| US11455959B2 (en) | Display device | |
| TWI424411B (en) | Electroluminescence device | |
| US10658444B2 (en) | Pixel and display device including the same | |
| WO2021232411A1 (en) | Display substrate, display panel, and display device | |
| CN107895734A (en) | Organic light-emitting display panel and organic light-emitting display device | |
| CN115101575B (en) | Display substrate and display device | |
| CN113506542A (en) | Display device | |
| US20210056906A1 (en) | Display device | |
| CN101764148B (en) | Electroluminescent device | |
| US11581392B2 (en) | Display device | |
| CN108766353A (en) | Pixel-driving circuit and method, display device | |
| CN109360844A (en) | A kind of display panel and a kind of display device | |
| CN109273490A (en) | A kind of display panel and preparation method thereof | |
| CN113393806B (en) | Display panel and display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20190219 |