CN109359734A - A neural network synapse structure based on memristor unit and its adjustment method - Google Patents

A neural network synapse structure based on memristor unit and its adjustment method Download PDF

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CN109359734A
CN109359734A CN201811245921.9A CN201811245921A CN109359734A CN 109359734 A CN109359734 A CN 109359734A CN 201811245921 A CN201811245921 A CN 201811245921A CN 109359734 A CN109359734 A CN 109359734A
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帅垚
乔石珺
吴传贵
罗文博
王韬
张万里
彭赟
潘忻强
梁翔
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University of Electronic Science and Technology of China
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Abstract

本发明涉及计算机与电子信息技术领域，具体涉及一种基于忆阻器单元的神经网络突触结构及其调节方法。本发明将多个忆阻器单元级联在一起作为一个电子突触(即级联忆阻器单元组)，使用一种加权的映射规则将其电阻值映射到神经网络中的突触权值，并采用全调节或分步调节的方式来避免神经网络在学习过程中因忆阻器无法精确调节所带来的影响，从而使各类神经网络均可在基于忆阻器的系统上正常运行。本发明解决了电阻值到突触权值的映射问题与忆阻单元阻值变化的不确定性问题。

The invention relates to the technical field of computer and electronic information, in particular to a neural network synapse structure based on a memristor unit and an adjustment method thereof. The present invention cascades multiple memristor units together as an electronic synapse (ie, a cascaded memristor unit group), and uses a weighted mapping rule to map its resistance value to the synaptic weight in the neural network , and adopts full adjustment or step-by-step adjustment to avoid the influence of the neural network in the learning process due to the inability of memristor to adjust accurately, so that all kinds of neural networks can run normally on memristor-based systems . The invention solves the problem of mapping the resistance value to the synaptic weight value and the uncertainty problem of the resistance value change of the memristive unit.

Description

A kind of neural network synaptic structure and its adjusting method based on memristor unit
Technical field
The present invention relates to computers and electronic information technical field, and in particular to a kind of nerve net based on memristor unit Network synaptic structure and its adjusting method.
Background technique
Cynapse is that the intermediate structure of different neurons is connected in neural network, and weight passes through corresponding neural network algorithm Continuous renewal is the basis of neural network information processing.Memristor as a kind of new component with resistance tunable characteristic, It is considered as 4 basic circuit elements one of arranged side by side with resistance, inductance and capacitor.
Researcher find synaptic connection strengths changing rule and memristor electrology characteristic (its electric conductivity value by apply electricity The control characteristic of signal) there is similar changing rule, therefore single memristor can simulate the function of a cynapse.With use Electronic computer (transistor circuit of i.e. traditional CMOS complementary metal-oxide-semiconductor base) runs neural network procedure phase Than energy consumption can be greatly reduced in memristor unit, and improve read or write speed reduces the complexity of integrated circuit simultaneously.However, memristor Also there is its birth defect, as analog device, its resistance is nonlinear analog quantity variation under the regulation of voltage first, and The weight that expectation reaches cannot be precisely adjusted as digital device.Major part researcher uses the resistance of memristor at present It is worth the one-to-one weight for being mapped to neural network, the neural network based on such mapping method can not accomplish accurately to adjust power How each memristor resistance value in memristor circuit is effectively mapped to corresponding cynapse in neural network matrix and weighed by value Value, is very crucial problem to reach the optimum of operational precision, power consumption.
Currently, the synaptic structure based on memory resistor mainly has in the prior art: Prezioso, M.1Et al. recalled with two The difference of unit is hindered to define the weight in neural network used, and only to previous memristor list during adjusting Member applies driving voltage, and keeps the resistance value of the latter memristor unit constant, can guarantee the weight of all cynapses all in this way There is identical a reference value.It updates using manhattan right value update rule, that is,To The amplitude of the driving voltage of the application to required for the memristor unit for needing to adjust is positive and negative.Ligang Gao2Et al. way be Using the driving voltage (including pulsewidth and amplitude) under process control, and in conjunction with additional write verification step in a program come by The resistance of step section memristor, until its resistance is close or equal to target resistance values, so that the right value update of each step be made to reach To desired value so that neural network can operate normally.
The weight of a cynapse is indicated using the difference of two memristor units, and is advised using Manhattan right value update Then, due to causing to realize simple image recognition without fundamentally solving the inexactness that synaptic weight is adjusted, because This is unable to complete more complicated neural network function.And the technology by the way that write verification step is added, which increase program controls The complexity of system, and the weight that can be rapidly completed originally is adjusted into advantage, it is changed into time-consuming verification process repeatedly.
Summary of the invention
For above-mentioned there are problem or deficiency, to solve resistance value to the mapping problems of synaptic weight and solution is motivating The uncertain problem of memristor unit change in resistance under the action of voltage, the present invention provides a kind of minds based on memristor unit Through network synaptic structure and its adjusting method, realize memristor resistance value to synaptic weight by memristor cascade.
A kind of neural network synaptic structure based on memristor unit is recalled by the unit cascaded cascade constituted of n memristor Hinder device unit group.
The accuracy of synaptic weight required for the quantity n of the memristor unit is operated normally by neural network determines, Carry out each memristor unit of tissue in the connection type of physical layer, by the resistance value of each memristor unit using cascade connection type It is pre-processed according to following formula:
Wherein, i refers to i-th of cascade memristor unit in cascade memristor unit group, RiTo cascade memristor unit group In i-th of unit real-time resistance value, RmidFor the intermediate value of the change in resistance range of each unit in cascade memristor unit group, Rmin For the minimum value of the change in resistance range of each unit in cascade memristor unit group, wiIt is in cascade memristor unit group i-th The numerical value that the resistance value of a cascade memristor unit maps.Each memristor unit is identical, RmidAnd RminFor definite value.
The numerical value that above-mentioned pretreatment is obtained carries out the tissue of algorithm level according to following formula:
W=round (wX, Y) and * 10X-1+round(wX-1, Y) and * 10X-2+…+round(wi, Y) and * 10i-1 +…+round (w1, Y) and * 100+round(w-1, Y-1) and * 10-1+round(w-2, Y-2) and * 10-2 +…+round(w-i, Y-i) and * 10-i+…+ round(w-Y, 0) and * 10-Y
Or
W=round (wX, 0) and * 10X-1+round(wX-1, 0) and * 10X-2+…+round(wi, 0) and * 10i-1 +…+round (w1, 0) and * 100+round(w-1, 0) and * 10-1+round(w-2, 0) and * 10-2 +…+round(w-i, 0) and * 10-i+…+round(w-Y, 0)*10-Y
Wherein, W is the weight for cascading memristor unit group (i.e. a neural network electronic synapse), and X and Y are respectively to cascade The corresponding quantity for indicating weight integer and fractional part unit in memristor unit group, Y are also the accurate of represented weight simultaneously Degree； round(wi, Y-i) and it is to indicate to wiIt rounds up and retains Y-i decimals.
The emulation cynapse that tissue is completed in the manner described above carries out the update of synaptic weight using two kinds of regulative modes.
The first is adjusted to be complete, i.e., cascade all memristor units are involved in adjusting during right value update, also It is to change the resistance value of cascade each memristor unit by applying the operation of electric pulse.
Second is adjusted stepwise, i.e., according to the situation of change of error during the update of weight, to judge to need The memristor unit of adjusting.Specially in the early period of the changing greatly due to weight of program operation, start only to aforementioned expression The higher position of weight in method is adjusted；In the later period of program operation, the update of each weight is smaller, that is, learns Journey is nearly completed, and starts to carry out fine adjusting to all unit application electric pulses at this time again, to reach desired weight as early as possible. Error is considered as early period when being greater than 5~20 times of err_goal, is otherwise the later period, err_goal is the EP (end of program) set in program Error trigger condition, error current be less than the value when learning process terminate.
Multiple memristor cell levels are tied together as an electronic synapse (i.e. cascade memristor unit group) by the present invention, Its resistance value is mapped to the synaptic weight in neural network using a kind of mapping ruler of weighting, and using full adjusting or substep The mode of adjusting come avoid neural network in learning process because memristor can not accurately adjust brought by influence, to make each Neural network can operate normally in the system based on memristor.
In conclusion the present invention solve resistance value to synaptic weight mapping problems and memristor unit change in resistance not Certain problem.
Detailed description of the invention
Fig. 1 is the neural network synaptic knob composition based on memory resistor in the prior art；
Fig. 2 is the test and control system that embodiment uses；
Fig. 3 is neural network synaptic knob composition of the embodiment based on five memristor units；
Fig. 4 is the modulation principle flow chart of synaptic structure of the present invention；
Fig. 5 is that the neural network of embodiment surveys the tolerance of error in adjustment process in three kinds of different modes of learning Examination.
Specific embodiment
It is further to the present invention with reference to the accompanying drawings and examples to be described in detail
Fig. 2 is the test and control system that embodiment uses, and top is 3706A system control switch in figure, it passes through The connection and disconnection of internal circuit are come the memristor unit of choosing needs to operate.2400 interfaces are used to connect Keithley2400Source Meter digital multimeter is also connected with generation excitation to read the resistance value of memristor unit thereon The function generator interface of voltage realizes the update of memristor unit resistance value by the pulse voltage that function generator generates.In figure DUT be memristor unit to be controlled, a unit is illustrated only in figure to illustrate.
Fig. 3 is the memristor cell array of embodiment preparation, and each intersection is a memristor unit, and both ends are connected to control The circuit and access system control switch of the unit are made, wherein five electronic synapses simulated as one of a row, pass through program Control applies write-in voltage VwriteWith reading voltage Vread.Five memristor units in dotted line frame are the nerve net of the present embodiment Network synaptic structure.
Specific weight indicates and updates that details is shown in Fig. 4, runs the BP nerve net based on Iris data set by computer Network determines that weight indicates that required accuracy is comprising totally five decimals including integer-bit, it is therefore desirable to five memristor units Cascade is to indicate a synaptic weight.
After initialization operation after the control unit of each outside is connect with memristor array Jing Guo each unit Can start program operation, by each memristor unit resistance value that digital multimeter is successively read return to after computer according to Secondary label is1, R2... R5, then according to formula wi=(Ri-Rmid)/(Rmax-Rmin) pre-processed, all resistance values It is modulated in [- 1,1] range.According still further to weighting scheme above-mentioned:
W=w1·1+w2·0.1+w3·0.01+w4·0.001+w5·0.0001
Obtain the practical weight of entire cynapse.
During subsequent right value update, this example is carried out using adjusted stepwise method.During program operation, The weight for needing to adjust some cynapse in backpropagation by the neural network error that computer calculates, then passes through process control Instrument applies the square-wave voltage of specified quantity and pulse width to corresponding cynapse unit, in the excitation of these adjustment pulses Under the migration of carrier occurs inside each memristor unit, so that the conductance of the unit is increased or is reduced.
(err_goal is in program when we judge that current error is greater than 10 times of err_goal by program in this example The error trigger condition of the EP (end of program) of setting, learning process terminates when error current is less than the value), at this time this weight with The target weight for needing to learn falls far short, and then only influences maximum first place to weight and is adjusted, by multiple study Current error value adjusts each memristor unit less than 10 times of err_goal and then simultaneously after circulation, fine-tuned with Meet the requirement of err_goal.
Specific mode of operation carries out detailed so that one group of five memristor unit is a cascade memristor unit group as an example Illustrate: one integer, four decimals being selected according to neural network precise requirements to w in this example, therefore use one group five Memristor unit is a cascade memristor unit group.
The resistance value of all units is all reset as the intermediate state of its change in resistance range in the initial state, it is assumed that some The weight group of cynapse unit becomes
W=0.47281-0.2310.1+0.800.01+0.20.001-00.0001=0.4579
It can be seen that such method indicates the weight of cynapse, the value of first memristor unit plays main function, subsequent Memristor unit can accurately adjust the weight of cynapse, to meet the requirement of accuracy.It is followed assuming that having run first It is needed after ring by weighed value adjusting to w=1.0482, particular number of pulse is applied to the first memristor unit by process control Voltage, and subsequent unit remains unchanged, and gradually slows down in the variation of the weight after the adjusting of multiple learning process, It is exactly that learning process is nearly completed, pulse control is all applied to all units by process control at this time, error amount gradually subtracts In the error range as low as allowed, learning process terminates, and right value update is completed.
Fig. 5 is the actual Computer Simulation to above-mentioned processing mode of our embodiments as a result, be to adjust entirely respectively, point Step section and when without tandem states under the influence of different errors accuracy rate situation of change.Abscissa is the cynapse of computer simulation The error amount of weight variation, that is, the random error added.The accuracy rate when longitudinal axis is the end of the program.It can be seen that opening Begin just tolerate the error of maximum number magnitude using full regulative mode, and adjusted stepwise is not much different to the tolerance of error but It is that the accuracy rate that adjusted stepwise can reach is higher.

Claims (2)

1.一种基于忆阻器单元的神经网络突触结构，其特征在于：1. a neural network synapse structure based on memristor unit is characterized in that: 由n个忆阻器单元级联构成的级联忆阻器单元组，n由神经网络正常运行所需要突触权值的精确度来决定；将各个忆阻单元的阻值按照如下公式进行预处理：A cascaded memristor unit group composed of n memristor units cascaded, n is determined by the accuracy of the synaptic weights required for the normal operation of the neural network; the resistance of each memristor unit is pre-determined according to the following formula: deal with: 其中，i指级联忆阻器单元组内第i个级联的忆阻器单元，Ri为第i个级联的忆阻器单元的实时阻值，Rmid为级联忆阻器单元组中各个单元的阻值变化范围中值，Rmin为级联忆阻器单元组中各个单元的阻值变化范围最小值，wi为第i个级联的忆阻器单元的阻值映射得到的数值；各忆阻器单元相同，Rmid和Rmin为定值；Among them, i refers to the i-th cascaded memristor unit in the cascaded memristor unit group, R i is the real-time resistance value of the i-th cascaded memristor unit, and R mid is the cascaded memristor unit The median value of the resistance value variation range of each unit in the group, R min is the minimum value of the resistance value variation range of each unit in the cascaded memristor unit group, and wi is the resistance value mapping of the i-th cascaded memristor unit. The value of ; each memristor unit is the same, R mid and R min are fixed values; 将上述预处理得到的数值按照如下公式进行算法层面的组织：The values obtained from the above preprocessing are organized at the algorithm level according to the following formula: W＝round(wX，Y)*10X-1+round(wX-1，Y)*10x-2+…+round(wi，Y)*10i-1 W=round(w X , Y)*10 X-1 +round(w X-1 , Y)*10 x-2 +…+round( wi , Y)*10 i-1 +…+round(w1，Y)*100+round(w-1，Y-1)*10-1+round(w-2，Y-2)*10-2 +…+round(w 1 , Y)*10 0 +round(w -1 , Y-1)*10 -1 +round(w -2 , Y-2)*10 -2 +…+round(w-i，Y-i)*10-i+…+round(w-Y，0)*10-Y +…+round(w -i , Yi)*10 -i +…+round(w -Y , 0)*10 -Y 或or W＝round(wX，0)*10X-1+round(wX-1，0)*10X-2+…+round(wi，0)*10i-1 W=round(w X , 0)*10 X-1 +round(w X-1 , 0)*10 X-2 +…+round( wi ,0)*10 i-1 +…+round(w1，0)*100+round(w-1，0)*10-1+round(w-2，0)*10-2 +…+round(w 1 , 0)*10 0 +round(w -1 , 0)*10 -1 +round(w -2 , 0)*10 -2 +…+round(w-i，0)*10-i+…+round(w-Y，0)*10-Y +…+round(w -i , 0)*10 -i +…+round(w -Y , 0)*10 -Y 其中，W为级联忆阻器单元组的权值，王和Y分别为级联忆阻器单元组中对应表示权值整数和小数部分单元的数量，Y同时也是所表示权值的精确度；round(wi，Y-i)为表示对wi四舍五入保留Y-i位小数。Among them, W is the weight of the cascaded memristor unit group, Wang and Y are the number of units corresponding to the integer and fractional part of the weight in the cascaded memristor unit group, respectively, and Y is also the accuracy of the represented weight. ; round( wi , Yi) means rounding wi to keep Yi decimal places. 2.如权利要求1所述基于忆阻器单元的神经网络突触结构，其突触权值的更新方式如下：2. The neural network synapse structure based on memristor unit as claimed in claim 1, the update mode of its synaptic weight is as follows: 第一种为全调节，在权值更新的过程中级联的所有忆阻单元都参与调节，通过施加电脉冲的操作来改变级联的各个忆阻单元的阻值；The first type is full adjustment, in which all the memristive units in the cascade participate in the adjustment during the weight update process, and the resistance value of each memristive unit in the cascade is changed by the operation of applying electrical pulses; 第二种为分步调节，即在权值的更新的过程中根据误差的变化情况，来判断需要调节的忆阻单元；The second is step-by-step adjustment, that is, the memristive unit that needs to be adjusted is determined according to the change of the error during the weight update process; 具体为在程序运行的前期只对权值较高的位进行调节，在程序运行的后期才开始对所有的单元施加电脉冲进行精细的调节，以尽快达到期望权值；误差大于5～20倍err_goal时视为前期，否则为后期，err_goal是程序中设定的程序结束的误差触发条件，当前误差小于该值时学习过程结束。Specifically, only the bits with higher weights are adjusted in the early stage of program operation, and electrical pulses are applied to all units for fine adjustment in the later stage of program operation, so as to achieve the expected weights as soon as possible; the error is greater than 5 to 20 times err_goal is regarded as the early stage, otherwise it is the later stage, err_goal is the error trigger condition for the end of the program set in the program, and the learning process ends when the current error is less than this value.
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