CN1093287C - Fuzzy reasoning coprocesor - Google Patents

Fuzzy reasoning coprocesor Download PDF

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CN1093287C
CN1093287C CN98101248A CN98101248A CN1093287C CN 1093287 C CN1093287 C CN 1093287C CN 98101248 A CN98101248 A CN 98101248A CN 98101248 A CN98101248 A CN 98101248A CN 1093287 C CN1093287 C CN 1093287C
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fuzzy
fuzzy reasoning
input
output
reasoning
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CN1231441A (en
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沈理
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Ningbo Zhongke IC Design Center Co., Ltd.
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Institute of Computing Technology of CAS
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Abstract

The present invention relates to a fuzzy reasoning processor. The present invention comprises a fuzzy reasoning machine, a fuzzy repository, an I/O buffer memory and a host interface, wherein the fuzzy reasoning machine comprises algorithm processes of scale factor input and calculation, input fuzzification, fuzzy reasoning, output anti-fuzzification and output proportion factor calculation; the fuzzy repository contains rules, membership functions and scale factors and is the base of the entire fuzzy reasoning process; the I/O buffer memory stores input/output variables of a controller and intermediate data in the fuzzy reasoning process; the host interface is in charge of the collaborative work between the fuzzy reasoning processor and a host.

Description

Fuzzy reasoning coprocesor
Technical field
The present invention relates to a kind of fuzzy inference system, in more detail, relate to a kind of employing digital circuit technique, be suitable for the fuzzy reasoning coprocesor that VLSI (very large scale integrated circuit) (VLSI) is made.
Background technology
Fuzzy controller adopts fuzzy inference system, comprises the fuzzy inference rule of being determined by experience or service data, variable input and output scale factor, and the subordinate function of corresponding fuzzy variable.By fuzzy reasoning, obtain the output of control corresponding variable according to these fuzzy rules, thereby finish the control function of fuzzy controller by current control variable input.
The performance of fuzzy controller depends on the function of fuzzy inference system.Comprise inference method, the definition of rule and subordinate function, scale factor, and the working condition of The whole control system.Fuzzy inference system of the present invention satisfies control of complex systems performance design demand.
Fuzzy reasoning coprocesor of the present invention belongs to the integrated circuit (hardware) of fuzzy reasoning method realizes that the occasion that is suitable for the real time high-speed performance requirement is used.The integrated circuit of fuzzy reasoning method is realized mainly can being divided into based on Analogical Circuit Technique with based on digital circuit technique two big classes.
Fuzzy reasoning based on Analogical Circuit Technique is realized, mainly utilizes the intrinsic characteristic of mimic channel to represent ambiguity function and realization calculating, and it is few to reach element, fast purpose.But because its special fabrication processes, and the circuit specificity is not suitable for large-scale production too by force.
Realize based on the fuzzy reasoning of digital circuit technique, then utilize quite ripe fully and still at the continuous digital circuit technique of development, can design at a high speed, the circuit of complexity, highly versatile.Be suitable for large-scale production.
Based on the input obfuscation of the main implementation algorithm of fuzzy inference circuit of digital circuit technique, fuzzy reasoning and the gelatinization of output reverse.Wherein fuzzy reasoning method for simply, generally adopts minimum-maximum (min-max) fuzzy operator.Subordinate function represents then to have form stores method and parametric description method.The form stores method can be simplified input obfuscation operation, but is subjected to memory limitations to be difficult to improve the precision of function.It is the local shape that each subordinate function is represented in the domain segmentation that the parametric description method has a kind of, help importing obfuscation like this and realize, but the dirigibility that ambiguity function is represented is restricted.
The present invention is based on the digital integrated circuit technology and still be in P/C, and fuzzy reasoning method is suitable for integrated these characteristics of large scale integrated circuit (VLSI) than this fact of the trend that improves constantly.A kind of new high-performance fuzzy reasoning coprocesor is proposed.
Summary of the invention
Fundamental purpose of the present invention provides a kind of fuzzy reasoning coprocesor, and it can support a plurality of fuzzy knowledge bases, comprises rule, subordinate function, and the fuzzy reasoning coprocesor of scale factor etc. is convenient to the Fuzzy control system of complex structure.
Another object of the present invention provides a kind of fuzzy reasoning coprocesor, and it adopts digital circuit, is suitable for the integrated fuzzy reasoning coprocesor of VLSI.
Other purposes of the present invention provide a kind of fuzzy reasoning coprocesor, with the fuzzy reasoning coprocesor of command mode or the work of shared storage mode, are convenient to and main frame (CPU) collaborative work.
According to purpose of the present invention, the fuzzy reasoning coprocesor that is proposed comprises indistinct logic computer, its algorithm flow is: as the clear amount of the input of fuzzy controller, through the input scale factor calculation, the input obfuscation converts fuzzy quantity to, carry out fuzzy reasoning with fuzzy rule then, The reasoning results output is carried out the reverse gelatinization and is converted clear amount to, and output-scale-factor calculates the output of controller, for the hierarchical structure fuzzy reasoning process, an output variable also can be used as the input variable of next stage fuzzy reasoning; Its fuzzy reasoning coprocesor includes: an indistinct logic computer that is used to carry out Fuzzy Logic Reasoning Algorithm, an and fuzzy knowledge storehouse memorizer that is used for the operation of regulation fuzzy reasoning overall process that is connected with indistinct logic computer, an I/O memory buffer that is used for fuzzy reasoning process storage I/O variable and intermediate data that is connected with indistinct logic computer, one is connected with indistinct logic computer and is used for the host interface circuit of fuzzy reasoning coprocesor and host communication.
Description of drawings
Above-mentioned purpose of the present invention and other characteristics will further be introduced by content of the present invention in detail.The relevant accompanying drawing of following first summary narration, wherein:
Fig. 1, the Fuzzy Logic Reasoning Algorithm flow process that fuzzy reasoning coprocesor of the present invention is used.
Fig. 2 A, the mapping relations between signless integer variable and the domain.
Fig. 2 B, the mapping relations between signed integer variable and the domain.
Fig. 2 C, 3 words have the conversion example between symbol and the signless integer.
Fig. 3 A-3L, the shape of input membership function commonly used.
Fig. 3 M-3N, the shape of output membership function commonly used.
Fig. 4 A, the information storage configuration of fuzzy knowledge base.
Fig. 4 B, the explanation of the information name of fuzzy knowledge base.
Fig. 5 A, the scale factor storage configuration.
Fig. 5 B, the explanation of scale factor name.
Fig. 6 A, the types of variables storage configuration.
Fig. 6 B, the explanation of types of variables name.
Fig. 7 A, the structure of rule set describing word.
Fig. 7 B, the explanation of rule set describing word field.
Fig. 8 A, the structure of rule sets describing word.
Fig. 8 B, the explanation of rule sets describing word field.
Fig. 9 A, the structure of regular preceding paragraph byte.
Fig. 9 B, the explanation of regular preceding paragraph byte field.
Figure 10 A, the structure of regular weight byte.
Figure 10 B, the explanation of regular weight byte field.
Figure 11, the structural representation of fuzzy reasoning coprocesor.
Figure 12, the structured flowchart of indistinct logic computer in the fuzzy reasoning coprocesor.
Embodiment
1, fuzzy reasoning method
Fuzzy controller adopts the principle of typical fuzzy inference system as follows.From the clear amount of Be Controlled process (object) sampled data as the fuzzy controller input, through the input scale factor calculation, the input obfuscation converts fuzzy quantity to, carries out fuzzy reasoning with fuzzy rule then.Gelatinization converts clear amount to through reverse for The reasoning results output, and output-scale-factor calculates control output, as the control action of corresponding sampling instant controlled process; For the hierarchical structure fuzzy reasoning process, an output variable also can be used as the input variable of next stage fuzzy reasoning.Fig. 1 provides the used Fuzzy Logic Reasoning Algorithm flow process of the present invention.Wherein to one by one fuzzy reasoning being carried out in each output again, reverse gelatinization and scale factor calculation after all input completed percentage factors calculating and the obfuscation.Can be used as the input of next stage for the middle output variable in the hierarchical structure system, need mend these variablees and do input scale factor calculation and obfuscation this moment, continue the fuzzy reasoning of other outputs then.
Above-mentioned processing procedure is based on all that pre-designed fuzzy knowledge base carries out.Provide the disposal route in each stage in the fuzzy reasoning process below respectively.
(1) scale factor calculation
Indistinct logic computer input/output variable value scope can be different with the inner domain scope of using of indistinct logic computer, and the mapping relations between them are determined by scale factor, can be amplified or dwindle.This mapping relations are as follows.
Mapping (seeing Fig. 2 A) for signless integer: X = D V max - V min * ( V - V min ) = KI * ( V - V max ) V = V max - V min D * X + V min = KO * X + V min
Wherein, KI is the input scale factor, and KO is an output-scale-factor, and X is the domain value, and D is that (example: the domain word length is n to the domain maximal value, D=2 n-1), V is a variate-value, V MaxAnd V MinBe respectively the higher limit and the lower limit of variable, when V exceeds bound by V MaxOr V MinHandle.Mapping (seeing Fig. 2 B) for signed integer: X = D s V max * V = KI * V X = V max D s * X = KO * V
Wherein, domain maximal value D s≈ 0.5D.
The inner domain of indistinct logic computer can unify to adopt signless integer.Therefore, when input/output variable is signed integer (complement code), need change earlier, its transformation rule is as follows:
● the sign bit of signed integer is negated and is converted to signless integer
● the most significant digit of signless integer is negated and is converted to signed integer
Word length is that 3 integer conversion example is shown in Fig. 2 C.Like this, scale factor calculation also is adjusted accordingly, and introduces base value VB and scope VR.
For signless integer:
VB=V min
VR=V max-V min
For signed integer:
VB=variable maximum-V Max
VR=2V max
Wherein, variable maximum is 2 (m-1)-1, m is the variable word length.Variate-value after the conversion and the mapping relations between the domain can be unified to handle as follows: X = D VR * ( V - VB ) = KI * ( V - VB ) , KI = ( 2 n - 1 ) * 1 VR V = VR D * X + VB = KO * X + VB , KO ≈ 2 - n * VR Wherein, all unified signless integer that is treated to of X, V.
(2) obfuscation
Subordinate function adopts parameter procedure among the present invention.The subordinate function parameter is independent description separately.Fig. 3 A-3L is input membership function commonly used.Wherein expand shape and refer to that the hypotenuse straight line can adopt broken line (going up convex line or valley line).Fig. 3 M, 3N are output membership function.The parameter of describing the subordinate function shape is abscissa value and hypotenuse slope.
The single line method is adopted in the input obfuscation.Calculate corresponding input membership function value (fuzzy value) μ by given input domain value X.Be example to expand trapezoidal subordinate function (Fig. 3 L) below, provide the algorithm of input obfuscation with class C linguistic form.
if(X-P 0≥0) μ=0
else?if?(X-P 1≤0) μ=0
else?if?(X-P 2≤0) μ=(X-P 1)*S 2
else?if?(X-P 3≤0) μ=1-(P 3-X)*S 3
else?if?(X-P 4≤0) μ=1
else?if?(X-P 5≤0) μ=1-(X-P 4)*S 5
else μ=(P 0-X)*S 0
(3) fuzzy reasoning
Adopt typical fuzzy inference rule among the present invention: If (X 1Is A 1) and (X 2Is A 2) and...and (X aIs A a) then (Y 1IsC 1), (Y 2Is C 2) ..., (Y cIs C c)
X wherein iBe input variable, A iBe input membership function (label), Y iBe output variable, C iBe output membership function (label).A kind of rule of exporting in the corresponding rule set of combination is divided into groups by consequent label combination, and the rule of same consequent label combination constitutes a rule sets.Reasoning process was made up of four steps.
(i) the excitation intensity α of computation rule j j
α j=(∧ iμ i)*RW j
Wherein, μ iBe the fuzzy value of input i, RW jWeight for regular j.
The (ii) synthetic excitation intensity α of computation rule group k Gk
α gk=∨ jα j
Wherein, μ iBe the fuzzy value of input i, RW jWeight for regular j.
The (iii) output The reasoning results C ' of computation rule group k Gk
μ C’gk(w)=α gk∧μ Cgk(w)
Wherein, w is the domain value of certain output in the output combination, C GkBe corresponding output membership function (label).
The (iv) output compositional rule of inference result of computation rule collection
μ C’(w)=∨ kμ C’gk(w)
First two steps are the rule condition part in the reasoning process, and corresponding fuzzy operator ∧-∨ adopts minimum-maximum (min-max) combination, or product-bounded and (product-boundedsum) combination.Two steps of back are contained composite part for rule, and corresponding fuzzy operator ∧-∨ can select minimum-and (min-sum) combination or product-and (product-sum) combination.
(4) reverse gelatinization
According to previously defined output membership function shape and above-mentioned fuzzy reasoning method, for gravity model appoach (COG) reverse gelatinizing method, the computing formula of output Y is as follows.
● for the single line output membership function: Y = Σ k α gk * P k Σ α gk
● for the isosceles triangle output membership function, min-sum contains synthetic: Y = Σ k α gk * ( 2 - α gk ) * b k * P k Σ k α gk * ( 2 - α gk ) * b k
● for the isosceles triangle output membership function, product-sum contains synthetic: Y = Σ k α gk * b k * P k Σ k α gk * b k
If the reverse gelatinizing method adopts the maximum method of average (MOM), output reverse gelatinization value is got the synthetic excitation intensity α of rule sets GkIf the pairing output membership function central value of the maximum P is identical maximal value α GkHave n, then exporting reverse gelatinization value is Y=(∑ kP k)/n notices that for the MOM method, output membership function only need adopt the single line shape among the present invention.
2, fuzzy knowledge base
Basis-the fuzzy knowledge base of fuzzy reasoning coprocesor work comprises fuzzy rule, subordinate function parameter list and scale factor parameter list.Here provide a kind of possible knowledge base structure (Fig. 4).Whole knowledge base is made of a plurality of independently knowledge bases, and any moment has only a knowledge base job.By the knowledge base pointer is set, select current knowledge storehouse by corresponding knowledge base start address KBA.Deposit rule set RS in each knowledge base, rule set describing word RSD, subordinate function parameter list MF and scale factor parameter list SF.Wherein different inputs, the MF of output and RS are given by corresponding start address MFA and RSA.SF comprises scale factor parameter and types of variables parameter.
Scale factor parameter (Fig. 5 A) is by base value VB; Scope VR, input scale factor K I constitutes.VB wherein, VR is a signless integer, KI is a no symbol floating number (Fig. 5 B).
Expression variable tape symbol whether in the types of variables parameter (Fig. 6), whether " feedback " is to input in the output of expression indistinct logic computer, and promptly next stage input is directly delivered in output at the corresponding levels in the hierarchical structure.
Each output or the corresponding rule set of output combination are by rule set describing word (Fig. 7) given rule form, fuzzy reasoning method and reverse gelatinizing method.Here item number comprises above-mentioned " feedback " input number before the rule.
Rule set is divided into the several rules group by output label or label combination, and the interior strictly all rules of rule sets has identical consequent label.Rule sets is made of rule sets describing word and rule body.Given each the consequent label of rule sets describing word (Fig. 8).Every rule of rule body is made up of some preceding paragraphes (Fig. 9) and a regular weight byte (Figure 10).Therefore rule weighted value RW can ask regular excitation intensity α greater than 1 jThe time, if α jSurpass 1, then the regulation value is 1.
3, the architecture of fuzzy reasoning coprocesor
Fuzzy reasoning coprocesor is made of four parts.Among Figure 11, indistinct logic computer (FIM) the 1st, the work of the whole processing procedures of fuzzy reasoning is finished in the core that fuzzy reasoning association handles.Fuzzy knowledge storehouse memorizer (FKB) 2 is used to deposit a plurality of fuzzy knowledge bases.I/O memory buffer (IOMEM) 3 is used to deposit the input/output variable value of indistinct logic computer, and the work storage unit in the reasoning process.IOMEM supports the shared storage working method, can be used as the shared storage of main frame and fuzzy reasoning coprocesor.Host interface 4 is responsible for the communication interface of fuzzy inference processor and main machine coordination working, supports order and two kinds of working methods of shared storage.For command mode, as an example, the most basic order can be defined as follows:
● PTI n writes n input value
● GTO n reads n output valve
● SSFI n starts single fuzzy reasoning, carries out n output reasoning.
● SMFI m starts a plurality of fuzzy reasonings, carries out the 0th~(m-1) individual output reasoning.
● SKB k is provided with knowledge base, and making k knowledge base is the current knowledge storehouse.
● WKB knowledge base content is sent to knowledge base memory by main frame.
Wherein, the WKB order is used for the occasion when knowledge base memory is RAM, after promptly each system applies power supply, needs to load earlier knowledge base memory, and then work.Need not the WKB order for the nonvolatile memory occasion.
In addition, fuzzy reasoning coprocesor define at least two port addresss as with the unit of host communication.A port is command word/status word unit, is used as main frame to coprocessor transmission command word with from coprocessor reading state word.Another port is general data read/write unit.
For the shared storage working method, after knowledge base memory loaded, normal fuzzy reasoning only need be used three basic command: SSFI, SMFI and SKB.IOMEM is passed through in main frame and coprocessor communication.Notice that above-mentioned port address carries out unified addressing in IOMEM.The processing that the shared storage working method can the simplified control system application program be called fuzzy reasoning coprocesor.
The algorithm flow synoptic diagram of indistinct logic computer is shown in the square frame among Figure 11 1.Before the reasoning, all input variables are concentrated the IOMEM that sends into coprocessor from main frame earlier, import scale factor calculation and obfuscation, then output variable are carried out fuzzy reasoning one by one, reverse gelatinization and output-scale-factor calculate, and export the result at last and send into IOMEM.For the hierarchical structure controller, carry out the obfuscation of " feedback " input in the middle of obtaining after the output variable immediately, and then carry out the fuzzy reasoning of follow-up output variable.
According to the fuzzy reasoning method of front, fundamental operation can be summed up as gets for a short time, gets greatly, adds, and takes advantage of, and removes.Therefore can adopt and be suitable for the integrated digital circuit technique of VLSI.Figure 12 is an indistinct logic computer computing circuit structure block diagram.Mainly by parallel adder 5, parallel multiplier 6 and some registers constitute.
Arithmetic register is 7,8,9,10,11,12, and register 13 is the rule set describing word, and register 14 is the rule sets describing word.And multipath reception converter 15,16,17,18,19,20,21.Above-mentionedly get for a short time, get big operation and can be finished by totalizer 5, division adopts subtractions-move to left and ask merchant's method to finish by turn by totalizer 5.Value in Figure 12 bracket (), the operation result that operation result that arithmetic register is preserved in the expression reasoning process or multipath reception converter are received.Be the data stream of each calculation stages in indistinct logic computer in the algorithm flow below.
(1) input scale factor calculation
Input variable value VI enters AA register 8 by IOMEM by 19.AA is by 15 then, and input variable base value VBI sends into totalizer 5 by FKB by 16 and carries out subtraction, and VI-VBI enters AB register 9 as a result.AB is by 17, and input scale factor K I, is sent into multiplier 6 and carries out multiplication by 18 by FKB, obtains importing domain value X and enters AD register 12.
(2) input obfuscation
According to the input obfuscation algorithm of front, need import domain X value and subordinate function parameter P iSize differentiate, this compare operation be by AD by 15, the P among the FKB iBy 16, send into 5 and carry out.Both differences enter AB in case of necessity, and this difference passes through 17 then, the subordinate function parameter S i, sent into multiplier 6 and carry out multiplication by 18 by FKB, the input fuzzy value μ that obtains enters AC register 11.Be " 0 " or " 1 " if above-mentioned differentiation result obtains the μ value, also send into AC.Because subordinate function can be overlapping,, might repeat above-mentioned obfuscation operation and obtain several μ values for given X value.These μ values all deposit IOMEM at last in, use for the fuzzy reasoning stage.
(3) fuzzy reasoning
Each bar rule of processing rule collection one by one in the fuzzy reasoning process, and overlapping with output reverse gelatinization operation part, and intersection is carried out.Therefore,, comprised part reverse gelatinization operation in this section, promptly comprised molecule and denominator in the accumulation calculating reverse gelatinization formula in order to narrate conveniently.
At first be the excitation intensity α of computation rule, the min operation is finished by totalizer 5.Prodoct is finished by multiplier 6.The μ value of each preceding paragraph corresponding sends into 5 or 6 by IOMEM by 15 or 17.Leave the aggregate-value ∧ μ of RMF register 10 in, correspondingly send into 5 or 6 by 16 or 18.At last, regular weight RW by 17 and ∧ μ multiply each other 6 by 18, obtain the α value and send in 10.
The synthetic excitation intensity α of next step computation rule group g, max operation or bounded sum operation are finished by totalizer 5.The α value that leaves every rule of 10 in is by 16, and the aggregate-value ∨ α that leaves GMF register 7 in sends into 5 by 15.Last α gValue leaves in 7.
Next step adds up the molecule ∑ α in reverse gelatinization formula again g' * P (comprises ∑ α g* P or ∑ α g* (2-α g) * P or ∑ α g* b*P or ∑ P), and denominator ∑ α g' (comprise ∑ α gOr ∑ α g* (2-α g) * b or ∑ α g* b or n).Initial α gSend into 12 by 21, take advantage of factor b, P, (2-α g) by 17, take advantage of factor-alpha g, α g' by 18, send into 6 and multiply each other, the branch subitem α that obtains at last g' * P leaves in 11 denominator term α in g' leave in 12.In 5, add up accumulated value ∑ α then g' * P and ∑ α g' leave in respectively in 8 and 9.
At this moment, repeat said process, handle the fuzzy reasoning of next rule sets, all dispose up to rule set.Note, for how consequent (many output) rule, different consequent molecules, the denominator aggregate-value will be handled respectively, therefore can not take register 8 and 9 always, needs other buffer storage units (IOMEM) to keep aggregate-value.
(4) output reverse gelatinization
Arrive this, the only surplus next divide operations of reverse gelatinization.Dividend ∑ α g' P in 8, divisor ∑ α g' in 9.Employing subtraction-move to left and ask the merchant by turn, quotient Y forms in 12, and subtraction is undertaken by 5, and moving to left of dividend and merchant realizes 19 and 21 respectively.
(5) output-scale-factor calculates
Quotient Y is by 18, and output-scale-factor KO sends into 6 by FKB by 17 and multiplies each other, and its long-pending Y*KO deposits among the AD (12).Then, by 16, AD sends into 5 additions by 15 to output variable base value VBO by FKB.Its as a result output variable value VO in 9.Restore at last among the IOMEM.
According to above-mentioned enforcement of the present invention, following advantage is arranged:
● fuzzy knowledge base has comprised the multiple adjustable parameters of I/O scale factor, is suitable for the self-adaptive fuzzy control system of complex structure.
● multiple fuzzy reasoning method is optional, has particularly comprised the product-sum fuzzy operator, and subordinate function adopts floating number to represent, the fuzzy reasoning function is strengthened and perfect.
● the parameter of subordinate function is independent description separately, has improved dirigibility and versatility.
● limited output membership function type in conjunction with quick reverse gelatinizing method, makes output reverse gelatinization operation more effective.
● fuzzy reasoning output is the result can " feed back " to input, carries out follow-up fuzzy reasoning, can realize the fuzzy controller of hierarchical structure easily.
● coprocessor can be worked by command mode and shared storage mode, helps realizing flexibly Fuzzy control system.

Claims (16)

1, a kind of fuzzy reasoning method, it is characterized in that, its algorithm flow is as follows: as the clear amount of the input of fuzzy controller, through the input scale factor calculation, the input obfuscation converts fuzzy quantity to, carries out fuzzy reasoning with fuzzy rule then, The reasoning results output is carried out the reverse gelatinization and is converted clear amount to, and output-scale-factor calculates the output of controller, and for the hierarchical structure fuzzy reasoning process, an output variable also can be used as the input variable of next stage fuzzy reasoning.
2, a kind of fuzzy reasoning coprocesor, it is characterized in that: comprising having: an indistinct logic computer that is used to carry out Fuzzy Logic Reasoning Algorithm, an and fuzzy knowledge storehouse memorizer that is used for the operation of regulation fuzzy reasoning overall process that is connected with indistinct logic computer, an I/O memory buffer that is used for fuzzy reasoning process storage I/O variable and intermediate data that is connected with indistinct logic computer, one is connected with indistinct logic computer and is used for the host interface circuit of fuzzy reasoning coprocesor and host communication.
3, fuzzy reasoning method as claimed in claim 1 is characterized in that, wherein scale factor calculation is finished and symbol, different range value arranged to the no symbol of domain, the mapping transformation the certain limit value from the I/O variable.
As claim 1 or 3 described fuzzy reasoning methods, it is characterized in that 4, wherein the I/O fuzzy membership functions adopts parameter procedure, each function independent description.
5, fuzzy reasoning method as claimed in claim 1 is characterized in that, wherein imports obfuscation and adopts the single line method, directly calculates the input membership function value by input domain value according to the input membership function parameter.
6, fuzzy reasoning method as claimed in claim 1 is characterized in that, wherein in the fuzzy reasoning process, the fuzzy operator ∧-∨ of rule condition part can be minimum-maximum or product-bounded and; Rule contain the part fuzzy operator can be minimum-and or product-and.
7, fuzzy reasoning method as claimed in claim 6 is characterized in that, for fuzzy operator product-bounded and and product-and, its degree of membership adopts floating number to represent in calculating process.
8, fuzzy reasoning method as claimed in claim 1 is characterized in that, wherein exports the reverse gelatinization and adopts the gravity model appoach or the maximum method of average.
9, fuzzy reasoning method as claimed in claim 8 is characterized in that, wherein gravity model appoach (COG) adopts the quick reverse gelatinization computing method under the limited output membership function type.
10, fuzzy reasoning method as claimed in claim 1 is characterized in that, the indistinct logic computer that wherein is used to carry out the operation of fuzzy reasoning overall process is finished the included input scale factor calculation of algorithm flow, the input obfuscation, fuzzy reasoning, the gelatinization of output reverse, output-scale-factor calculates.
11, fuzzy reasoning method as claimed in claim 10 is characterized in that, its indistinct logic computer algorithm flow is supported the hierarchical structure fuzzy reasoning process.The The reasoning results of an output variable can be used as the input variable of next stage fuzzy reasoning.
12, fuzzy reasoning method as claimed in claim 10 is characterized in that, the performed algorithm flow of its indistinct logic computer all operation is that the digital operational circuit of core is finished by parallel adder and parallel multiplier.
13, fuzzy reasoning method as claimed in claim 1, it is characterized in that, the fuzzy knowledge base that wherein is used for regulation fuzzy reasoning overall process operation comprises on a plurality of structures independently knowledge base, by the optional knowledge base of knowledge base pointer being set as the work at present knowledge base.
14, fuzzy reasoning method as claimed in claim 13, it is characterized in that, its independently knowledge base comprise I/O scale factor parameter, I/O subordinate function parameter list, a plurality of Fuzzy Rule Sets, corresponding output variable of each rule set or the combination of a kind of output variable can be supported the multiple-input and multiple-output fuzzy reasoning.
15, fuzzy reasoning method as claimed in claim 1, it is characterized in that, wherein be used for fuzzy reasoning process storage I/O variable, the I/O memory buffer of intermediate data and the host interface circuit that is used for fuzzy reasoning coprocesor and host communication, support command mode or shared storage mode, finish the collaborative work between indistinct logic computer and the main frame.
16, fuzzy reasoning method as claimed in claim 15 is characterized in that, the required port address of the command mode of its indistinct logic computer and host communication carries out unified addressing in the I/O memory buffer of shared storage mode work.
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