CN109324560B - Liquid crystal driver, scanning control system and control method of system - Google Patents

Liquid crystal driver, scanning control system and control method of system Download PDF

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Publication number
CN109324560B
CN109324560B CN201811487368.XA CN201811487368A CN109324560B CN 109324560 B CN109324560 B CN 109324560B CN 201811487368 A CN201811487368 A CN 201811487368A CN 109324560 B CN109324560 B CN 109324560B
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liquid crystal
module
digital
crystal driver
analog
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CN109324560A (en
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王刚
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National Astronomical Observatories of CAS
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National Astronomical Observatories of CAS
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/04Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
    • G05B19/0423Input/output
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00Program-control systems
    • G05B2219/20Pc systems
    • G05B2219/25Pc structure of the system
    • G05B2219/25314Modular structure, modules

Abstract

The invention discloses a liquid crystal driver, a scanning control system and a control method of the system, wherein the liquid crystal driver synchronously controls a plurality of liquid crystal wave plates in a multi-path way through an FPGA module and a DAC module; the FPGA module comprises an FPGA chip, a DAC driving circuit is arranged on the FPGA chip, and the FPGA chip realizes parallel control over the DAC driving circuit by using a Verilog language; the DAC driving circuit drives the DAC module; the DAC module adopts an 8-path 24-bit digital analog conversion chip; and the DAC module synchronously controls the plurality of liquid crystal wave plates by synchronously controlling the voltages at two ends of the plurality of liquid crystal wave plates. The liquid crystal driver can synchronously control a plurality of liquid crystal wave plates in the liquid crystal type filter with high precision, so that the waveband scanning control system applying the liquid crystal driver has the advantages of high precision, high stability, high response speed and low cost.

Description

Liquid crystal driver, scanning control system and control method of system
Technical Field
The invention relates to the field of astronomical observation equipment, in particular to a liquid crystal driver, a liquid crystal type filter waveband scanning control system and a control method of the system.
Background
Currently, liquid crystals are mostly used for display devices. With the development of liquid crystal technology, liquid crystal is gradually applied to a plurality of fields, such as remote sensing polarization image measurement, laser modulation and the like, as a phase retarder for transmitting polarized light. The tunable narrow-band birefringent filter is an important instrument in a solar magnetic field observation telescope. Tunable refers to changing the wavelength of light that the filter can transmit by adjusting the filter. By narrow band is meant that the filter transmission band is less than 0.1 angstroms wide. The birefringence of the liquid crystal changes according to the magnitude of a voltage applied across it, and the use of the liquid crystal in an optical filter can change the transmission wavelength band. The time resolution of solar observation can be obviously improved by adopting a liquid crystal wave plate in the conventional tunable narrow-band birefringent filter. Filters for solar field observation require the use of 5 to 7 liquid crystal waveplates. When the transmission wave band is changed, the voltages at two ends of a plurality of liquid crystal wave plates of the optical filter need to be synchronously and accurately controlled. However, the conventional filter has a small number of control channels of the liquid crystal driver, and cannot realize high-precision synchronous control of a plurality of liquid crystal wave plates. In addition, the conventional liquid crystal driver has low accuracy, low stability, low response speed and high cost.
Disclosure of Invention
The invention aims to provide a liquid crystal driver, a scanning control system and a control method of the system. The liquid crystal driver can synchronously control the plurality of liquid crystal wave plates in the liquid crystal type filter with high precision, so that a scanning control system applying the liquid crystal driver has the function of synchronously controlling the plurality of liquid crystal wave plates in the liquid crystal type filter with high precision, and has the advantages of high precision, high stability, high response speed and low cost.
In order to solve the above technical problems, the liquid crystal driver of the present invention controls a plurality of liquid crystal wave plates synchronously in a multi-path manner through a Field Programmable Gate Array module (FPGA module) and a Digital-to-Analog Converter module (DAC module); the FPGA module comprises a Field Programmable Gate Array (FPGA) chip, a Digital-to-Analog Converter driving circuit (DAC driving circuit) is arranged on the FPGA chip, and the FPGA chip realizes the parallel control of the DAC driving circuit by using a Verilog hardware description language (Verilog language); the DAC driving circuit drives the DAC module; the DAC module adopts an 8-path 24-bit digital analog conversion chip; and the DAC module synchronously controls the plurality of liquid crystal wave plates by synchronously controlling the voltages at two ends of the plurality of liquid crystal wave plates.
Further, the liquid crystal driver includes a digital part and an analog part; the digital part of the liquid crystal driver comprises a communication module, an FPGA module and an Input/Output module (IO module); the communication module comprises an RS422 interface; the FPGA module comprises an FPGA chip which is a control chip; a DAC driving circuit and a network element Input/Output Subsystem II soft core (NIOS II soft core, Netware Input Output Subsystem II soft core) are arranged on the FPGA chip; the IO module is used for receiving the input from the FPGA module and outputting the input to the analog part of the liquid crystal driver; the analog part of the liquid crystal driver comprises a DAC module, an amplifying circuit module and a filtering module; the DAC module is used for receiving digital signal input from an IO module in the digital part of the liquid crystal driver; converting the digital signal into a square wave analog signal and outputting the square wave analog signal to an amplifying circuit module; the amplifying circuit module is used for amplifying the analog signal from the DAC module and outputting the amplified analog signal to the filtering module; and the filtering module is used for filtering the amplified input voltage from the amplifying circuit module, reducing the overshoot amplitude and the ripple wave and inputting the processed signal to the liquid crystal wave plate.
Further, the analog part of the liquid crystal driver comprises a positive and negative 15V voltage-stabilized power supply module, a 5V voltage-stabilized power supply module and a 2.5V voltage-stabilized power supply module, wherein the positive and negative 15V voltage-stabilized power supply module supplies electric energy to the amplifying circuit module; the 5V stabilized voltage power supply module supplies electric energy to the DAC module; the 2.5V regulated power supply module provides reference voltage for the amplifying circuit module and the DAC module.
Furthermore, the signal transmission of the FPGA module and the DAC module adopts an optical coupling isolation circuit.
Furthermore, the amplifying circuit module adopts a two-stage coupling type amplifying circuit.
Further, an AVALON bus (AVALON bus) is adopted between the NIOS II soft core and the DAC driving circuit for data transmission, and the data transmission adopts a First-In First-Out (FIFO) mode to realize data storage and interaction.
Further, the DAC driving circuit adopts a high-precision power supply conversion circuit.
Further, the NIOS II soft core is electrically connected to the EPCS, and the NIOS II soft core is electrically connected to the SDRAM.
Compared with the prior art, the liquid crystal driver has the following beneficial effects.
1. In the technical scheme, a liquid crystal driver is adopted to synchronously control a plurality of liquid crystal wave plates through an FPGA module and a DAC module in a multi-path way; the FPGA module comprises an FPGA chip, a DAC driving circuit is arranged on the FPGA chip, and the FPGA chip realizes parallel control over the DAC driving circuit by using a Verilog language; the DAC driving circuit drives the DAC module; the DAC module adopts an 8-path 24-bit digital analog conversion chip; the DAC module realizes the technical means of synchronously controlling the plurality of liquid crystal wave plates by synchronously controlling the voltages at two ends of the plurality of liquid crystal wave plates, so the liquid crystal driver can synchronously control the plurality of liquid crystal wave plates in the liquid crystal type filter at high precision, wherein the 8-path 24-bit digital analog conversion chip increases the number of channels of the liquid crystal wave plates which can be controlled by the driver while improving the voltage output resolution.
2. The technical scheme adopts the liquid crystal driver which comprises a digital part and an analog part; the digital part of the liquid crystal driver comprises a communication module, an FPGA module and an IO module; the communication module comprises an RS422 interface; the FPGA module comprises an FPGA chip which is a control chip; a DAC driving circuit and an NIOS II soft core are arranged on the FPGA chip; the IO module is used for receiving the input from the FPGA module and outputting the input to the analog part of the liquid crystal driver; the analog part of the liquid crystal driver comprises a DAC module, an amplifying circuit module and a filtering module; the DAC module is used for receiving digital signal input from an IO module in the digital part of the liquid crystal driver; converting the digital signal into a square wave analog signal and outputting the square wave analog signal to an amplifying circuit module; the amplifying circuit module is used for amplifying the analog signal from the DAC module and outputting the amplified analog signal to the filtering module; the filtering module is used for carrying out filtering processing on the amplified input voltage from the amplifying circuit module, reducing the overshoot amplitude and reducing ripples, and inputting the processed signals into the liquid crystal wave plates, so that the technical means provides a hardware basis for the liquid crystal driver to synchronously control the plurality of liquid crystal wave plates in the liquid crystal type optical filter with high precision.
3. According to the technical scheme, the simulation part adopting the liquid crystal driver comprises a positive and negative 15V voltage-stabilized power supply module, a 5V voltage-stabilized power supply module and a 2.5V voltage-stabilized power supply module, wherein the positive and negative 15V voltage-stabilized power supply module supplies electric energy to the amplifying circuit module; the 5V stabilized voltage power supply module supplies electric energy to the DAC module; the 2.5V voltage-stabilized power supply module provides reference voltage for the amplifying circuit module and the DAC module, and the stability of the liquid crystal driver is improved.
4. According to the technical scheme, the technical means that the optical coupling isolation circuit is adopted for signal transmission of the FPGA module and the DAC module is adopted, so that the interference of digital signals to analog signals is effectively reduced, and the purpose of improving the stability of voltage output is achieved.
5. According to the technical scheme, the technical means that the amplifying circuit module adopts a two-stage coupling type amplifying circuit is adopted, so that the stability of voltage output is effectively improved.
6. According to the technical scheme, the data transmission is carried out between the NIOS II soft core and the DAC driving circuit through the AVALON bus, and the data transmission realizes the storage and interaction of data in an FIFO mode, so that the AVALON bus is used as an on-chip bus with a simpler protocol to assist the NIOS II soft core in carrying out data exchange with the outside, the high-efficiency transmission of signals is facilitated, and the time sequence behavior and the logical connection between the peripheral and the chip are simplified.
7. The technical scheme adopts the technical means that the DAC driving circuit adopts the high-precision power supply conversion circuit, so that the stable output of voltage is facilitated.
8. According to the technical scheme, the technical means that the NIOS II soft core is electrically connected with the EPCS and the NIOS II soft core is electrically connected with the SDRAM is adopted, so that a stable, reliable and large-capacity information storage system is provided for the liquid crystal driver.
In order to solve the above technical problem, the present invention further provides a scanning control system, which includes the liquid crystal driver, the control device and the liquid crystal type filter as described above; the digital part of the liquid crystal driver is electrically connected with the control device; the analog part of the liquid crystal driver is electrically connected with the liquid crystal type filter; the liquid crystal type filter is internally provided with a plurality of liquid crystal wave plates.
Compared with the prior art, the scanning control system has the following beneficial effects.
The technical scheme adopts a scanning control system which comprises the liquid crystal driver, the control device and the liquid crystal type optical filter; the digital part of the liquid crystal driver is electrically connected with the control device; the analog part of the liquid crystal driver is electrically connected with the liquid crystal type filter; the scanning control system can synchronously control the plurality of liquid crystal wave plates in the liquid crystal type filter at high precision and has the advantages of high precision, high stability, high response speed and low cost.
In order to solve the above technical problem, the present invention further provides a control method of a scanning control system, which performs synchronous control on a liquid crystal wave plate in a liquid crystal type optical filter in the scanning control system through the liquid crystal driver.
Compared with the prior art, the control method of the scanning control system has the following beneficial effects.
The technical scheme adopts a control method of the scanning control system, and the method adopts the technical means that the liquid crystal driver synchronously controls the liquid crystal wave plate in the liquid crystal type optical filter in the scanning control system; the control method synchronously controls a plurality of liquid crystal wave plates in the liquid crystal type filter or independently controls any one of the liquid crystal wave plates through the user interaction interface module of the control device, so that the control method provides convenience for experimenters to apply the scanning control system.
Drawings
A liquid crystal driver and a scan control system thereof according to the present invention will be described in further detail with reference to the accompanying drawings and detailed description.
FIG. 1 is a diagram of the hardware connection of the scan control system according to the present invention.
Fig. 2 is a flowchart illustrating a control method of a scan control system according to the present invention.
The reference numerals are explained below.
1. A liquid crystal driver;
1-1, the numerical part;
1-1-1, an FPGA module;
1-1-1-1, NIOS II soft core;
1-1-1-2, DAC drive circuit;
1-1-2, a communication module;
1-1-3、EPCS;
1-1-4、SDRAM;
1-1-5, IO module;
1-1-6, a power module;
1-2, an analog part;
1-2-1, DAC module;
1-2-2, an amplifying circuit module;
1-2-3, a filtering module;
1-2-4 and 2.5V voltage-stabilized power supply modules;
1-2-5, 5V voltage-stabilized power supply module;
1-2-6, positive and negative 15V stabilized voltage supply module;
1-2-7, a voltage transformation module;
1-3, IO connectors;
1-4, a power interface;
2. a control device;
3. a liquid crystal type filter;
4. 220V to 15V power supply.
Detailed Description
As shown in fig. 1 and 2, the present invention provides a liquid crystal driver and a scan control system thereof. The liquid crystal driver 1 synchronously controls a plurality of liquid crystal wave plates through the FPGA module 1-1-1 and the DAC module 1-2-1 in a multi-path way; the FPGA module 1-1-1 comprises an FPGA chip, a DAC driving circuit 1-1-1-2 is arranged on the FPGA chip, and the FPGA chip realizes parallel control on the DAC driving circuit 1-1-1-2 by using a Verilog language; the DAC driving circuit 1-1-1-2 drives the DAC module 1-2-1; the DAC module 1-2-1 adopts an 8-path 24-bit digital analog conversion chip; the DAC module 1-2-1 synchronously controls the plurality of liquid crystal wave plates by synchronously controlling the voltages at two ends of the plurality of liquid crystal wave plates.
The internal circuit of the FPGA chip can be directly changed through the Verilog language, so that the DAC driving circuit 1-1-1-2 on the FPGA chip is controlled, the control speed of the DAC driving circuit 1-1-1-2 on a digital analog conversion chip in the DAC module 1-2-1 is effectively improved, and the response time is shortened. The 8-path 24-bit digital-to-analog conversion chip effectively increases the number of channels for controlling the liquid crystal wave plates on the liquid crystal driver 1, so that the liquid crystal driver 1 can simultaneously control 5 to 7 liquid crystal wave plates in the liquid crystal filter 3, and the liquid crystal filter 3 can meet the technical standard of observing the solar magnetic field.
As shown in fig. 1, the liquid crystal driver 1 of the present embodiment includes a digital section 1-1 and an analog section 1-2; the digital part 1-1 of the liquid crystal driver 1 comprises a communication module 1-1-2, an FPGA module 1-1-1 and an IO module 1-1-5; the communication module 1-1-2 comprises an RS422 interface; the FPGA module 1-1-1 comprises an FPGA chip which is a control chip; a DAC driving circuit 1-1-1-2 and an NIOS II soft core 1-1-1-1 are arranged on the FPGA chip; the IO module 1-1-5 is used for receiving the input from the FPGA module 1-1-1 and outputting the input to the analog part 1-2 of the liquid crystal driver 1; the analog part 1-2 of the liquid crystal driver 1 comprises a DAC module 1-2-1, an amplifying circuit module 1-2-2 and a filtering module 1-2-3; the DAC module 1-2-1 is used for receiving digital signal input from an IO module 1-1-5 in a digital part 1-1 of the liquid crystal driver 1; converting the digital signal into a square wave analog signal and outputting the square wave analog signal to an amplifying circuit module 1-2-2; the amplifying circuit module 1-2-2 is used for amplifying the analog signal from the DAC module 1-2-1 and outputting the amplified analog signal to the filtering module 1-2-3; and the filtering module 1-2-3 is used for filtering the amplified input voltage from the amplifying circuit module 1-2-2, reducing the overshoot amplitude and the ripple, and inputting the processed signal to the liquid crystal wave plate.
NIOS II soft core 1-1-1-1 is a second generation on-chip programmable soft core processor from Altera corporation. Although the bottom layer of the NIOS II soft core 1-1-1-1 is Verilog language, the C language can directly develop the NIOS II soft core 1-1-1, and the C language is used for realizing the writing of related algorithms and communication related functions, so that the complexity of pure hardware programming can be reduced, and the working efficiency is improved. Voltage square wave signals are generated in the DAC module 1-2-1, amplified in the amplifying circuit 1-2-2, reduced in amplitude and ripple waves through the filtering module 1-2-3, loaded at two ends of each liquid crystal wave plate through Input and Output connectors (IO connectors) 1-3, and used for regulating and controlling birefringence of each liquid crystal wave plate.
As shown in fig. 1, the analog part 1-2 of the liquid crystal driver 1 of the present embodiment includes a positive and negative 15V regulated power supply module 1-2-6, a 5V regulated power supply module 1-2-5, and a 2.5V regulated power supply module 1-2-4, wherein the positive and negative 15V regulated power supply module 1-2-6 supplies power to the amplification circuit module 1-2-2; the 5V stabilized voltage power supply module 1-2-5 supplies electric energy to the DAC module 1-2-1; the 2.5V voltage-stabilized power supply module 1-2-4 provides reference voltage to the amplifying circuit module 1-2-2 and the DAC module 1-2-1.
The application of the positive and negative 15V stabilized power supply modules 1-2-6, the 5V stabilized power supply modules 1-2-5 and the 2.5V stabilized power supply modules 1-2-4 effectively improves the stability of the voltage loaded at two ends of each liquid crystal wave plate, thereby improving the stability of the liquid crystal filter 3 on the premise of not influencing the accuracy. The positive and negative 15V stabilized voltage supply module 1-2-6 is connected with a 220V to 15V power supply 1-4 through a power interface 1-4 of the liquid crystal driver 1. The 5V stabilized power supply module 1-2-5 supplies power from the positive and negative 15V stabilized power supply module 1-2-6, the 5V stabilized power supply module 1-2-5 is electrically connected with the positive and negative 15V stabilized power supply module 1-2-6 through the voltage transformation module 1-2-7, wherein the voltage transformation module 1-2-7 is used for voltage conversion. The power supply of the FPGA module 1-1-1 is provided by a 5V voltage-stabilized power supply module 1-2-5 of the analog part 1-2 through a power supply module 1-1-6 of the digital part 1-1.
The signal transmission of the FPGA module 1-1-1 and the DAC module 1-2-1 of the embodiment adopts an optical coupling isolation circuit. The optical coupling isolation circuit effectively reduces the interference of digital signals to analog signals and also achieves the purpose of improving the stability of voltage output.
The amplifier circuit module 1-2-2 of the present embodiment employs a two-stage coupling amplifier circuit. The two-stage coupling type amplifying circuit can remove direct current components, reduce square wave signal bias voltage and achieve the purpose of improving the stability of output voltage, thereby improving the stability of the liquid crystal type optical filter 3.
Data transmission is carried out between the NIOS II soft core 1-1-1-1 and the DAC driving circuit 1-1-1-2 by adopting an AVALON bus, and data storage and interaction are realized by adopting a FIFO mode in the data transmission. The AVALON bus can realize the interaction between the C language and the Verilog language, reduce the complexity of pure hardware programming and improve the working efficiency.
The DAC driving circuit 1-1-1-2 of the present embodiment employs a high-precision power conversion circuit. The high-precision power conversion circuit is favorable for stable voltage output, thereby improving the stability and precision of the liquid crystal type filter 3.
The NIOS II soft core 1-1-1 of the present embodiment is electrically connected to EPCS1-1-3, and the NIOS II soft core 1-1-1-1 is electrically connected to SDRAM 1-1-4. EPCS1-1-3 is used to store configuration information for FGPA, while SDRAM1-1-4 serves to augment the internal storage of the FPGA. The EPCS1-1-3 and SDRAM1-1-4 provide a stable, reliable and large capacity information storage system for liquid crystal drives.
A scanning control system of the present embodiment includes the liquid crystal driver 1, the control device 2, and the liquid crystal type filter 3 as described above; the digital part 1-1 of the liquid crystal driver 1 is electrically connected with the control device 2; the analog part 1-2 of the liquid crystal driver 1 is electrically connected to the liquid crystal type filter 3; the liquid crystal filter 3 is provided with a plurality of liquid crystal waveplates therein.
The experimenter realizes the interaction with the liquid crystal driver 1 through the control device 2 to synchronously control the plurality of liquid crystal wave plates in the liquid crystal type filter 3 with high precision. The scanning control system also comprises an interaction method of the control device 2 and the liquid crystal driver 1, and visual control of a plurality of liquid crystal wave plates in the liquid crystal type filter 3 is achieved. Preferably, the control device 2 is a computer terminal; the computer terminal includes a user interaction interface module. An experimenter can synchronously adjust and control the liquid crystal wave plates in the liquid crystal filter 3 in real time and with high precision through the user interaction interface module.
As shown in fig. 1 and 2, in the control method of the scanning control system according to the present embodiment, the liquid crystal driver 1 synchronously controls the liquid crystal wave plate in the liquid crystal filter 3 in the scanning control system. The control method controls the input voltage of the liquid crystal wave plate through a voltage output channel control module of a user interaction interface module of the control device 2. The control process is that at least one voltage output channel is selected as a control object by a voltage output channel control module of a user interaction interface module of the control device 2; then the voltage output channel control module electrically connected with each voltage output channel sends an instruction to the selected voltage output channel; then, the selected voltage output channel in the voltage output channels corresponding to the liquid crystal wave plates one by one adjusts the voltage input of the liquid crystal wave plate corresponding to the selected voltage output channel; thereby realizing the control of the input voltage of the liquid crystal wave plate in the liquid crystal type filter 3 through the user interaction interface module of the control device 2. The voltage output channel control module is electrically connected with the liquid crystal driver 1 through serial port output. The function of the serial port output is to transmit the control instruction received by the voltage output channel control module of the user interface module to the liquid crystal driver 1.
Example one
As shown in fig. 2, when a user controls the voltages at two ends of a plurality of liquid crystal wave plates in the liquid crystal type optical filter through a user interface of a computer terminal, the user clicks a start icon first, and the scanning control system enters an initialization stage and then tries to establish a communication connection. If the communication connection can not be established, displaying information of communication establishment failure and error report on a display screen; and if the communication is successfully established, circularly detecting the loading voltage value of the liquid crystal wave plate and identifying the user interface function control instruction.
When the liquid crystal wave plate is subjected to cyclic detection of the voltage value, the user interface displays the voltage value, after the voltage value is displayed, whether a user sends a program finishing instruction is inquired, if the inquiry result is yes, the program is closed, and if the inquiry result is not yes, the liquid crystal loading voltage value is subjected to cyclic monitoring and displaying.
After entering the user interface function control command identification, a user is inquired whether to send a voltage amplitude incremental adjustment command, a voltage incremental adjustment command and/or a voltage amplitude storage command. If the query result is yes, entering a corresponding voltage amplitude incremental adjusting module, a voltage incremental adjusting module and/or a voltage amplitude storage module; if no, the query is continued. After the voltage amplitude incremental adjustment and the voltage incremental adjustment are finished, the voltage output channel control, the voltage output parameter adjustment and the voltage output amplitude adjustment are sequentially carried out, and the voltage output parameters are output to the liquid crystal wave plate through the serial port. The voltage output channel control can select the liquid crystal wave plates to be controlled by selecting the voltage output channel, and the voltage output channels correspond to the liquid crystal wave plates one to one. Then, whether the user finishes the program or not is inquired, and if the inquiry result is 'yes', the program is closed; and if the query result is 'no', returning to the user interface function control instruction identification interface. Similarly, after the voltage amplitude storage is finished, data storage is carried out, after the data storage is finished, whether the user finishes the program or not is inquired, and if the inquiry result is 'yes', the program is closed; and if the query result is 'no', returning to the user interface function control instruction identification interface.

Claims (7)

1. The liquid crystal driver is characterized in that the liquid crystal driver (1) controls a plurality of liquid crystal wave plates in a multi-path synchronous mode through a field programmable gate array module (1-1-1) and a digital-to-analog converter module (1-2-1); the field programmable gate array module (1-1-1) comprises a field programmable gate array chip, a digital-to-analog converter driving circuit (1-1-1-2) is arranged on the field programmable gate array chip, and the field programmable gate array chip realizes the parallel control of the digital-to-analog converter driving circuit (1-1-1-2) by using a Verilog hardware description language; the digital-to-analog converter driving circuit (1-1-1-2) drives the digital-to-analog converter module (1-2-1); the digital-analog converter module (1-2-1) adopts an 8-path 24-bit digital-analog conversion chip; the digital-to-analog converter module (1-2-1) synchronously controls the plurality of liquid crystal wave plates by synchronously controlling the voltages at two ends of the plurality of liquid crystal wave plates;
the liquid crystal driver (1) comprises a digital part (1-1) and an analog part (1-2); the digital part (1-1) of the liquid crystal driver (1) comprises a communication module (1-1-2), a field programmable gate array module (1-1-1) and an input/output module (1-1-5); wherein the content of the first and second substances,
the communication module (1-1-2) comprises an RS422 interface;
the field programmable gate array chip is a control chip; a network element input and output subsystem II soft core (1-1-1-1) is arranged on the field programmable gate array chip; the input and output module (1-1-5) is used for receiving the input from the field programmable gate array module (1-1-1) and outputting the input to the analog part (1-2) of the liquid crystal driver (1);
the analog part (1-2) of the liquid crystal driver (1) comprises a digital-analog converter module (1-2-1), an amplifying circuit module (1-2-2) and a filtering module (1-2-3); wherein the content of the first and second substances,
the digital-to-analog converter module (1-2-1) is used for receiving digital signal input from an input-output module (1-1-5) in a digital part (1-1) of the liquid crystal driver (1); converting the digital signal into a square wave analog signal and outputting the square wave analog signal to an amplifying circuit module (1-2-2);
the amplifying circuit module (1-2-2) is used for amplifying the analog signal from the digital-to-analog converter module (1-2-1) and outputting the amplified analog signal to the filtering module (1-2-3);
the filtering module (1-2-3) is used for filtering the amplified input voltage from the amplifying circuit module (1-2-2), reducing the overshoot amplitude and the ripple, and inputting the processed signal to the liquid crystal wave plate;
the analog part (1-2) of the liquid crystal driver (1) comprises a positive and negative 15V voltage-stabilized power supply module (1-2-6), a 5V voltage-stabilized power supply module (1-2-5) and a 2.5V voltage-stabilized power supply module (1-2-4),
the positive and negative 15V voltage-stabilized power supply module (1-2-6) supplies electric energy to the amplification circuit module (1-2-2);
the 5V stabilized power supply module (1-2-5) supplies electric energy to the digital-to-analog converter module (1-2-1);
the 2.5V voltage-stabilized power supply module (1-2-4) provides a reference voltage for the amplifying circuit module (1-2-2) and the digital-to-analog converter module (1-2-1);
and the signal transmission of the field programmable gate array module (1-1-1) and the digital-to-analog converter module (1-2-1) adopts an optical coupling isolation circuit.
2. A liquid crystal driver as claimed in claim 1, wherein: the amplifying circuit module (1-2-2) adopts a two-stage coupling type amplifying circuit.
3. A liquid crystal driver as claimed in claim 1, wherein: and an Avalon bus is adopted between the network element input and output subsystem II soft core (1-1-1-1) and the digital-to-analog converter driving circuit (1-1-1-2) for data transmission, and the data transmission realizes the storage and interaction of data in a first-in first-out mode.
4. A liquid crystal driver as claimed in claim 1, wherein: the digital-to-analog converter driving circuit (1-1-1-2) adopts a power conversion circuit.
5. A liquid crystal driver as claimed in claim 1, wherein: the network element input and output subsystem II soft core (1-1-1-1) is electrically connected with the serial memory (1-1-3), and the network element input and output subsystem II soft core (1-1-1-1) is electrically connected with the synchronous dynamic random access memory (1-1-4).
6. A scanning control system, characterized in that it comprises a liquid crystal driver (1) according to any one of claims 1 to 5, a control device (2) and a liquid crystal type filter (3); the digital part (1-1) of the liquid crystal driver (1) is electrically connected with a control device (2); the analog part (1-2) of the liquid crystal driver (1) is electrically connected with the liquid crystal type filter (3); the liquid crystal type filter (3) is internally provided with a plurality of liquid crystal wave plates.
7. A control method of a scanning control system, characterized in that a liquid crystal waveplate in a liquid crystal type filter (3) in the scanning control system of claim 6 is synchronously controlled by a liquid crystal driver according to any one of claims 1 to 5.
CN201811487368.XA 2018-12-06 2018-12-06 Liquid crystal driver, scanning control system and control method of system Expired - Fee Related CN109324560B (en)

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