CN109299531A - Electromagnetical transient emulation method and device - Google Patents
Electromagnetical transient emulation method and device Download PDFInfo
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Abstract
The embodiment of the present invention provides a kind of electromagnetical transient emulation method and device.The described method includes: in a manner of being layered multiple instructions-multithreading while obtaining voltage coefficient matrix, current coefficient matrix and the control amount at current time of the electric system under each simulating scenes;Voltage coefficient matrix, current coefficient matrix and the control amount under each simulating scenes according to the current time obtain the node injection historical current vector at current time simultaneously;Historical current vector is injected according to the node at the current time under each simulating scenes simultaneously and the node voltage under each simulating scenes is calculated in the node admittance matrix at current time.In the above method, the calculating homoorganicity between simulating scenes is utilized, realizes the fine grained parallel between simulating scenes, the efficiency of more scene batch EM transient calculations can be greatly promoted.Also, there is generality, can flexible deployment to parallel computation environments such as CPU, GPU, FPGA.
Description
Technical field
The present invention relates to power system transient simulation technical fields, in particular to a kind of electromagnetical transient emulation method
And device.
Background technique
In practical power systems electromagnetic transient simulation, influence transient emulation efficiency factor mainly have model complexity and
Two aspects of system scale.In terms of model complexity, calculation amount can be reduced to promote computational efficiency by simplifying modeling;
In terms of simulation scale, the simulation process of single bulk power grid can be accelerated by modes such as the parallel, fine grained parallels of subnetting.
In recent years, with the continuous development of alternating current-direct current power grid, there are more application scenarios in electromagnetic transient simulation, also right
Electromagnetic transient simulation, which accelerates to calculate, proposes new challenge.For example, the dynamic security analysis over-borrowing to power grid helps N-1 to verify, and
N-1 verification needs to carry out simulation analysis to the concurrent magnanimity scene number of same example.Traditional N-1 verification is mainly directed towards alternating current
Net is limited only with electromechanical transient simulation by electromechanical transient simulation precision, which can not be applied to alternating current-direct current power grid
Analysis tool.But verified for the N-1 of ac and dc systems, it is necessary to use detailed electromagnetic transient simulation.Therefore, to sea
The demand for measuring the batch calculating acceleration of electromagnetic transient simulation scene is more urgent.In addition, more scene electromagnetic transient simulations are also to sweep
The basic copying of the applications such as frequency analysis, parameter optimization, Monte Carlo simulation, distributed generation resource analysis.Therefore, research is directed to
The acceleration of magnanimity scene electromagnetic transient simulation has significance.
Summary of the invention
In order to overcome above-mentioned deficiency in the prior art, the embodiment of the present invention to be designed to provide a kind of electro-magnetic transient imitative
True method and device can realize the fine grained parallel between simulating scenes using the calculating homoorganicity between simulating scenes, can
Greatly promote the efficiency of more scene batch EM transient calculations.Also, can flexible deployment to parallel computations such as CPU, GPU, FPGA
Environment.
In a first aspect, the embodiment of the present invention provides a kind of electromagnetical transient emulation method, which comprises
In a manner of being layered multiple instructions-multithreading while obtaining current time of the electric system under each simulating scenes
Voltage coefficient matrix, current coefficient matrix and control amount;
Simultaneously according to voltage coefficient matrix, current coefficient matrix and the control at the current time under each simulating scenes
The node measured to current time injects historical current vector;
Historical current vector and the section at current time are injected according to the node at the current time under each simulating scenes simultaneously
The node voltage under each simulating scenes is calculated in point admittance matrix.
Optionally, in embodiments of the present invention, described at the same under each simulating scenes according to the electricity at the current time
Pressure coefficient matrix, current coefficient matrix and control amount obtain the step of node injection historical current vector at current time and include:
According to the voltage coefficient matrix at current time, current coefficient matrix, control amount and last moment element port voltage
And the historical current vector of each element is calculated in last moment element port current vector;
Current time node injection historical current vector is calculated according to the historical current vector of each element.
Optionally, in embodiments of the present invention, it is described according to the voltage coefficient matrix at current time, current coefficient matrix,
The history electricity of each element is calculated in control amount and last moment element port voltage and last moment element port current vector
The mode of flow vector include: be grouped single instrction-multithreading form of calculation be calculated the equivalent historical current of element promise to
Amount;
The side of current time node injection historical current vector is calculated in the historical current vector according to each element
Formula include: based on the equivalent historical current vector of each element promise with atom add operation be calculated node inject historical current to
Amount.
Optionally, in embodiments of the present invention, it when obtaining the voltage coefficient matrix at the current time, while obtaining each
Each element promise at the current time under a simulating scenes equivalet conductance matrix, the method also includes:
According to the historical current vector of each element, current time element port voltage and each element promise equivalet conductance
Current time element port current vector is calculated in matrix, to calculate the node voltage of subsequent time.
Optionally, in embodiments of the present invention, described at the same according to the node at the current time under each simulating scenes infuse
Enter historical current vector and the step of the node voltage under each simulating scenes is calculated in the node admittance matrix at current time
Include:
Obtain the sparse factor matrix of the node admittance matrix at current time;
According to the sparse factor matrix of the node admittance matrix at current time and current time node inject historical current to
Node voltage is calculated in amount.
Optionally, in embodiments of the present invention, the sparse factor matrix of the node admittance matrix for obtaining current time
Mode include:
Sparse Factorization is carried out to the node admittance matrix, with obtain current time node admittance matrix it is sparse
Factor matrix, the sparse factor matrix include sparse unit upper triangular matrix, sparse unit lower triangular matrix and sparse diagonal
Matrix;Alternatively,
Described in being obtained in the database for being stored with sparse factor matrix of the node admittance matrix after sparse Factorization
The sparse factor matrix of node admittance matrix.
Optionally, in embodiments of the present invention, described that sparse Factorization is carried out to the node admittance matrix, to obtain
The mode of the sparse factor matrix of the node admittance matrix at current time includes:
The sparse factor square of the node admittance matrix under each simulating scenes is obtained in a manner of being layered multiple instructions-multithreading
Battle array.
Optionally, in embodiments of the present invention, the sparse factor matrix of the node admittance matrix according to current time
And current time node injection historical current vector is calculated the mode of node voltage and includes:
Using sparse node admittance matrix of the former generation back substitution process based on current time sparse factor matrix and it is current when
It carves node injection historical current vector and node voltage is calculated.
Optionally, in embodiments of the present invention, the method also includes:
When node admittance matrix changes, using single instrction multithreading calculation to the section in each simulating scenes
Point admittance matrix is modified to obtain the node admittance matrix at current time.
Second aspect, the embodiment of the present invention provide a kind of electromagnetic transient simulation device, and described device includes:
Module is obtained, in a manner of being layered multiple instructions-multithreading while obtaining electric system in each simulating scenes
Under current time voltage coefficient matrix, current coefficient matrix and control amount;
First computing module, for simultaneously under each simulating scenes according to the voltage coefficient matrix at the current time,
Current coefficient matrix and control amount obtain the node injection historical current vector at current time;
Second computing module, for simultaneously according to the node at the current time under each simulating scenes inject historical current to
The node voltage under each scene is calculated in the node admittance matrix at amount and current time.
In terms of existing technologies, the invention has the following advantages:
The embodiment of the present invention provides a kind of electro-magnetic transient method and device.First in a manner of being layered multiple instructions-multithreading
Voltage coefficient matrix, current coefficient matrix and the control at current time of the electric system under each simulating scenes are obtained simultaneously
Amount.Then simultaneously under each simulating scenes according to voltage coefficient matrix, current coefficient matrix and the control at the current time
The node measured to current time injects historical current vector.Section last while according to the current time under each simulating scenes
The node voltage under each simulating scenes is calculated in point injection historical current vector and the node admittance matrix at current time.?
In aforesaid way, the calculating homoorganicity between simulating scenes is utilized, realizes the fine grained parallel between simulating scenes, it can be significantly
Promote the efficiency of more scene batch EM transient calculations.Also, there is generality, can flexible deployment to CPU, GPU, FPGA etc. simultaneously
Row calculates environment.
For enable invention above objects, features, and advantages be clearer and more comprehensible, present pre-ferred embodiments are cited below particularly, and
Cooperate appended attached drawing, is described in detail below.
Detailed description of the invention
In order to illustrate the technical solution of the embodiments of the present invention more clearly, below will be to needed in the embodiment attached
Figure is briefly described, it should be understood that the following drawings illustrates only certain embodiments of the present invention, therefore is not construed as pair
The restriction of range for those of ordinary skill in the art without creative efforts, can also be according to this
A little attached drawings obtain other relevant attached drawings.
Fig. 1 is the block diagram of emulator provided in an embodiment of the present invention.
Fig. 2 is one of the flow diagram of electromagnetical transient emulation method provided in an embodiment of the present invention.
Fig. 3 is the flow diagram for the sub-step that step S120 includes in Fig. 2.
Fig. 4 is the flow diagram for the sub-step that step S140 includes in Fig. 2.
Fig. 5 is the two of the flow diagram of electromagnetical transient emulation method provided in an embodiment of the present invention.
Fig. 6 is the three of the flow diagram of electromagnetical transient emulation method provided in an embodiment of the present invention.
Fig. 7 is one of the block diagram of electromagnetic transient simulation device provided in an embodiment of the present invention.
Fig. 8 is the two of the block diagram of electromagnetic transient simulation device provided in an embodiment of the present invention.
Icon: 100- emulator;110- memory;120- storage control;130- processor;200- electro-magnetic transient is imitative
True device;210- obtains module;The first computing module of 220-;230- update module;The second computing module of 240-.
Specific embodiment
Below in conjunction with attached drawing in the embodiment of the present invention, technical solution in the embodiment of the present invention carries out clear, complete
Ground description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.Usually exist
The component of the embodiment of the present invention described and illustrated in attached drawing can be arranged and be designed with a variety of different configurations herein.Cause
This, is not intended to limit claimed invention to the detailed description of the embodiment of the present invention provided in the accompanying drawings below
Range, but it is merely representative of selected embodiment of the invention.Based on the embodiment of the present invention, those skilled in the art are not doing
Every other embodiment obtained under the premise of creative work out, shall fall within the protection scope of the present invention.
It should also be noted that similar label and letter indicate similar terms in following attached drawing, therefore, once a certain Xiang Yi
It is defined in a attached drawing, does not then need that it is further defined and explained in subsequent attached drawing.Meanwhile of the invention
In description, term " first ", " second " etc. are only used for distinguishing description, are not understood to indicate or imply relative importance.
Before the technical solution that the present application proposes in the embodiment of the present invention, magnanimity scene is solved at present and accelerates to calculate
Conventional thought be to realize that task level batch is parallel by magnanimity computing resource (such as multi-core CPU and PC cluster) to accelerate.With CPU
In platform to calculate equipment, the common ground of such method is the calculating that single example is realized using single thread or process, and
By concurrent multiple CPU line journeys or process, the task-level parallelism that more scenes calculate is realized.In the many-cores computing platform such as GPU, one
Method as type is to pass through building Kernel stream by distributing different computing tasks to different calculating Kernel
(Kernel Stream) tissue parallel computation, essence is still task-level parallelism.
It can be seen that above-mentioned magnanimity scenes in parallel algorithm uses only task level coarse grain parallelism, it can during realization
Theoretical degree of parallelism can be much unable to reach.Due between calculating task in the form of assembly line or competitive way realize, calculate money
There is a large amount of waitings, competition or conflict between source.It is limited to computing resource, and degree of parallelism larger in single calculating task calculation amount
When lower, whole calculating tasks are almost serial to be completed.In addition, computing resource is only distributed in task level level, finger cannot achieve
It enables the computing resource fine granularity of grade configure, leads to the computing resource waste inside single calculating task to a certain extent.
For defect present in above scheme, be inventor being obtained after practicing and carefully studying as a result,
Therefore, the discovery procedure of the above problem and the solution that hereinafter embodiment of the present invention is proposed regarding to the issue above, all
It should be the contribution that inventor makes the application during the application.
Fig. 1 is please referred to, Fig. 1 is the block diagram of emulator 100 provided in an embodiment of the present invention.The embodiment of the present invention
Described in emulator 100 may be, but not limited to, desktop computer.The emulator 100 can be CPU, GPU or FPGA
Etc. Heterogeneous Computings equipment.The emulator 100 includes: memory 110, storage control 120 and processor 130.
It is directly or indirectly electrically connected between the memory 110, storage control 120 and each element of processor 130,
To realize the transmission or interaction of data.For example, these elements can pass through one or more communication bus or signal wire between each other
It realizes and is electrically connected.Electromagnetic transient simulation device 200 is stored in memory 110, the electromagnetic transient simulation device 200 includes
At least one can be stored in the software function module in the memory 110 in the form of software or firmware (firmware).Institute
Software program and module that processor 130 is stored in memory 110 by operation are stated, such as the electromagnetism in the embodiment of the present invention
Transient emulation device 200, thereby executing various function application and data processing, i.e. electromagnetism in the realization embodiment of the present invention is temporary
State emulation mode.
Wherein, the memory 110 may be, but not limited to, random access memory (Random Access
Memory, RAM), read-only memory (Read Only Memory, ROM), programmable read only memory (Programmable
Read-Only Memory, PROM), erasable read-only memory (Erasable Programmable Read-Only
Memory, EPROM), electricallyerasable ROM (EEROM) (Electric Erasable Programmable Read-Only
Memory, EEPROM) etc..Wherein, memory 110 is for storing program, the processor 130 after receiving and executing instruction,
Execute described program.The processor 130 and other possible components can control the access of memory 110 in the storage
It is carried out under the control of device 120.
The processor 130 may be a kind of IC chip, the processing capacity with signal.Above-mentioned processor
130 can be general processor, including central processing unit (Central Processing Unit, CPU), network processing unit
(Network Processor, NP) etc..It can also be digital signal processor (DSP), specific integrated circuit (ASIC), scene
Programmable gate array (FPGA) either other programmable logic device, discrete gate or transistor logic, discrete hardware group
Part.It may be implemented or execute disclosed each method, step and the logic diagram in the embodiment of the present invention.General processor can be with
It is that microprocessor or the processor are also possible to any conventional processor etc..
It is appreciated that structure shown in FIG. 1 is only to illustrate, emulator 100 may also include it is more than shown in Fig. 1 or
Less component, or with the configuration different from shown in Fig. 1.Each component shown in Fig. 1 can using hardware, software or its
Combination is realized.
Referring to figure 2., Fig. 2 is one of the flow diagram of electromagnetical transient emulation method provided in an embodiment of the present invention.Institute
Method is stated applied to the emulator 100.The detailed process of electromagnetical transient emulation method is described in detail below.
Step S110 in a manner of being layered multiple instructions-multithreading while obtaining electric system under each simulating scenes
Voltage coefficient matrix, current coefficient matrix and the control amount at current time.
In the present embodiment, control system, nonlinear characteristic part and component models are mainly completed by step S110 to join
Number updates.Wherein, the control amount C (t) at current time then can be obtained in the update for completing control system, completes nonlinear characteristic
Part and component models parameter update the voltage coefficient matrix P (t) that current time then can be obtained, the current system matrix
Q(t)。
Optionally, current time can also be obtained simultaneously after completing nonlinear characteristic part and the update of component models parameter
Each element promise equivalet conductance matrix G (t), so as to subsequent use.
It is alternatively possible to by the node voltage U of last momentn(t- Δ t) is used as output quantity, is then based on and is specifically related to
The physical component model of element obtain each element promise equivalet conductance matrix G (t) at current time, voltage coefficient matrix P (t),
Current system matrix Q (t) and control amount C (t).
Since the calculation process of different parameters or signal, computations and the responsible diversity factor of calculating are very big, this part
For Heterogeneous Computing.This part can with one group of directed acyclic set of graphs (Layered Directed Acyclic Graphs,
LDAGs) G is modeled.Wherein, the calculating of single parameter is described with directed acyclic subgraph Gi.Wherein, the vertex of Gi represents basic
Computations, directed edge represent the data dependence relation of computations.Figure G is layered according to vertex (elementary instruction), shape
At layering directed acyclic graph.For magnanimity scene, calculating graph structure is identical between each scene, and finally, the calculating of step S110 can
It is layering multiple instructions-multithreading (Multiple according to data dependence relation tissue between the layering result of magnanimity isomorphic graphs and vertex
Instruction multiple threads, MIMT) form of calculation.It is lower to can avoid degree of parallelism in the prior art as a result,
The problem of, and since computing resource is only distributed in task level level, cannot achieve the computing resource fine granularity configuration of instruction-level,
The deficiency of computing resource waste inside caused single calculating task.
Step S120, while according to voltage coefficient matrix, the current coefficient at the current time under each simulating scenes
Matrix and control amount obtain the node injection historical current vector at current time.
Referring to figure 3., Fig. 3 is the flow diagram for the sub-step that step S120 includes in Fig. 2.Step S120 may include
Sub-step S121 and sub-step S122.
Sub-step S121, according to the voltage coefficient matrix at current time, current coefficient matrix, control amount and last moment member
The historical current vector of each element is calculated in part port voltage and last moment element port current vector.
In the present embodiment, after obtaining above-mentioned parameter, an element can be calculated in conjunction with above-mentioned parameter and formula (1)
History (promise equivalence) current vector.Wherein, first preset formula are as follows:
Ine(t)=P (t) U (t- Δ t)+Q (t) I (t- Δ t)+C (t) (1)
Wherein, Ine(t) indicate that the historical current vector of each element, P (t) indicate voltage coefficient matrix, (t- Δ t) is indicated U
The element port voltage of last moment, Q (t) indicate current coefficient matrix, and (t- Δ t) last moment node injects historical current to I
Vector, C (t) indicate control amount.
Sub-step S122, according to the historical current vector of each element be calculated current time node inject historical current to
Amount.
In the present embodiment, connection relationship of the grouped component in power system network can be based on current time each element
Historical current vector be calculated current time node injection historical current vector In.Wherein, node inject historical current to
Measure InIt is history (promise equivalence) the accumulative contribution of current vector to each node of per moment whole element.
Part calculating is all the same for whole element calculation formula, therefore calculation process isomorphism.It therefore can be single to be grouped
The form of calculation of instruction-multithreading (Single instruction multiple threads, SIMT) is calculated element and goes through
History (promise equivalence) current vector Ine(t).Then node injection historical current vector I is calculated with atom add operationn。
Step S140, while according to the node at the current time under each simulating scenes injection historical current vector and currently
The node voltage under each simulating scenes is calculated in the node admittance matrix at moment.
Referring to figure 4., Fig. 4 is the flow diagram for the sub-step that step S140 includes in Fig. 2.Step S140 may include
Sub-step S141 and sub-step S142.
Sub-step S141 obtains the sparse factor matrix of the node admittance matrix at current time.
In the present embodiment, the mode of the sparse factor matrix of the node admittance matrix for obtaining current time includes:
Sparse Factorization is carried out to the node admittance matrix, to obtain the sparse factor square of the node admittance matrix at current time
Battle array;Alternatively, described in being obtained in the database for being stored with sparse factor matrix of the node admittance matrix after sparse Factorization
The sparse factor matrix of node admittance matrix.Wherein, the sparse factor matrix includes in the sparse unit after Factorization
Triangular matrix, sparse unit lower triangular matrix and sparse diagonal matrix.
Optionally, described that sparse Factorization is carried out to the node admittance matrix, it is led with the node for obtaining current time
The mode of sparse factor matrix of matrix received includes: to be obtained under each simulating scenes in a manner of being layered multiple instructions-multithreading
The sparse factor matrix of node admittance matrix.
The Factorization calculating process of single sparse matrix can be equivalent to layering directed acyclic graph Gfact.In more scenes in parallel
In Simulation Application, magnanimity scene can be usually derived by the parameter or change in topology of single example.Wherein, in node analysis block
Under frame, change in topology can also be simulated by switch element.Therefore, different scenes be formed by node admittance matrix typically be provided with it is identical
Sparsity structure.Specifically for such situation, the sparse Factorization batch of sparse matrix is solved and can be organized as to magnanimity isomorphism
Calculate figure GfactProcessing.It optionally, can be according to the layering result of magnanimity isomorphic graphs and vertex when carrying out sparse Factorization
Between data dependence relation tissue be layering multiple instructions-multithreading (Multiple Instructions Multiple Threads)
The form of calculation of MIMT.
In the embodiment of the present embodiment, to reduce calculation amount, the degree of parallelism in calculating process is promoted, for magnanimity field
Scape is formed by node admittance matrix progress predecomposition to different topology parameter during each scene simulation first, is pre-stored
It deposits and numbers.Specifically, for the emulation of s scene, each simulating scenes simulation process interior joint admittance matrix has w kind.Root
According to the size of w, different processing methods is taken.
If w is smaller, that is, correspond to situation (such as AC system N-1 failure that network topology change is little in the calculating of single scene
Analysis, or the current transformer network using equalization model modeling), then before emulation, s*w sparse format of preparatory Mass production is deposited
The upper and lower triangular matrix of storage.In this fashion, which, which calculates, belongs to the one-time calculation before emulation starts, that is to say, that
It only needs to calculate once, be then saved in database.It is needed in simulation process in use, then directly from database
Obtain sparse factor matrix corresponding with node admittance matrix.Calculating of this part calculation amount relative to entire transient emulation process
Amount, the part time-consuming can be ignored.
If w is very big, that is, correspond to single scene calculate in the very big situation of network topology change (as containing compared with Multi- Switch number,
And using the current transformer network of detailed switch element modeling), then lot-size gene decomposable process is put into the solution stream of each time step
Journey, i.e., each time step will carry out primary sparse Factorization to node admittance matrix.
Sub-step S142 is injected according to the sparse factor matrix of the node admittance matrix at current time and current time node
Node voltage is calculated in historical current vector.
Optionally, the sparse factor matrix of the node admittance matrix according to current time and the injection of current time node
The mode that node voltage is calculated in historical current vector includes: to utilize sparse node of the former generation back substitution process based on current time
Node voltage is calculated in sparse factor matrix and current time node the injection historical current vector of admittance matrix.
In the present embodiment, to a node admittance matrix Yn(t) after carrying out sparse Factorization, current time can be obtained
Node admittance matrix Yn(t) sparse factor matrix Lfact(t)、Dfact(t)、Ufact(t).Wherein, Lfact(t) sparse list is indicated
Position lower triangular matrix, Dfact(t) sparse diagonal matrix, U are indicatedfact(t) sparse unit upper triangular matrix is indicated.Traditional Factor minute
Solving resulting lower triangular matrix L is not unit lower triangular matrix, therefore is related to greatly during node voltage is calculated
Measure division arithmetic.Since the calculation amount of floating number division is much larger than multiplication, division should be separated herein, and as far as possible will be complete
Portion's division arithmetic executes parallel.Therefore lower triangular matrix L is further broken into three angular moments under sparse unit in the present embodiment
Battle array Lfact(t) and sparse diagonal matrix Dfact(t)。
After completing sparse Factorization, the network node voltage equation Y based on current timenUn=InCalculate node electricity
Press Un.Wherein, YnThe as node admittance matrix Y at current timen(t).Network node voltage equation YnUn=InIt can be deformed into:
(Lfact(t)Dfact(t)Ufact(t))Un=In.Following three parts can be divided into specific solution procedure:
Z=(Lfact(t))-1In (2)
Y=(Dfact(t))-1z (3)
Un=(Ufact(t))-1y (4)
Wherein, formula (3) is the division arithmetic of a fine grained parallel, and using one group of SIMT division, (single instrction is multi-thread
Journey division) calculate form realize.Formula (2) and formula (4) respectively correspond former generation and back substitution process, before process can be equivalent to
Generation and back substitution tree (a kind of directed acyclic graph structures), shown in basic calculating such as formula (5) representated by vertex, it may be assumed that
oijIt indicates that triangle is poised for battle and (if being applied in formula (2), corresponds to sparse unit lower triangular matrix Lfact(t);If answering
For in formula (4), then corresponding to sparse unit upper triangular matrix Ufact(t)) nonzero element that the i-th row jth arranges in.I-th row member
The calculation amount of the basic calculating member of element is determined by the non-zero entry quantity of the row;X indicates each Computing Meta in former generation (or back substitution tree)
Results of intermediate calculations, b is expressed as the right hand item of former generation back substitution tree (for former generation tree, b In;For back substitution tree, b y.
In magnanimity scene calculating process, the directed acyclic graph that different scenes former generation back substitution process is formed is isomorphism, because
This, can be organized in the whole former generation back substitution solution procedure of step S140 as the calculating of following three parts: former generation process layering is oriented
Acyclic figure, the parallel division of grouping SIMT, back substitution process are layered directed acyclic graph.
Fig. 5 is the two of the flow diagram of electromagnetical transient emulation method provided in an embodiment of the present invention.Step S140 it
Before, the method can also include step S130.
Step S130, when node admittance matrix changes, using single instrction multithreading calculation to each emulation
Node admittance matrix in scene is modified to obtain the node admittance matrix at current time.
In the present embodiment, node admittance matrix Yn(t) sparse format storage can be used.It is led in any element promise equivalence
After the matrix G (t) that receives changes, node admittance matrix Yn(t) structure does not change, and only element relevant to G (t) is related.
Therefore, to node admittance matrix Yn(t) corrected Calculation can be organized to calculate for a multiple instructions multithreading, that is, pass through atom adding
Method operation updates Yn(t) coherent element in.
Fig. 6 is the three of the flow diagram of electromagnetical transient emulation method provided in an embodiment of the present invention.The method may be used also
To include step S150.
Step S150, according to the historical current vector of each element, current time element port voltage and each element promise
Current time element port current vector is calculated in the equivalet conductance matrix that pauses, to calculate the node voltage of subsequent time.
In the present embodiment, current time element port current vector can also be calculated according to formula (6).Formula (6) is as follows:
I (t)=G (t) U (t)+Ine(t) (6)
Wherein, I (t) indicates that current time element port current vector, G (t) indicate element promise Equivalent admittance matrix, U
(t) current time element port voltage is indicated.
In above process, if node admittance matrix changes, at this time step S120 and step S130 can simultaneously into
Row.Also, when node admittance matrix changes, sparse Factorization need to be carried out to node admittance matrix, in order to obtain
Node voltage.If node admittance matrix does not change, step S130 can not be executed, can also be not required in simulation process
It to change to node admittance matrix, the corresponding sparse matrix of node admittance matrix can be directly obtained from database.
Fig. 7 is one of the block diagram of electromagnetic transient simulation device 200 provided in an embodiment of the present invention.The electromagnetism is temporary
State simulator 200 may include obtaining module 210, the first computing module 220 and the second computing module 240.
Module 210 is obtained, in a manner of being layered multiple instructions-multithreading while obtaining electric system in each emulation field
Voltage coefficient matrix, current coefficient matrix and the control amount at the current time under scape.
In the present embodiment, the module 210 that obtains is used to execute the step S110 in Fig. 2, about the acquisition module
210 specific descriptions are referred to the description of step S110 in Fig. 2.
First computing module 220, for simultaneously under each simulating scenes according to the voltage coefficient square at the current time
Battle array, current coefficient matrix and control amount obtain the node injection historical current vector at current time.
In the present embodiment, first computing module 220 is used to execute the step S120 in Fig. 2, about described first
The specific descriptions of computing module 220 are referred to the description of step S120 in Fig. 2.
Second computing module 240, for injecting history electricity according to the node at the current time under each simulating scenes simultaneously
The node voltage under each scene is calculated in flow vector and the node admittance matrix at current time.
In the present embodiment, second computing module 240 is used to execute the step S140 in Fig. 2, about described second
The specific descriptions of computing module 240 are referred to the description of step S140 in Fig. 2.
Fig. 8 is the two of the block diagram of electromagnetic transient simulation device 200 provided in an embodiment of the present invention.The electromagnetism is temporary
State simulator 200 further includes update module 230.
Update module 230, for when node admittance matrix changes, using single instrction multithreading calculation to each
Node admittance matrix in a simulating scenes is modified to obtain the node admittance matrix at current time.
In the present embodiment, the update module 230 is used to execute the step S130 in Fig. 5, about the update module
230 specific descriptions are referred to the description of step S130 in Fig. 5.
In the present embodiment, first computing module 220 be also used to the historical current vector according to each element, when
Current time element port current vector is calculated in preceding moment element port voltage and each element promise equivalet conductance matrix, with
Just the node voltage of subsequent time is calculated.
In the present embodiment, first computing module 220 is also used to execute the step S150 in Fig. 6, about described
The specific descriptions of one computing module 220 are referred to the description of step S150 in Fig. 6.
In conclusion the embodiment of the present invention provides a kind of electro-magnetic transient method and device.It is multi-thread to be layered multiple instructions-first
The mode of journey obtains voltage coefficient matrix, the current coefficient matrix at current time of the electric system under each simulating scenes simultaneously
And control amount.Then simultaneously under each simulating scenes according to voltage coefficient matrix, the current coefficient matrix at the current time
And control amount obtains the node injection historical current vector at current time.It is last simultaneously according to current under each simulating scenes when
The node under each simulating scenes is calculated in the node injection historical current vector and the node admittance matrix at current time at quarter
Voltage.In the above method, the calculating homoorganicity between simulating scenes is utilized, realizes fine granularity between simulating scenes simultaneously
Row, can greatly promote the efficiency of more scene batch EM transient calculations.Also, have generality, can flexible deployment to CPU,
The parallel computation environments such as GPU, FPGA.
The foregoing is only a preferred embodiment of the present invention, is not intended to restrict the invention, for the skill of this field
For art personnel, the invention may be variously modified and varied.All within the spirits and principles of the present invention, made any to repair
Change, equivalent replacement, improvement etc., should all be included in the protection scope of the present invention.
Claims (10)
1. a kind of electromagnetical transient emulation method, which is characterized in that the described method includes:
In a manner of being layered multiple instructions-multithreading while obtaining the voltage at current time of the electric system under each simulating scenes
Coefficient matrix, current coefficient matrix and control amount;
It is obtained under each simulating scenes according to voltage coefficient matrix, current coefficient matrix and the control amount at the current time simultaneously
Node to current time injects historical current vector;
Historical current vector is injected according to the node at the current time under each simulating scenes simultaneously and the node at current time is led
The node voltage under each simulating scenes is calculated in matrix of receiving.
2. the method according to claim 1, wherein it is described at the same under each simulating scenes according to described current
Voltage coefficient matrix, current coefficient matrix and the control amount at moment obtain the step of the node injection historical current vector at current time
Suddenly include:
According to the voltage coefficient matrix at current time, current coefficient matrix, control amount and last moment element port voltage and on
The historical current vector of each element is calculated in one moment element port current vector;
Current time node injection historical current vector is calculated according to the historical current vector of each element.
3. according to the method described in claim 2, it is characterized in that,
It is described according to the voltage coefficient matrix at current time, current coefficient matrix, control amount and last moment element port voltage
And it includes: to be grouped and singly refer to that the mode of the historical current vector of each element, which is calculated, in last moment element port current vector
The equivalent historical current vector of element promise is calculated in order-multithreading form of calculation;
The mode packet of current time node injection historical current vector is calculated in the historical current vector according to each element
It includes: node injection historical current vector is calculated with atom add operation based on the equivalent historical current vector of each element promise.
4. according to the method described in claim 2, it is characterized in that, when obtaining the voltage coefficient matrix at current time,
Each element promise equivalet conductance matrix for obtaining the current time under each simulating scenes simultaneously, the method also includes:
According to the historical current vector of each element, current time element port voltage and each element promise equivalet conductance matrix
Current time element port current vector is calculated, to calculate the node voltage of subsequent time.
5. the method according to claim 1, wherein described while according to the current time under each simulating scenes
Node injection historical current vector and the node admittance matrix at current time be calculated the node under each simulating scenes electricity
The step of pressure includes:
Obtain the sparse factor matrix of the node admittance matrix at current time;
Historical current is injected to meter according to the sparse factor matrix of the node admittance matrix at current time and current time node
Calculation obtains node voltage.
6. according to the method described in claim 5, it is characterized in that, it is described obtain current time node admittance matrix it is sparse
The mode of factor matrix includes:
Sparse Factorization is carried out to the node admittance matrix, to obtain the sparse factor of the node admittance matrix at current time
Matrix, the sparse factor matrix include sparse unit upper triangular matrix, sparse unit lower triangular matrix and sparse diagonal matrix;
Alternatively,
The node is obtained in the database for being stored with sparse factor matrix of the node admittance matrix after sparse Factorization
The sparse factor matrix of admittance matrix.
7. according to the method described in claim 6, it is characterized in that, described carry out sparse Factor minute to the node admittance matrix
It solves, includes: in a manner of obtaining the sparse factor matrix of node admittance matrix at current time
The sparse factor matrix of the node admittance matrix under each simulating scenes is obtained in a manner of being layered multiple instructions-multithreading.
8. according to the method described in claim 5, it is characterized in that, the node admittance matrix according to current time it is sparse
Factor matrix and current time node injection historical current vector are calculated the mode of node voltage and include:
Sparse factor matrix and current time using sparse node admittance matrix of the former generation back substitution process based on current time
Node voltage is calculated in point injection historical current vector.
9. according to the method described in claim 5, it is characterized in that, the method also includes:
When node admittance matrix changes, the node in each simulating scenes is led using single instrction multithreading calculation
Matrix of receiving is modified to obtain the node admittance matrix at current time.
10. a kind of electromagnetic transient simulation device, which is characterized in that described device includes:
Module is obtained, in a manner of being layered multiple instructions-multithreading while obtaining electric system under each simulating scenes
Voltage coefficient matrix, current coefficient matrix and the control amount at current time;
First computing module, for simultaneously under each simulating scenes according to voltage coefficient matrix, the electric current at the current time
Coefficient matrix and control amount obtain the node injection historical current vector at current time;
Second computing module, for simultaneously according to the node at the current time under each simulating scenes inject historical current vector and
The node voltage under each scene is calculated in the node admittance matrix at current time.
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