CN109283762A - Display panel and its driving method - Google Patents

Display panel and its driving method Download PDF

Info

Publication number
CN109283762A
CN109283762A CN201811332375.2A CN201811332375A CN109283762A CN 109283762 A CN109283762 A CN 109283762A CN 201811332375 A CN201811332375 A CN 201811332375A CN 109283762 A CN109283762 A CN 109283762A
Authority
CN
China
Prior art keywords
switch
electric property
property coupling
scanning line
horizontal scanning
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201811332375.2A
Other languages
Chinese (zh)
Other versions
CN109283762B (en
Inventor
黄笑宇
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HKC Co Ltd
Original Assignee
HKC Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by HKC Co Ltd filed Critical HKC Co Ltd
Priority to CN201811332375.2A priority Critical patent/CN109283762B/en
Priority to PCT/CN2019/073190 priority patent/WO2020093604A1/en
Publication of CN109283762A publication Critical patent/CN109283762A/en
Application granted granted Critical
Publication of CN109283762B publication Critical patent/CN109283762B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3648Control of matrices with row and column drivers using an active matrix
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3674Details of drivers for scan electrodes
    • G09G3/3677Details of drivers for scan electrodes suitable for active matrices only

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Nonlinear Science (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Optics & Photonics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

This application provides a kind of display panel and its driving method, the display panel a, comprising: substrate;Multiple data lines are set on the substrate;Multi-strip scanning line is set on the substrate, and the data line cross-over configuration, and defines multiple pixel regions;Multiple pixel units are set on the pixel region, and respectively with the data line and the scan line electric property coupling;Each pixel region includes an at least pixel circuit;During the first scanning, the first cut-in voltage is applied to the pixel unit on 2n-1 horizontal scanning line;And during the second scanning, the second cut-in voltage is applied to the pixel unit on 2n horizontal scanning line;Wherein, adjacent 2n-1 horizontal scanning line and 2n horizontal scanning line are coupled to same data line, and n is positive number;Wherein, first cut-in voltage is identical with the size of the second electric-opening pressure, and the charging time of first cut-in voltage is equal to the charging time of second cut-in voltage.

Description

Display panel and its driving method
Technical field
The application is related to pixel circuit and relevant driving method, more particularly to a kind of display surface about display field Plate and its driving method.
Background technique
Liquid crystal display panel is usually by a color membrane substrates (Color Filter, CF), a thin film transistor (TFT) array base Plate (Thin Film Transistor Array Substrate, TFT Array Substrate) and one it is configured at two bases Liquid crystal layer (Liquid Crystal Layer, LCD) between plate is constituted, its working principle is that by two panels glass substrate Apply driving voltage to control the rotation of the liquid crystal molecule of liquid crystal layer, the light refraction of backlight module is come out and generates picture.
And for liquid crystal display for save the cost, many panel factories can all use bigrid (dual Gate) framework at present, Data line (data line) halves, i.e. source electrode crystal grain soft mode engagement number can halve, and scan line (scan line) is double, i.e., It is double that grid crystal grain soft mode engages number, but the engagement of grid crystal grain soft mode is cheaper than the engagement of source electrode crystal grain soft mode very much, so Generally bigrid (dual Gate) framework can reduce cost.But for image quality, bigrid (dual Gate) framework is logical 1+2line or 2line inversion mode can often be arranged in pairs or groups to drive, can bring about the bright concealed wire problem under low ash rank in this way.
When bigrid (dual Gate) framework collocation 2line inversion mode, it may appear that bright concealed wire problem.When charging, from just When polarity is to positive polarity or negative polarity to negative polarity, no cross-pressure or cross-pressure very little, the charging of this pixel will be than more saturated, brightness It will be expected brightness;When from positive polarity to negative polarity or by negative polarity to positive polarity, cross-pressure is bigger, and because resistance The reason of capacitive load, voltage switching need the time of climbing, and pixel charge ratio is less likely saturated at this time, are not achieved expected bright Degree, can be partially dark, just will appear bright concealed wire, can be obvious under low ash rank.
Therefore, the main purpose of the application is to provide a kind of display panel and its driving method, with more optimized above-mentioned institute The problem mentioned.
Summary of the invention
In order to solve the above-mentioned technical problem, the purpose of the application is, provides a kind of display panel and its driving method, Display panel bright concealed wire problem under low ash rank in double gate structures can be eliminated, to improve the display image quality of display panel.
It the purpose of the application and solves its technical problem and adopts the following technical solutions to realize.It is proposed according to the application A kind of display panel, comprising: a substrate;Multiple data lines are set on the substrate;Multi-strip scanning line is set to described On substrate, and the data line cross-over configuration, and define multiple pixel regions;Multiple pixel units are set to the pixel region On, and respectively with the data line and the scan line electric property coupling;Each pixel region includes an at least pixel circuit, the picture Plain circuit includes: a first switch, and the one first capacitor unit of a control terminal electric property coupling of the first switch, described first opens One first node of a first end electric property coupling closed, the one first diode list of a second end electric property coupling of the first switch Member;One second switch, one second capacitor cell of a control terminal electric property coupling of the second switch, the one of the second switch One end electrically receives one first input voltage signal, first node described in a second end electric property coupling of the second switch;One Third switchs, first capacitor unit described in a control terminal electric property coupling of the third switch, and the one first of the third switch Hold one second node of electric property coupling, the one second diode unit of a second end electric property coupling of the third switch;One the 4th opens It closes, a first end of the second capacitor cell described in a control terminal electric property coupling of the 4th switch, the 4th switch is electrical Receive one second input voltage signal, second node described in a second end electric property coupling of the 4th switch;In the first scanning Period applies the first cut-in voltage to the pixel unit on 2n-1 horizontal scanning line;And during the second scanning, to 2n row The pixel unit in scan line applies the second cut-in voltage;Wherein, adjacent 2n-1 horizontal scanning line and 2n row scan Line is coupled to same data line, and n is positive number;Wherein, the size of first cut-in voltage and the second electric-opening pressure is phase Together, and the charging time of first cut-in voltage be equal to second cut-in voltage charging time;Wherein, the described 1st One 2n-1 horizontal scanning line of polar body unit other end electric property coupling, n is positive number;The second diode unit other end electrical property coupling A 2n horizontal scanning line is connect, n is positive number.
The another object of the application is a kind of display panel, comprising: a substrate;Multiple data lines are set to the substrate On;Multi-strip scanning line is set on the substrate, and the data line cross-over configuration, and defines multiple pixel regions;Multiple pictures Plain unit is set on the pixel region, and respectively with the data line and the scan line electric property coupling;Each pixel region packet An at least pixel circuit is included, the pixel circuit includes: a first switch, a control terminal electric property coupling one of the first switch First capacitor unit, one first node of a first end electric property coupling of the first switch, a second end of the first switch One first diode unit of electric property coupling;One second switch, one second capacitor of a control terminal electric property coupling of the second switch One first end of unit, the second switch electrically receives one first input voltage signal, a second end of the second switch First node described in electric property coupling;One third switchs, first capacitor list described in a control terminal electric property coupling of the third switch Member, one second node of a first end electric property coupling of the third switch, a second end electric property coupling one of the third switch Second diode unit;One the 4th switchs, the second capacitor cell described in a control terminal electric property coupling of the 4th switch, described One first end of the 4th switch electrically receives one second input voltage signal, a second end electric property coupling institute of the 4th switch State second node;During the first scanning, the first cut-in voltage is applied to the pixel unit on 2n-1 horizontal scanning line;? During two scannings, the second cut-in voltage is applied to the pixel unit on 2n horizontal scanning line;During the first scanning, to 2n-1 The pixel unit on horizontal scanning line applies the first input voltage;And during the second scanning, on 2n horizontal scanning line The pixel unit applies the second input voltage;Wherein, adjacent 2n-1 horizontal scanning line and 2n horizontal scanning line are coupled to together One data line, n are positive number;Wherein, first cut-in voltage and the size of second cut-in voltage are identical, and described the The charging time of one cut-in voltage is equal to the charging time of second cut-in voltage;Wherein, first input voltage and institute It is different for stating the size of the second input voltage, and the charging time of first input voltage is greater than second input voltage Charging time;Wherein, the one 2n-1 horizontal scanning line of the first diode unit other end electric property coupling, n is positive number;Described Two diode unit other end electric property couplings, one 2n horizontal scanning line, n is positive number;Wherein, the pixel unit is array row Column;The pixel unit is rectangular shape.
The further object of the application is a kind of driving method of display panel, comprising: provides a substrate;Multiple data lines, It is set on the substrate;Multi-strip scanning line is set on the substrate, and the data line cross-over configuration, and is defined more A pixel region;Multiple pixel units are set on the pixel region, respectively with the data line and the scan line electrical property coupling It connects;Each pixel region includes an at least pixel circuit, and the pixel circuit includes: a first switch, and the one of the first switch One first capacitor unit of control terminal electric property coupling, one first node of a first end electric property coupling of the first switch, described The one first diode unit of a second end electric property coupling of one switch;One second switch, the control terminal electricity of the second switch Property one second capacitor cell of coupling, a first end of the second switch electrically receives one first input voltage signal, described the First node described in one second end electric property coupling of two switches;One third switch, a control terminal electrical property coupling of the third switch Connect the first capacitor unit, one second node of a first end electric property coupling of the third switch, the one of the third switch One second diode unit of second end electric property coupling;One the 4th switchs, described in a control terminal electric property coupling of the 4th switch Second capacitor cell, a first end of the 4th switch electrically receive one second input voltage signal, the 4th switch Second node described in one second end electric property coupling;During the first scanning, the pixel unit on 2n-1 horizontal scanning line is applied Add the first cut-in voltage;During the second scanning, the second cut-in voltage is applied to the pixel unit on 2n horizontal scanning line;? During first scanning, the first input voltage is applied to the pixel unit on 2n-1 horizontal scanning line;And in the second sweep time Between, the second input voltage is applied to the pixel unit on 2n horizontal scanning line;Wherein, adjacent 2n-1 horizontal scanning line and 2n horizontal scanning line is coupled to same data line, and n is positive number;Wherein, first cut-in voltage and second cut-in voltage Size is identical, and the charging time of first cut-in voltage is equal to the charging time of second cut-in voltage;Wherein, institute It is different for stating the size of the first input voltage and second input voltage, and the charging time of first input voltage is greater than The charging time of second input voltage;Wherein, the one 2n-1 row of the first diode unit other end electric property coupling is swept Line is retouched, n is positive number;Second diode unit other end electric property coupling, the one 2n horizontal scanning line, n is positive number.
In the embodiment of the application, on same data line, 2n-1 horizontal scanning line and 2n horizontal scanning line two The polarity of a pixel unit is identical.
It is different in the polarity of same scan line, adjacent pixel unit in the embodiment of the application.
In the embodiment of the application, pixel unit and 2n+1 on same data line, 2n-1 horizontal scanning line The polarity of pixel unit on horizontal scanning line is different, and on the pixel unit and 2n horizontal scanning line on 2n-2 horizontal scanning line The polarity of pixel unit is different.
In the embodiment of the application, the polarity of the identical pixel unit of adjacent two frames picture is different.
In the embodiment of the application, the driving method is described during the first scanning, on 2n-1 horizontal scanning line Pixel unit the step of applying the first input voltage include: low through adjusting provided by the first capacitor unit one A low-voltage signal ramp-up cycle provided by the decline cycle of voltage signal and second capacitor cell;And it thus generates The signal period of first input voltage.
In the embodiment of the application, the driving method is described during the second scanning, on 2n horizontal scanning line The step of second input voltage of pixel unit application includes: through a low electricity provided by the adjustment first capacitor unit Press provided by the ramp-up cycle and second capacitor cell of signal a low-voltage signal decline cycle;And thus generate institute State the signal period of the second input voltage.
In the embodiment of the application, the driving method, in same data line, 2n-1 horizontal scanning line and 2n row The polarity of two pixel units in scan line is identical.
The application can eliminate display panel bright concealed wire problem under low ash rank in double gate structures, to improve display panel Display image quality.
Detailed description of the invention
Fig. 1 is exemplary display panel partial schematic diagram.
Fig. 2 is exemplary scan line charging schematic diagram.
Fig. 3 is exemplary scan line cut-in voltage schematic diagram.
Fig. 4 a is the display panel partial schematic diagram of one embodiment of the application.
Fig. 4 b is the drive circuit schematic diagram of the display panel of one embodiment of the application.
Fig. 5 a is the scan line cut-in voltage schematic diagram of one embodiment of the application.
Fig. 5 b is the charging schematic diagram of one embodiment first capacitor unit of the application and the second capacitor cell.
Fig. 5 c is the scan line input voltage schematic diagram of one embodiment of the application.
Fig. 6 is the driving method flow chart of the display panel of one embodiment of the application.
Specific embodiment
The explanation of following embodiment is to can be used to the particular implementation of implementation to illustrate the application with reference to additional schema Example.The direction term that the application is previously mentioned, such as "upper", "lower", "front", "rear", "left", "right", "inner", "outside", " side " Deng being only the direction with reference to annexed drawings.Therefore, the direction term used be to illustrate and understand the application, rather than to Limit the application.
Attached drawing and explanation are considered inherently illustrative, rather than restrictive.The similar list of structure in the figure Member is to be given the same reference numerals.In addition, in order to understand and be convenient for description, the size and thickness of each component shown in the accompanying drawings are It is arbitrarily shown, but the application is without being limited thereto.
In the accompanying drawings, for clarity, the thickness in layer, film, panel, region etc. is exaggerated.In the accompanying drawings, in order to understand With convenient for description, the thickness of some layer and region is exaggerated.It will be appreciated that ought such as layer, film, region or substrate component quilt Referred to as " " another component "upper" when, the component can be directly on another component, or there may also be middle groups Part.
In addition, in the description, unless explicitly described as opposite, otherwise word " comprising " will be understood as meaning to wrap The component is included, but is not excluded for any other component.In addition, in the description, " above " means to be located at target group Part either above or below, and be not intended to must be positioned on the top based on gravity direction.
Some vocabulary is used in specification and claim to censure specific component.The general skill in this field Art personnel are, it is to be appreciated that electronic equipment set manufacturer may call same component with different nouns.This specification and application The scope of the patents is not in such a way that the difference of title is as difference component, but with the difference of component functionally as area Other benchmark.In the whole text, the " comprising " of specification and claim mentioned in is open term, therefore should be explained At " including but not limited to ".In addition, " coupling " word is comprising any direct and indirect electrical connection herein.Cause This, if it is described herein that first device is electrically connected at second device, then representing the first device may be directly connected to second dress It sets, or is coupled indirectly to the second device by other devices or connection means.
Further to illustrate that the application is the technical means and efficacy reaching predetermined goal of the invention and being taken, below in conjunction with Attached drawing and preferred embodiment, to a kind of display panel and its driving method proposed according to the application, specific embodiment, knot Structure, feature and its effect, detailed description is as follows.
Fig. 1 is exemplary display panel partial schematic diagram, and Fig. 2 is exemplary scan line charging schematic diagram and Fig. 3 is Exemplary scan line cut-in voltage schematic diagram.It please also refer to Fig. 1, Fig. 2 and Fig. 3, a kind of exemplary display panel 10, packet It includes: a substrate (not shown);Multiple data lines D1~D7 is set on the substrate;Multi-strip scanning line G1~G6 is set to institute State on substrate, and with the data line cross-over configuration, define multiple pixel regions;Multiple pixel units 111,112, are set to institute It states on substrate, and is located in the pixel region, the pixel unit 111,112 is electric with the data line and the scan line respectively Property coupling;And multiple active switches 140, it is respectively coupled to corresponding data line, scan line and pixel unit 111,112;Wherein, Adjacent 2n-1 horizontal scanning line and 2n horizontal scanning line are coupled to same data line, and n is positive number, this circuit design also known as half Source electrode drive circuit may be, for example, two column inversion modes (as shown in Figure 2) to the configuration of the pixel voltage of such circuit, when charging, Pixel unit 111 on panel, 112 scanning cut-in voltage, from positive polarity to positive polarity or when negative polarity is to negative polarity, between Without cross-pressure or cross-pressure very little, the charging of pixel unit 111,112 in this case will be than more saturated, the panel that finally presents The parameters such as brightness can achieve expected display effect.
But when pixel unit 111 on panel, 112 scanning cut-in voltage from positive polarity to negative polarity or by negative polarity to When positive polarity, i.e. reverse, 111 cross-pressure of pixel unit on display panel is opposite can be bigger, the switching of voltage need through Spend " climbing " time of boost or depressurization, and odd even pixel unit 111,112 scanning cut-in voltage (A-B) are identical, at this time as Charging of the charging of plain unit 111 for pixel unit 112 will not be saturated depending on opposite, that is, the brightness of pixel unit 111 Expected effect is not achieved in equal display parameters, can most show on display panel 10 finally partially secretly, such as 200 institute of picture element display area The problem of showing, and then forming bright concealed wire, influence the quality and display effect of display panel 10.
The display surface that Fig. 4 a is the display panel partial schematic diagram of one embodiment of the application, Fig. 4 b is one embodiment of the application The drive circuit schematic diagram and Fig. 5 a of plate are the scan line cut-in voltage schematic diagram of one embodiment of the application.It please also refer to figure 4a, Fig. 4 b and Fig. 5 a, in the embodiment of the application, a kind of display panel 20, comprising: a substrate (not shown);A plurality of number According to line D1~D7, it is set on the substrate;Multi-strip scanning line G1~G6 is set on the substrate, with the data line D1 ~D7 cross-over configuration, and define multiple pixel regions 100;Multiple pixel units 120,122,124,126, are set to the pixel In area 100, and respectively with the data line D1~D3 and scan line G1~G2 electric property coupling;Each pixel region 100 includes An at least pixel circuit 21, the pixel circuit 21 include: a first switch T10, a control terminal of the first switch T10 One first node of a first end 101b electric property coupling of 101a electric property coupling one first capacitor unit C1, the first switch T10 The one first diode unit 150 of a second end 101c electric property coupling of P1 (n), the first switch T10;One second switch T20, The a control terminal 201a electric property coupling one second capacitor cell C2 of the second switch T20, the one first of the second switch T20 201b is held electrically to receive described in a second end 201c electric property coupling of one first input voltage signal CI1, the second switch T20 First node P1 (n);First capacitor described in a control terminal 301a electric property coupling of one third switch T30, the third switch T30 The one second node P2 (n) of a first end 301b electric property coupling of unit C1, the third switch T30, the third switch T30's One second end 301c electric property coupling, one second diode unit 160;One the 4th switch T40, a control of the 4th switch T40 A first end 401b of the second capacitor cell C2, the 4th switch T40 described in 401a electric property coupling is held electrically to receive one second Input voltage signal CI2, the described 4th opens second node P2 (n) described in a second end 401c electric property coupling of the pass T40;First During scanning, the first cut-in voltage (A1-B1) is applied to the pixel unit 122,126 on 2n-1 horizontal scanning line G1;And During the second scanning, the second cut-in voltage (A1-B1) is applied to the pixel unit 120,124 on 2n horizontal scanning line G2; Wherein, adjacent 2n-1 horizontal scanning line G1 and 2n horizontal scanning line G2 is coupled to same data line, and n is positive number;Wherein, described First cut-in voltage (A1-B1) and the size of the second electric-opening pressure (A1-B1) are identical, and first cut-in voltage (A1-B1) charging time t is equal to the charging time t of second cut-in voltage (A1-B1);Wherein, first diode 150 other end electric property coupling of unit one 2n-1 horizontal scanning line G1, n are positive number;Second diode unit, 160 other end electricity Property coupling one 2n horizontal scanning line G2, n is positive number;The first diode unit 150 and the second diode unit 160 are One-way conduction diode, can be to avoid the first input voltage end signal CI1 and the end the second input voltage signal CI2 Static discharge is counter to be filled to grid drive chip, and exception is caused.
In the embodiment of the application, pixel unit 122,126 is odd-numbered scan lines G1 (i.e. 2n-1 horizontal scanning line) The pixel unit coupled.The pixel list that pixel unit 120,124 is coupled by even-line interlace line G2 (i.e. 2n horizontal scanning line) Member.
In the embodiment of the application, in same data line D2,2n-1 horizontal scanning line G1 and 2n horizontal scanning line G2 On two pixel units 122,124 polarity it is identical.
It is different in the polarity of same scan line G1, adjacent pixel unit 122,126 in the embodiment of the application.
In the embodiment of the application, on same data line D2,2n-1 horizontal scanning line G1 pixel unit 122 with The polarity of pixel unit 128 on 2n+1 horizontal scanning line G3 is different, and the pixel unit 120 on 2n-2 horizontal scanning line G2 with The polarity of pixel unit 130 on 2n horizontal scanning line G4 is different.
In the embodiment of the application, the identical pixel unit (120,130) (122,128) of adjacent two frames picture Polarity it is different.
Fig. 5 b is that the charging schematic diagram and Fig. 5 c of one embodiment first capacitor unit of the application and the second capacitor cell are this Apply for the scan line input voltage schematic diagram of an embodiment.It please also refer to Fig. 4 a, Fig. 4 b, Fig. 5 a, Fig. 5 b and Fig. 5 c, in this Shen In an embodiment please, a kind of display panel 20, comprising: a substrate (not shown);Multiple data lines D1~D7 is set to described On substrate;Multi-strip scanning line G1~G6 is set on the substrate, and data line D1~D7 cross-over configuration, and is defined Multiple pixel regions 100;Multiple pixel units 120,122,124,126, are set on the pixel region 100, and respectively with it is described Data line D1~D3 and scan line G1~G2 electric property coupling;Each pixel region 100 includes an at least pixel circuit 21, described Pixel circuit 21 includes: one first capacitor of a control terminal 101a electric property coupling of first switch a T10, the first switch T10 The one first node P1 (n) of a first end 101b electric property coupling of unit C1, the first switch T10, the first switch T10's One second end 101c electric property coupling, one first diode unit 150;One second switch T20, a control of the second switch T20 A first end 201b of 201a electric property coupling one second capacitor cell C2, the second switch T20 is held electrically to receive one first defeated Enter voltage signal CI1, first node P1 (n) described in a second end 201c electric property coupling of the second switch T20;One third is opened Close T30, first capacitor unit C1, the third switch T30 described in a control terminal 301a electric property coupling of the third switch T30 A first end 301b electric property coupling one second node P2 (n), the third switch T30 a second end 301c electric property coupling one Second diode unit 160;Second described in a control terminal 401a electric property coupling of one the 4th switch T40, the 4th switch T40 A first end 401b of capacitor cell C2, the 4th switch T40 electrically receive one second input voltage signal CI2, and described the Four open second node P2 (n) described in a second end 401c electric property coupling of the pass T40;During the first scanning, 2n-1 row is scanned The pixel unit 122,126 on line G1 applies the first cut-in voltage (A1-B1);During the second scanning, 2n row is scanned The pixel unit 120,124 on line G2 applies the second cut-in voltage (A1-B1);During the first scanning, 2n-1 row is swept The pixel unit 122,126 retouched on line G1 applies the first input voltage (E1-F1);And during the second scanning, to 2n The pixel unit 120,124 on horizontal scanning line G2 applies the second input voltage (E2-F2);Wherein, adjacent 2n-1 row Scan line G1 and 2n horizontal scanning line G2 is coupled to same data line, and n is positive number;Wherein, first cut-in voltage (A1-B1) It is identical, and the charging time t etc. of first cut-in voltage (A1-B1) with the size of second cut-in voltage (A1-B1) In the charging time t of second cut-in voltage (A1-B1);Wherein, first input voltage (E1-F1) and described second defeated It is different for entering the size of voltage (E2-F2), and the charging time t1 of first input voltage (E1-F1) is defeated greater than described second Enter voltage (E2-F2) charging time t2 (citing: the charging time of odd-numbered line be greater than even number line charging time, come compensate because The time that voltage switching climbing loses makes positive polarity to negative polarity or negative polarity to just so that charging effect be made to reach the same Polarity chron, charging can also reach expected, and brightness reaches desired value, rather than partially dark);Wherein, the first diode unit 150 Other end electric property coupling one 2n-1 horizontal scanning line G1, n are positive number;Second diode unit, 160 other end electric property coupling One 2n horizontal scanning line G2, n is positive number;The first diode unit 150 and the second diode unit 160 are unidirectionally to lead Logical diode, can put to avoid the electrostatic at the first input voltage end signal CI1 and the end the second input voltage signal CI2 Electric anti-filling causes exception to grid drive chip;Wherein, the pixel unit 120,122,124,126 is array arrangement;Institute Stating pixel unit 120,122,124,126 is rectangular shape.
In the embodiment of the application, pixel unit 122,126 is odd-numbered scan lines G1 (i.e. 2n-1 horizontal scanning line) The pixel unit coupled.The pixel list that pixel unit 120,124 is coupled by even-line interlace line G2 (i.e. 2n horizontal scanning line) Member.
In the embodiment of the application, in same data line D2,2n-1 horizontal scanning line G1 and 2n horizontal scanning line G2 On two pixel units 122,124 polarity it is identical.
It is different in the polarity of same scan line G1, adjacent pixel unit 122,126 in the embodiment of the application.
In the embodiment of the application, on same data line D2,2n-1 horizontal scanning line G1 pixel unit 122 with The polarity of pixel unit 128 on 2n+1 horizontal scanning line G3 is different, and the pixel unit 120 on 2n-2 horizontal scanning line G2 with The polarity of pixel unit 130 on 2n horizontal scanning line G4 is different.
In the embodiment of the application, the identical pixel unit (120,130) (122,128) of adjacent two frames picture Polarity it is different.
Fig. 5 b is please referred to, in the embodiment of the application, the first capacitor unit C1 is interrogated with a voltage (C1-D1) Number period A, and the low-voltage signal a provided;The second capacitor cell C2 has a voltage (C2-D2) signal period B, and The low-voltage signal b provided, wherein B=2A;b≥a.
Fig. 6 is the driving method flow chart of the display panel of one embodiment of the application.Refer again to Fig. 4 a, Fig. 4 b, Fig. 5 a, Fig. 5 b, Fig. 5 c and Fig. 6, in the embodiment of the application, a kind of driving method of display panel 20 a, comprising: substrate is provided (not shown);Multiple data lines D1~D7 is set on the substrate;Multi-strip scanning line G1~G6 is set on the substrate, With data line D1~D7 cross-over configuration, and multiple pixel regions 100 are defined;Multiple pixel units 120,122,124,126, Be set on the pixel region 100, respectively with the data line D1~D3 and scan line G1~G2 electric property coupling;Each picture Plain area 100 includes an at least pixel circuit 21, and the pixel circuit 21 includes: first switch a T10, the first switch T10 A control terminal 101a electric property coupling one first capacitor unit C1, the first switch T10 a first end 101b electric property coupling The one first diode unit 150 of a second end 101c electric property coupling of one first node P1 (n), the first switch T10;One The one second capacitor cell C2 of a control terminal 201a electric property coupling of two switch T20, the second switch T20, the second switch A first end 201b of T20 electrically receives a second end 201c of one first input voltage signal CI1, the second switch T20 First node P1 (n) described in electric property coupling;A control terminal 301a electric property coupling of one third switch T30, the third switch T30 The a first end 301b electric property coupling one second node P2 (n) of the first capacitor unit C1, the third switch T30, it is described The one second diode unit 160 of a second end 301c electric property coupling of third switch T30;One the 4th switch T40, the described 4th opens Close a first end 401b electricity of the second capacitor cell C2, the 4th switch T40 described in a control terminal 401a electric property coupling of T40 Property receive one second input voltage signal CI2, the described 4th open T40 pass a second end 401c electric property coupling described in second node P2(n);During the first scanning, the first cut-in voltage is applied to the pixel unit 122,126 on 2n-1 horizontal scanning line G1 (A1-B1);During the second scanning, the second cut-in voltage is applied to the pixel unit 120,124 on 2n horizontal scanning line G2 (A1-B1);During the first scanning, the first input electricity is applied to the pixel unit 122,126 on 2n-1 horizontal scanning line G1 It presses (E1-F1);And during the second scanning, it is defeated that second is applied to the pixel unit 120,124 on 2n horizontal scanning line G2 Enter voltage (E2-F2);Wherein, adjacent 2n-1 horizontal scanning line G1 and 2n horizontal scanning line G2 is coupled to same data line, and n is Positive number;Wherein, first cut-in voltage (A1-B1) is identical and described with the size of second cut-in voltage (A1-B1) The charging time t of first cut-in voltage (A1-B1) is equal to the charging time t of second cut-in voltage (A1-B1);Wherein, institute The size for stating the first input voltage (E1-F1) and second input voltage (E2-F2) is different, and first input voltage (E1-F1) charging time t1 is greater than the charging time t2 (citing: the charging of odd-numbered line of second input voltage (E2-F2) Time is greater than the charging time of even number line, to compensate the time lost by voltage switching climbing, so that charging effect be made to reach Equally, when making positive polarity to negative polarity or negative polarity to positive polarity, charging can also reach expected, and brightness reaches desired value, without It is partially dark);Wherein, one 2n-1 horizontal scanning line G1, n of 150 other end electric property coupling of the first diode unit are positive number;Institute Stating 160 other end electric property coupling of the second diode unit one 2n horizontal scanning line G2, n is positive number;The first diode unit 150 and the second diode unit 160 be one-way conduction diode, can be to avoid the end the first input voltage signal CI1 And the end the second input voltage signal CI2 static discharge it is counter fill to grid drive chip, cause exception.
In the embodiment of the application, pixel unit 122,126 is odd-numbered scan lines G1 (i.e. 2n-1 horizontal scanning line) The pixel unit coupled.The pixel list that pixel unit 120,124 is coupled by even-line interlace line G2 (i.e. 2n horizontal scanning line) Member.
Fig. 5 b is please referred to, in the embodiment of the application, the first capacitor unit C1 is interrogated with a voltage (C1-D1) Number period A, and the low-voltage signal a provided,;The second capacitor cell C2 has a voltage (C2-D2) signal period B, And the low-voltage signal b provided, wherein B=2A;b≥a.
In the embodiment of the application, the driving method is described during the first scanning, to 2n-1 horizontal scanning line G1 On the pixel unit 122,126 the step of applying the first input voltage (E1-F1) include: through adjusting the first capacitor A low-voltage signal provided by the decline cycle of a low-voltage signal a and the second capacitor cell C2 provided by unit C1 B ramp-up cycle;And thus generate the signal period t1 of first input voltage (E1-F1).
In the embodiment of the application, the driving method is described during the second scanning, on 2n horizontal scanning line G2 The pixel unit 120,124 the step of applying the second input voltage (E2-F2) include: through adjusting the first capacitor list A low-voltage signal b provided by the ramp-up cycle of a low-voltage signal a and the second capacitor cell C2 provided by first C1 Decline cycle;And thus generate the signal period t2 of second input voltage (E2-F2).
In the embodiment of the application, the driving method, in same data line D2,2n-1 horizontal scanning line G1 and The polarity of two pixel units 122,124 on 2n horizontal scanning line G2 is identical.
In some embodiments of the application, display panel may include LCD (Liquid Crystal Display) panel, Wherein LCD (Liquid Crystal Display) panel includes: switch arrays (thin film transistor, TFT) base Plate, liquid crystal layer chromatic filter layer (color filter, CF) substrate and be formed between two substrates or are at display panel OLED (Organic Light-Emitting Diode) panel or QLED (Quantum Dots Light-Emitting Diode) panel.
Referring to FIG. 6, providing a substrate in process S611.
Referring to FIG. 6, in process S612, multiple data lines are set on the substrate.
Referring to FIG. 6, multi-strip scanning line is set on the substrate in process S613, intersects with the data line and match It sets, and defines multiple pixel regions.
Referring to FIG. 6, multiple pixel units are set on the pixel region in process S614, respectively with the data Line and the scan line electric property coupling.
Referring to FIG. 6, each pixel region includes an at least pixel circuit in process S615, the pixel circuit includes: One first switch, the one first capacitor unit of a control terminal electric property coupling of the first switch, the one first of the first switch Hold one first node of electric property coupling, the one first diode unit of a second end electric property coupling of the first switch;One second opens It closes, one second capacitor cell of a control terminal electric property coupling of the second switch a, first end of the second switch is electrically connected with Receive one first input voltage signal, first node described in a second end electric property coupling of the second switch;One third switch, institute State first capacitor unit described in a control terminal electric property coupling of third switch, a first end electric property coupling one of the third switch Second node, the one second diode unit of a second end electric property coupling of the third switch;One the 4th switch, the described 4th opens One first end of the second capacitor cell described in the control terminal electric property coupling closed, the 4th switch electrically receives one second input Voltage signal, it is described 4th switch a second end electric property coupling described in second node.
Referring to FIG. 6, in process S616, during the first scanning, to the pixel unit on 2n-1 horizontal scanning line Apply the first cut-in voltage.
Referring to FIG. 6, during the second scanning, being applied to the pixel unit on 2n horizontal scanning line in process S617 Add the second cut-in voltage.
Referring to FIG. 6, in process S618, during the first scanning, to the pixel unit on 2n-1 horizontal scanning line Apply the first input voltage.
Referring to FIG. 6, during the second scanning, being applied to the pixel unit on 2n horizontal scanning line in process S619 Add the second input voltage.
The application can eliminate display panel bright concealed wire problem under low ash rank in double gate structures, to improve display panel Display image quality.
" in some embodiments " and " in various embodiments " terms are used repeatedly etc..The term is not usually Refer to identical embodiment;But it may also mean that identical embodiment.The words such as "comprising", " having " and " comprising " are synonymous Word, unless its context meaning shows other meanings.
The above is only embodiments herein, not makes any form of restriction to the application, although the application It has been disclosed in a preferred embodiment above, however is not limited to the application, any person skilled in the art is not taking off From within the scope of technical scheme, when the technology contents using the disclosure above make a little change or are modified to equivalent variations Equivalent embodiment, but all contents without departing from technical scheme, the technical spirit according to the application implemented to above Any simple modification, equivalent change and modification made by example, in the range of still falling within technical scheme.

Claims (10)

1. a kind of display panel characterized by comprising
One substrate;
Multiple data lines are set on the substrate;
Multi-strip scanning line is set on the substrate, and the data line cross-over configuration, and defines multiple pixel regions;
Multiple pixel units are set on the pixel region, and respectively with the data line and the scan line electric property coupling;
Each pixel region includes an at least pixel circuit, and the pixel circuit includes:
One first switch, the one first capacitor unit of a control terminal electric property coupling of the first switch, the one of the first switch One first node of first end electric property coupling, the one first diode unit of a second end electric property coupling of the first switch;
One second switch, one second capacitor cell of a control terminal electric property coupling of the second switch, the one of the second switch First end electrically receives one first input voltage signal, first node described in a second end electric property coupling of the second switch;
One third switchs, first capacitor unit described in a control terminal electric property coupling of the third switch, the third switch One first end electric property coupling, one second node, the one second diode unit of a second end electric property coupling of the third switch;
One the 4th switchs, the second capacitor cell described in a control terminal electric property coupling of the 4th switch, the 4th switch One first end electrically receives one second input voltage signal, the second section described in a second end electric property coupling of the 4th switch Point;
During the first scanning, the first cut-in voltage is applied to the pixel unit on 2n-1 horizontal scanning line;And
During the second scanning, the second cut-in voltage is applied to the pixel unit on 2n horizontal scanning line;
Wherein, adjacent 2n-1 horizontal scanning line and 2n horizontal scanning line are coupled to same data line, and n is positive number;
Wherein, first cut-in voltage and the size of the second electric-opening pressure are identical, and first cut-in voltage Charging time is equal to the charging time of second cut-in voltage;
Wherein, the one 2n-1 horizontal scanning line of the first diode unit other end electric property coupling, n is positive number;Described 2nd 2 One 2n horizontal scanning line of polar body unit other end electric property coupling, n is positive number.
2. display panel as described in claim 1, which is characterized in that in same data line, 2n-1 horizontal scanning line and 2n The polarity of two pixel units on horizontal scanning line is identical.
3. display panel as described in claim 1, which is characterized in that in same scan line, the polarity phase of adjacent pixel unit It is different.
4. display panel as described in claim 1, which is characterized in that the picture on same data line, 2n-1 horizontal scanning line Plain unit is different with the polarity of pixel unit on 2n+1 horizontal scanning line, and the pixel unit on 2n-2 horizontal scanning line and The polarity of pixel unit on 2n horizontal scanning line is different.
5. display panel as described in claim 1, which is characterized in that the pole of the identical pixel unit of adjacent two frames picture Property is different.
6. a kind of display panel characterized by comprising
One substrate;
Multiple data lines are set on the substrate;
Multi-strip scanning line is set on the substrate, and the data line cross-over configuration, and defines multiple pixel regions;
Multiple pixel units are set on the pixel region, and respectively with the data line and the scan line electric property coupling;
Each pixel region includes an at least pixel circuit, and the pixel circuit includes:
One first switch, the one first capacitor unit of a control terminal electric property coupling of the first switch, the one of the first switch One first node of first end electric property coupling, the one first diode unit of a second end electric property coupling of the first switch;
One second switch, one second capacitor cell of a control terminal electric property coupling of the second switch, the one of the second switch First end electrically receives one first input voltage signal, first node described in a second end electric property coupling of the second switch;
One third switchs, first capacitor unit described in a control terminal electric property coupling of the third switch, the third switch One first end electric property coupling, one second node, the one second diode unit of a second end electric property coupling of the third switch;
One the 4th switchs, the second capacitor cell described in a control terminal electric property coupling of the 4th switch, the 4th switch One first end electrically receives one second input voltage signal, the second section described in a second end electric property coupling of the 4th switch Point;
During the first scanning, the first cut-in voltage is applied to the pixel unit on 2n-1 horizontal scanning line;
During the second scanning, the second cut-in voltage is applied to the pixel unit on 2n horizontal scanning line;
During the first scanning, the first input voltage is applied to the pixel unit on 2n-1 horizontal scanning line;And
During the second scanning, the second input voltage is applied to the pixel unit on 2n horizontal scanning line;
Wherein, adjacent 2n-1 horizontal scanning line and 2n horizontal scanning line are coupled to same data line, and n is positive number;
Wherein, first cut-in voltage and the size of second cut-in voltage are identical, and first cut-in voltage Charging time is equal to the charging time of second cut-in voltage;
Wherein, the size of first input voltage and second input voltage is different, and first input voltage Charging time is greater than the charging time of second input voltage;
Wherein, the one 2n-1 horizontal scanning line of the first diode unit other end electric property coupling, n is positive number;Described 2nd 2 One 2n horizontal scanning line of polar body unit other end electric property coupling, n is positive number;
Wherein, the pixel unit is array arrangement;The pixel unit is rectangular shape.
7. a kind of driving method of display panel characterized by comprising
One substrate is provided;
Multiple data lines are set on the substrate;
Multi-strip scanning line is set on the substrate, and the data line cross-over configuration, and defines multiple pixel regions;
Multiple pixel units are set on the pixel region, respectively with the data line and the scan line electric property coupling;
Each pixel region includes an at least pixel circuit, and the pixel circuit includes:
One first switch, the one first capacitor unit of a control terminal electric property coupling of the first switch, the one of the first switch One first node of first end electric property coupling, the one first diode unit of a second end electric property coupling of the first switch;
One second switch, one second capacitor cell of a control terminal electric property coupling of the second switch, the one of the second switch First end electrically receives one first input voltage signal, first node described in a second end electric property coupling of the second switch;
One third switchs, first capacitor unit described in a control terminal electric property coupling of the third switch, the third switch One first end electric property coupling, one second node, the one second diode unit of a second end electric property coupling of the third switch;
One the 4th switchs, the second capacitor cell described in a control terminal electric property coupling of the 4th switch, the 4th switch One first end electrically receives one second input voltage signal, the second section described in a second end electric property coupling of the 4th switch Point;
During the first scanning, the first cut-in voltage is applied to the pixel unit on 2n-1 horizontal scanning line;
During the second scanning, the second cut-in voltage is applied to the pixel unit on 2n horizontal scanning line;
During the first scanning, the first input voltage is applied to the pixel unit on 2n-1 horizontal scanning line;And
During the second scanning, the second input voltage is applied to the pixel unit on 2n horizontal scanning line;
Wherein, adjacent 2n-1 horizontal scanning line and 2n horizontal scanning line are coupled to same data line, and n is positive number;
Wherein, first cut-in voltage and the size of second cut-in voltage are identical, and first cut-in voltage Charging time is equal to the charging time of second cut-in voltage;
Wherein, the size of first input voltage and second input voltage is different, and first input voltage Charging time is greater than the charging time of second input voltage;
Wherein, the one 2n-1 horizontal scanning line of the first diode unit other end electric property coupling, n is positive number;Described 2nd 2 One 2n horizontal scanning line of polar body unit other end electric property coupling, n is positive number.
8. the driving method of display panel as claimed in claim 7, which is characterized in that it is described during the first scanning, to 2n-1 The pixel unit on horizontal scanning line applies the step of the first input voltage and includes:
Through the decline cycle and second capacitor cell for adjusting a low-voltage signal provided by the first capacitor unit Provided low-voltage signal ramp-up cycle;And
Thus generate the signal period of first input voltage.
9. the driving method of display panel as claimed in claim 7, which is characterized in that it is described during the second scanning, to 2n row The pixel unit in scan line applies the step of the second input voltage and includes:
Through the ramp-up cycle and second capacitor cell for adjusting a low-voltage signal provided by the first capacitor unit Provided low-voltage signal decline cycle;And
Thus generate the signal period of second input voltage.
10. the driving method of display panel as claimed in claim 7, which is characterized in that in same data line, the scanning of 2n-1 row The polarity of two pixel units on line and 2n horizontal scanning line is identical.
CN201811332375.2A 2018-11-09 2018-11-09 Display panel and driving method thereof Active CN109283762B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN201811332375.2A CN109283762B (en) 2018-11-09 2018-11-09 Display panel and driving method thereof
PCT/CN2019/073190 WO2020093604A1 (en) 2018-11-09 2019-01-25 Display panel and driving method therefor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201811332375.2A CN109283762B (en) 2018-11-09 2018-11-09 Display panel and driving method thereof

Publications (2)

Publication Number Publication Date
CN109283762A true CN109283762A (en) 2019-01-29
CN109283762B CN109283762B (en) 2021-03-30

Family

ID=65175524

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201811332375.2A Active CN109283762B (en) 2018-11-09 2018-11-09 Display panel and driving method thereof

Country Status (2)

Country Link
CN (1) CN109283762B (en)
WO (1) WO2020093604A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111916034A (en) * 2020-08-19 2020-11-10 惠科股份有限公司 Display device and driving method thereof

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104407479A (en) * 2014-12-02 2015-03-11 深圳市华星光电技术有限公司 Liquid crystal display panel and display device
CN104050885B (en) * 2014-03-27 2017-04-12 友达光电股份有限公司 Display panel and driving method thereof
CN104298041B (en) * 2014-11-10 2017-04-26 深圳市华星光电技术有限公司 Array substrate, liquid crystal display panel and liquid crystal display
CN107507588A (en) * 2017-08-28 2017-12-22 惠科股份有限公司 The drive circuit and driving method of display panel

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101430853B (en) * 2008-12-10 2010-09-15 友达光电股份有限公司 Driving method for display panel with semi-source pole driving structure
CN101777301B (en) * 2010-01-15 2012-06-20 友达光电股份有限公司 Grid electrode driving circuit
CN201716499U (en) * 2010-05-19 2011-01-19 深圳华映显示科技有限公司 Display device
CN102737591A (en) * 2011-04-12 2012-10-17 联咏科技股份有限公司 Gate driver of dual-gate display and frame control method thereof
CN102568398B (en) * 2012-03-02 2014-06-04 福州华映视讯有限公司 Double-gate liquid crystal display with uniform brightness
JP2014153541A (en) * 2013-02-08 2014-08-25 Japan Display Central Co Ltd Image display unit and driving method of the same
CN103177683B (en) * 2013-04-02 2016-02-03 华映视讯(吴江)有限公司 Display device and displaying panel driving method thereof
CN103761944B (en) * 2013-12-25 2017-01-25 合肥京东方光电科技有限公司 Gate drive circuit, display device and drive method

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104050885B (en) * 2014-03-27 2017-04-12 友达光电股份有限公司 Display panel and driving method thereof
CN104298041B (en) * 2014-11-10 2017-04-26 深圳市华星光电技术有限公司 Array substrate, liquid crystal display panel and liquid crystal display
CN104407479A (en) * 2014-12-02 2015-03-11 深圳市华星光电技术有限公司 Liquid crystal display panel and display device
CN107507588A (en) * 2017-08-28 2017-12-22 惠科股份有限公司 The drive circuit and driving method of display panel

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111916034A (en) * 2020-08-19 2020-11-10 惠科股份有限公司 Display device and driving method thereof

Also Published As

Publication number Publication date
CN109283762B (en) 2021-03-30
WO2020093604A1 (en) 2020-05-14

Similar Documents

Publication Publication Date Title
CN108231031B (en) Display panel, driving method thereof and display device
CN102749777B (en) Array substrate of display panel and pixel unit
CN106201072B (en) A kind of touch control display apparatus
CN106855668B (en) Dot structure, array substrate and display panel
WO2016176914A1 (en) Substrate and liquid crystal display device thereof
CN107507588A (en) The drive circuit and driving method of display panel
CN102947873B (en) Electrowetting display driving system
CN107589608A (en) Display device and its method for eliminating shutdown ghosting image
CN207742919U (en) Liquid crystal display and its driving circuit
KR20030081336A (en) Drive circuit for liquid crystal displays and method therefor
CN109192164A (en) Display device and its method for eliminating shutdown ghosting image
CN111009224A (en) Display panel driving method and display device
CN109346021A (en) The driving method of display panel
CN109256081B (en) Source electrode driving circuit and display panel
CN106773239A (en) Display panel and display device
CN108648680A (en) A kind of display panel, its driving method, driving device and display device
CN112509509A (en) Display panel, driving method thereof and display device
CN104658489B (en) A kind of driving method and its driving IC for LCD panel
CN109283762A (en) Display panel and its driving method
KR101518326B1 (en) Liquid crystal display
CN109935193A (en) Gate driving circuit and its driving method, array substrate, display panel and device
CN107863059B (en) Display panel and display device
CN105954949A (en) Array substrate and liquid crystal panel
CN105761703B (en) Array substrate, display device and charge control method
CN109064988A (en) The driving method and display device of display panel

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant