CN109272911B - Test method, device and storage medium - Google Patents
Test method, device and storage medium Download PDFInfo
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- CN109272911B CN109272911B CN201811341295.3A CN201811341295A CN109272911B CN 109272911 B CN109272911 B CN 109272911B CN 201811341295 A CN201811341295 A CN 201811341295A CN 109272911 B CN109272911 B CN 109272911B
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- 238000003860 storage Methods 0.000 title claims abstract description 53
- 238000010998 test method Methods 0.000 title claims abstract description 33
- 238000012360 testing method Methods 0.000 claims abstract description 59
- 238000000034 method Methods 0.000 claims abstract description 34
- 230000000875 corresponding effect Effects 0.000 claims description 43
- 230000001276 controlling effect Effects 0.000 claims description 34
- 230000002596 correlated effect Effects 0.000 claims description 17
- 230000005055 memory storage Effects 0.000 claims description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 38
- 238000010586 diagram Methods 0.000 description 20
- 230000008569 process Effects 0.000 description 12
- 239000010409 thin film Substances 0.000 description 9
- 230000002950 deficient Effects 0.000 description 8
- 238000001514 detection method Methods 0.000 description 6
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- 239000004065 semiconductor Substances 0.000 description 2
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- 210000004027 cell Anatomy 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/1306—Details
- G02F1/1309—Repairing; Testing
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Abstract
The present invention provides a kind of test method, device and storage medium, this method comprises: the grid voltage for controlling each transistor switch is first voltage in the first preset time period, and the grid voltage for controlling each transistor switch is shutdown voltage in the second preset time period, display brightness of the corresponding block of pixels of each transistor switch in conducting is adjusted to the first brightness, the sum of the first preset time period and the second preset time period are a switch periods of transistor switch；The voltage for controlling the storage capacitance of each transistor switch is second voltage within the first switch period, it is 0V that each transistor switch common voltage, which is controlled, within the first switch period, so that there are the block of pixels of failure to be shown as the second brightness within the first switch period in test panel, second voltage is greater than source voltage.Test method of the invention enables to the block of pixels bright spot of failure, so that operator is convenient for detecting the failed pixel block for being shown as bright spot in the dark test panel of brightness.
Description
Technical field
The present invention relates to liquid crystal display manufacturing technology field more particularly to a kind of test methods, device and storage medium.
Background technique
Liquid crystal display is a kind of plane, ultra-thin display equipment.The power consumption of liquid crystal display is very low, and has high draw
Matter, small in size, light-weight feature, therefore favored by everybody, become the mainstream of display.Liquid crystal display is with thin at present
Based on film transistor (Thin Film Transistor, TFT) liquid crystal display, and general Thin Film Transistor-LCD
Production can be roughly divided into three parts: thin film transistor (TFT) array (TFT Array) preparation process, color filter preparation engineering, liquid
Brilliant display unit assembling (LC Cell Assembly) preparation process and LCD MODULE (Liquid Crystal Module,
LCM) preparation process.Liquid crystal display panel needs to carry out multiple check problems during production, one of them critically important inspection journey
Sequence is exactly that the liquid crystal display panel completed to cutting is tested, and confirmation liquid crystal display panel whether there is defect.The test process is to liquid
Crystal panel input test signal makes its pixel that color be presented, and then whether observes each pixel one by one by defect detecting device
Well, this process is known as lighting test (Light-on Test).
In the prior art, it during lighting test, needs to provide backlight for liquid crystal display panel, so that in liquid crystal display panel
Block of pixels is lit, and operator checks whether each block of pixels normally shows in the liquid crystal display panel lighted, and discharge, which has, to be lacked
Sunken liquid crystal display panel.
But the problem of due to human eye sense organ, operator check that defective stain is more tired in the liquid crystal display panel lighted
Difficulty, and it is easy missing inspection, so that the accuracy rate of inspection result is low.
Summary of the invention
The present invention provides a kind of test method, device and storage medium, enables to the block of pixels bright spot of failure, so that
Operator is shown as the failed pixel block of bright spot convenient for detecting in the dark test panel of brightness, improves detector efficiency.
The first aspect of the present invention provides a kind of test method, is applied to test panel, the test panel includes multiple
Block of pixels, each corresponding transistor switch of the block of pixels, comprising:
The grid voltage for controlling each transistor switch is first voltage in the first preset time period, and is controlled every
The grid voltage of a transistor switch is shutdown voltage in the second preset time period, by each transistor switch
Display brightness of the corresponding block of pixels in conducting is adjusted to the first brightness, the brightness value and the transistor of first brightness
The size of the source voltage of switch is positively correlated, and the first voltage is the conducting voltage of the transistor switch, and described first is pre-
If the sum of period and second preset time period are a switch periods of the transistor switch；
The voltage for controlling the storage capacitance of each transistor switch is second voltage within the first switch period, control
Each transistor switch common voltage is 0V within the first switch period, so that there are failures in the test panel
Block of pixels be shown as the second brightness within the first switch period, the brightness value of second brightness and the second voltage
Size be positively correlated, the second voltage be greater than the source voltage.
Optionally, the method also includes:
The source voltage for controlling the transistor switch is 0V within the first switch period, by each crystal
Pipe switchs display brightness of the corresponding block of pixels in conducting and is adjusted to third brightness, and the brightness value of the third brightness is 0.
Optionally, the method also includes:
The voltage for controlling the storage capacitance of each transistor switch is tertiary voltage within the second switch period, control
Each transistor switch common voltage, source voltage are 0V, the second voltage and institute within the second switch period
The equal in magnitude and contrary of tertiary voltage is stated, the first switch period and the second switch period are adjacent switch
Period.
Optionally, the second voltage and the difference of the source voltage are greater than voltage difference threshold value, the tertiary voltage
It is greater than the voltage difference threshold value with the difference of the source voltage.
Optionally, first preset time period is the time that block of pixels is discharged completely.
Optionally, first preset time period is 500us.
The second aspect of the present invention provides test device, comprising:
First brightness control module, the grid voltage for controlling each transistor switch are in the first preset time period
First voltage, and the grid voltage for controlling each transistor switch is shutdown voltage in the second preset time period, it will
Display brightness of the corresponding block of pixels of each transistor switch in conducting is adjusted to the first brightness, first brightness
The size of the source voltage of brightness value and the transistor switch is positively correlated, and the first voltage is leading for the transistor switch
Be powered pressure, and the sum of first preset time period and second preset time period are the switch week of the transistor switch
Phase；
Second brightness control module, for control each transistor switch storage capacitance voltage in first switch
It is second voltage in period, controlling each transistor switch common voltage is 0V within the first switch period, so that
There are the block of pixels of failure, and the second brightness, second brightness are shown as within the first switch period in the test panel
Brightness value and the second voltage size be positively correlated, the second voltage be greater than the source voltage.
Optionally, described device further include: third brightness control module；
The third brightness control module, for controlling the source voltage of the transistor switch in the first switch week
It is 0V in phase, display brightness of the corresponding block of pixels of each transistor switch in conducting is adjusted to third brightness,
The brightness value of the third brightness is 0.
Optionally, second brightness control module is also used to control the storage capacitance of each transistor switch
Voltage is tertiary voltage within the second switch period, controls each transistor switch common voltage, source voltage described
Be 0V in the second switch period, the second voltage and the tertiary voltage it is equal in magnitude and contrary, described first opens
It closes the period and the second switch period is adjacent switch periods.
Optionally, the second voltage and the difference of the source voltage are greater than voltage difference threshold value, the tertiary voltage
It is greater than the voltage difference threshold value with the difference of the source voltage.
Optionally, first preset time period is the time that block of pixels is discharged completely.
Optionally, first preset time period is 500us.
The third aspect of the present invention provides a kind of test device, comprising: at least one processor and memory；
The memory stores computer executed instructions；
At least one described processor executes the computer executed instructions of the memory storage, so that the test device
Execute above-mentioned test method.
The fourth aspect of the present invention provides a kind of computer readable storage medium, deposits on the computer readable storage medium
Computer executed instructions are contained, when the computer executed instructions are executed by processor, realize above-mentioned test method.
The present invention provides a kind of test method, device and storage medium, specifically, this method is applied to test panel, surveys
Trying panel includes multiple block of pixels, the corresponding transistor switch of each block of pixels, comprising: control the grid of each transistor switch
Pole tension is first voltage in the first preset time period, and controls the grid voltage of each transistor switch when second is default
Between be shutdown voltage in section, it is bright that display brightness of the corresponding block of pixels of each transistor switch in conducting is adjusted to first
The size of degree, the source voltage of the brightness value and transistor switch of the first brightness is positively correlated, and first voltage is transistor switch
Conducting voltage, the sum of the first preset time period and the second preset time period are a switch periods of transistor switch；Control is every
The voltage of the storage capacitance of a transistor switch is second voltage within the first switch period, and it is public to control each transistor switch
Voltage is 0V within the first switch period, is shown as within the first switch period so that there are the block of pixels of failure in test panel
Second brightness, the brightness value of the second brightness and the size of second voltage are positively correlated, and second voltage is greater than source voltage.Of the invention
Test method enables to the block of pixels bright spot of failure, shows so that operator is convenient for detecting in the dark test panel of brightness
It is shown as the failed pixel block of bright spot, improves detector efficiency.
Detailed description of the invention
Fig. 1 is the connection schematic diagram of transistor switch；
Fig. 2 is the effect diagram of lighting test in the prior art；
Fig. 3 is the flow diagram one of test method provided by the invention；
Fig. 4 is the corresponding signal waveform schematic diagram one of test method provided by the invention；
Fig. 5 is the flow diagram two of test method provided by the invention；
Fig. 6 is the corresponding signal waveform schematic diagram two of test method provided by the invention；
Fig. 7 is the effect diagram of test method provided by the invention；
Fig. 8 is the structural schematic diagram one of test device provided by the invention；
Fig. 9 is the structural schematic diagram two of test device provided by the invention；
Figure 10 is the structural schematic diagram three of test device provided by the invention.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with the embodiment of the present invention, to this
Technical solution in inventive embodiments is clearly and completely described, it is clear that described embodiment is that a part of the invention is real
Example is applied, instead of all the embodiments.Based on the embodiments of the present invention, those of ordinary skill in the art are not making creation
Property labour under the premise of every other embodiment obtained, shall fall within the protection scope of the present invention.
Description and claims of this specification and term " first ", " second ", " third " " in above-mentioned attached drawing
The (if present)s such as four " are to be used to distinguish similar objects, without being used to describe a particular order or precedence order.It should manage
The data that solution uses in this way are interchangeable under appropriate circumstances, so that the embodiment of the present invention described herein for example can be to remove
Sequence other than those of illustrating or describe herein is implemented.In addition, term " includes " and " having " and theirs is any
Deformation, it is intended that cover it is non-exclusive include, for example, containing the process, method of a series of steps or units, system, production
Product or equipment those of are not necessarily limited to be clearly listed step or unit, but may include be not clearly listed or for this
A little process, methods, the other step or units of product or equipment inherently.
Technical solution of the present invention is described in detail with specifically embodiment below.These specific implementations below
Example can be combined with each other, and the same or similar concept or process may be repeated no more in some embodiments.
Thin Film Transistor-LCD (thin film transistor-liquid crystal display) be
The technology that microelectronics retrofit is carried out on silicon is transplanted to the processing that thin film transistor (TFT) array is carried out in large-area glass, then
The substrate of the array substrate and another color filter film is formed a liquid crystal cell and combined using mature LCD technology,
Processes, the liquid crystal display eventually formed such as paste using rear process such as polaroid.Wherein mainly opened using TFT transistor
It closes.
It wherein, include multiple block of pixels in array substrate, the corresponding transistor switch of each block of pixels, transistor is opened
Pass is the device for controlling each pixel, is equivalent to and devises a field effect transistor switch pipe in each pixel block.It is more
A transistor switch constitutes a liquid crystal display panel, since each block of pixels has corresponding transistor switch to be controlled, because
This, Thin Film Transistor-LCD can be realized true color and high-resolution.
Thin Film Transistor-LCD clamps what liquid crystal formed by layer glass substrate, forms a parallel plate capacitor
Device charges to this capacitor and built-in storage capacitance by the transistor switch being embedded in lower glass plate, to remain every
Voltage required for width image is until next width image update.
Fig. 1 is the connection schematic diagram of transistor switch, as shown in Figure 1, transistor switch is a three terminal device, function
It is exactly a switching tube.Semiconductor layer is made on the glass substrate of Thin Film Transistor-LCD, has phase therewith at both ends
The source S and drain D of connection, and it is corresponding with semiconductor by grid G insulating film, it is controlled using the voltage for being applied to grid
Source, leak electricity interpolar electric current.Its working principle is that: it to charge block of pixels A it is necessary to the corresponding transistor switch of block of pixels A
Conducting applies target voltage to the corresponding signal wire of drain D, the data-signal of the corresponding data line of grid G is made to be added to block of pixels A
On.After pixel electrode (i.e. drain D and public electrode COM) is fully charged, even if switch disconnects, the charge in capacitor is also obtained
It to preservation, is stored in liquid crystal capacitance, the liquid crystal molecule between pixel electrode is sustainable electric field action, so that block of pixels is persistently shown
Show brightness.Wherein, the effect of data line is to apply target voltage to signal wire, since the voltage being added on liquid crystal can store,
Therefore the work that liquid crystal layer can be stable.
Liquid crystal display panel needs to carry out multiple check problems during production, one of them critically important check problem is just
It is that the liquid crystal display panel completed to cutting is tested, confirmation liquid crystal display panel whether there is defect.The test process is to liquid crystal surface
Plate input test signal makes its pixel that color be presented, and whether then observe each pixel one by one by defect detecting device good,
This process is known as lighting test (Light-on Test).In the prior art, it during lighting test, needs for liquid crystal surface
Plate provides backlight, so that the block of pixels in liquid crystal display panel is lit, operator checks each picture in the liquid crystal display panel lighted
Whether plain block normally shows that detection has defective block of pixels.
Fig. 2 is the effect diagram of lighting test in the prior art, as shown in Fig. 2, transistor switch can normally be led
Logical block of pixels shows brightness, is rendered as bright spot, the brightness value of the brightness by drain voltage and the voltage of public electrode difference
Pressure determines that the differential pressure is bigger, then the brightness value is higher.And defective block of pixels is rendered as stain, be primarily due to drain D with
The corresponding data line of storage capacitance is shorted, i.e., as shown in phantom in Figure 1, due to the corresponding voltage of storage capacitance and common electrical
Extremely corresponding voltage is generally 0V, and therefore, leading to the differential pressure of the voltage of drain voltage and public electrode is 0V, causes defective
Block of pixels is rendered as stain.The problem of due to human eye sense organ, operator checks defective black in the liquid crystal display panel lighted
Point is more difficult, and is easy missing inspection, so that the accuracy rate of inspection result is low.
The technical solution provided in following embodiments be exactly in order to solve in the prior art operator in the liquid crystal lighted
The more difficult problem of defective stain is checked in panel, basic thinking is: defective block of pixels be due to drain D with
The corresponding data line of storage capacitance is shorted, and leading to the differential pressure of the voltage of drain voltage and public electrode is 0V, therefore, this hair
It is bright during lighting test, improve storage capacitance corresponding voltage size so that the difference of the voltage of drain voltage and public electrode
Pressure increases, and brightness is presented, and normal block of pixels is kept to be rendered as stain state.So that operator is in black liquid crystal display panel
Defective bright spot is detected, so that detection is relatively easy to, so as to improve detector efficiency, promotes accuracy.
Fig. 3 is the flow diagram one of test method provided by the invention, the executing subject of test method in the present embodiment
For test device, specifically, the test device is signal generator.As shown in figure 3, test method provided in this embodiment can be with
Include:
S301, the grid voltage for controlling each transistor switch is first voltage in the first preset time period, and is controlled
The grid voltage of each transistor switch is shutdown voltage in the second preset time period, and each transistor switch is corresponding
Display brightness of the block of pixels in conducting is adjusted to the first brightness.
Test method in the present embodiment is applied in test panel, which can be liquid crystal display panel.Wherein, often
A test panel includes multiple block of pixels, the corresponding transistor switch of each block of pixels, each by control in the present embodiment
The voltage at three end of transistor, to control the brightness of each block of pixels.Refer to it is noted that the mode for controlling each transistor is phase
With, a transistor is controlled with signal generator in following embodiments and is illustrated.With one of block of pixels in the present embodiment
Signal control in frame is illustrated.
Wherein, the period of transistor switch being switched on and off is a frame of block of pixels, and in following embodiments, signal occurs
The mode that device controls the grid voltage of transistor switch is identical in each frame of block of pixels.Fig. 4 is provided by the invention
The corresponding signal waveform schematic diagram one of test method, as shown in figure 4, specifically, signal generator controls each transistor switch
Grid voltage be first voltage in the first preset time period, and it is pre- second to control the grid voltage of each transistor switch
If being shutdown voltage in the period, specifically, the shutdown voltage is specifically as follows 0V.First preset time period with second it is default when
Between the sum of section be transistor switch a switch periods, an as frame of block of pixels.
Grid voltage in the present embodiment in the first preset time period is first voltage, and the first voltage is transistor
The conducting voltage Vgh of switch, in addition to the second preset time period after the first preset time period within the time of one frame of block of pixels
To turn off voltage, this process is so that transistor switch is opened, and makes the normal discharge process of block of pixels.Depositing in Fig. 1
Storage holds not stored charge, and the corresponding voltage of storage capacitance is 0V, and therefore, normal block of pixels can be rendered as stain, i.e., aobvious
It is shown as the brightness that brightness value is 0.
Further, it is not 0V that signal generator, which can control the source voltage of transistor switch, but maintains very little
Voltage status, specifically, the source voltage of the transistor switch is less than the corresponding voltage of storage capacitance, so that the picture of normally
Plain block is rendered as the first brightness, and the size of the source voltage of the brightness value and transistor switch of the first brightness is positively correlated.
Optionally, signal generator can control between the source voltage voltage corresponding with storage capacitance of transistor switch
Difference voltage be greater than a preset value so that the brightness of the block of pixels of normally is less than the brightness that shows of block of pixels of failure,
So that the block of pixels that operator is big convenient for the detection brightness in the small block of pixels of the brightness of test panel.And energy in the present embodiment
Enough guarantee that the brightness of the block of pixels of normally is less than the brightness that the block of pixels of failure is shown, so that the block of pixels of normally
Brightness differs the recall rate that can be improved operator farther out with the brightness that the block of pixels of failure is shown.
S302, the voltage for controlling the storage capacitance of each transistor switch is second voltage within the first switch period, control
It is 0V that each transistor switch common voltage, which is made, within the first switch period, so that the block of pixels in test panel there are failure exists
The second brightness is shown as in the first switch period, the brightness value of the second brightness and the size of second voltage are positively correlated, second voltage
Greater than source voltage.
S302 and S301 in the present embodiment are performed simultaneously, the not differentiation of sequencing.Specifically, S302 with
S301 is the operation made in a frame of block of pixels.Wherein, as shown in figure 4, signal generator is in a frame of block of pixels
During the grid voltage of control transistor switch is changed into shutdown voltage by first voltage, the storage of transistor switch is controlled
The voltage of capacitor is second voltage within the first switch period, such as+Vs；Transistor switch common voltage is controlled in first switch week
It is 0V in phase.
Wherein, the voltage of the storage capacitance of transistor switch is second voltage within the first switch period, due to failure picture
The drain D of plain block and the signal wire of storage capacitance are shorted, therefore the brightness of failed pixel block, with the voltage of storage capacitance and
The difference voltage of common voltage is positively correlated, since common voltage is 0V, the brightness of failed pixel block and second voltage
Size is positively correlated.
Second voltage in the present embodiment is greater than source voltage, so that the second brightness of the block of pixels of failure is greater than normally
First brightness of block of pixels.Optionally, the signal generator in the present embodiment can control the source voltage of transistor switch with
Difference voltage between the corresponding voltage of storage capacitance is greater than a preset value, so that the first brightness of the block of pixels of normally is remote
Less than the second brightness of the block of pixels of failure, operator can preferably be made to improve the recall rate of operator.Wherein, should
Preset value can be preset according to the theoretical value that human eye can differentiate two kinds of brightness.The present embodiment is to the big of the preset value
It is small with no restrictions.
The present embodiment provides a kind of test method, device and storage mediums, are applied to test panel, and test panel includes more
A block of pixels, the corresponding transistor switch of each block of pixels, comprising: control the grid voltage of each transistor switch first
It is first voltage in preset time period, and the grid voltage for controlling each transistor switch is shutdown in the second preset time period
Display brightness of the corresponding block of pixels of each transistor switch in conducting is adjusted to the first brightness, the first brightness by voltage
Brightness value and the size of source voltage of transistor switch be positively correlated, first voltage is the conducting voltage of transistor switch, the
The sum of one preset time period and the second preset time period are a switch periods of transistor switch；Control each transistor switch
Storage capacitance voltage within the first switch period be second voltage, control each transistor switch common voltage and opened first
Closing in the period is 0V, so that there are the block of pixels of failure, and the second brightness is shown as within the first switch period in test panel, the
The brightness value of two brightness and the size of second voltage are positively correlated, and second voltage is greater than source voltage.Test method energy of the invention
The block of pixels bright spot so that failure is reached, so that operator is convenient for the detection in the dark test panel of brightness to be shown as bright spot
Failed pixel block improves detector efficiency.
On the basis of the above embodiments, test method provided by the invention is further described below with reference to Fig. 5,
Fig. 5 is the flow diagram two of test method provided by the invention, as shown in figure 5, test method provided in this embodiment can be with
Include:
S501, the grid voltage for controlling each transistor switch is first voltage in the first preset time period, and is controlled
The grid voltage of each transistor switch is shutdown voltage in the second preset time period.
Fig. 6 is the corresponding signal waveform schematic diagram two of test method provided by the invention, as shown in Figure 6.In the present embodiment
It is illustrated with the signal control method of adjacent two frame of block of pixels.Wherein, within the first switch period and the second switch period
Interior, the grid voltage that signal generator controls each transistor switch is first voltage in the first preset time period, and is controlled
The grid voltage of each transistor switch is shutdown voltage in the second preset time period, specifically, the shutdown voltage specifically may be used
Think 0V.Wherein, first switch period and second switch period are adjacent switch periods.
Specifically, signal generator controls the grid voltage of each transistor switch first within the first switch period
It is first voltage in preset time period, and the grid voltage for controlling each transistor switch is shutdown in the second preset time period
Voltage；And within the second switch period, signal generator controls the grid voltage of each transistor switch in the first preset time
It is first voltage in section, and the grid voltage for controlling each transistor switch is shutdown voltage in the second preset time period.I.e.
In the present embodiment, in the switch periods of each transistor switch, signal generator controls the grid voltage of transistor switch
Mode is identical.
Wherein, the first preset time period in the present embodiment is the time that block of pixels is discharged completely.Optionally, first is default
Period is 500us.A frame time of block of pixels is 16667us in the present embodiment, and signal generator controls each transistor and opens
The grid voltage of pass is first voltage in the preceding 500us of a frame of block of pixels, and controls the grid voltage of each transistor switch
It is 0V in the rear 16167us of a frame of block of pixels.The process in the present embodiment opens the corresponding transistor of each block of pixels
It closes and opens, and be in regular picture state.
S502, the voltage for controlling the storage capacitance of each transistor switch is second voltage within the first switch period, control
Make the common voltage of each transistor switch, source voltage is 0V within the first switch period, and controls each transistor switch
Storage capacitance voltage within the second switch period be tertiary voltage, control each transistor switch common voltage, source electrode electricity
Being pressed in is 0V in the second switch period, and display brightness of the corresponding block of pixels of each transistor switch in conducting is adjusted to
Third brightness, the brightness value of third brightness are 0.
As shown in fig. 6, first switch period and second switch period are adjacent switch periods.In the first switch period
Interior, the voltage that signal generator controls the storage capacitance of each transistor switch is second voltage, and such as+Vs, each transistor are opened
The common voltage of pass is 0V, so that the block of pixels of failure is shown as the second brightness.Wherein, the brightness that the block of pixels of failure is shown
Principle is same as the previously described embodiments, and this will not be repeated here.
Further, in the present embodiment, signal generator generator is in the second switch week adjacent with the first switch period
In phase, the voltage for controlling the storage capacitance of each transistor switch is tertiary voltage within the second switch period, each transistor
The common voltage of switch is 0V.Specifically, second voltage and tertiary voltage is equal in magnitude and contrary, such as tertiary voltage
For-Vs.
In the present embodiment, in order to enable polarization phenomena do not occur for the liquid crystal molecule in test panel, it is adjacent in block of pixels
The voltage direction of control storage capacitance is on the contrary, to guarantee that the offset of certain angle smoothly occurs for liquid crystal molecule, so that back in two frames
Light in tabula rasa can be penetrated smoothly, so that the block of pixels of failure shows brightness.Specifically, due to second voltage and third electricity
That presses is equal in magnitude, and in every frame of block of pixels, i.e., in the switch periods of each transistor switch, the block of pixels of failure is shown
Be the second brightness.
In order to enable operator can more clearly differentiate out of order block of pixels, in the present embodiment, signal occurs
The source voltage that device controls each transistor switch is 0V within the first switch period, and is 0V within the second switch period, i.e.,
The source voltage for controlling each transistor switch is 0V in the switch periods of each transistor switch.Each transistor to be opened
It closes display brightness of the corresponding block of pixels in conducting and is adjusted to third brightness, the brightness value of third brightness is 0.
Wherein, it is first voltage in the first preset time period due to the grid voltage of transistor switch, and controls each
The grid voltage of transistor switch is shutdown voltage in the second preset time period, and the block of pixels for capableing of normally is in normal
The discharge condition of conducting.And the size positive of the source voltage of brightness and transistor switch that the block of pixels of normally is shown
It closes, the source voltage that transistor switch is controlled in the present embodiment is 0V in the switch periods of each transistor switch, so that often
The corresponding block of pixels of a transistor switch is shown as stain in conducting, i.e. brightness value is 0.
In the present embodiment, since the block of pixels of normally is rendered as black, and to be rendered as second bright for the block of pixels of failure
Degree, operator needs to find the failed pixel block for being shown as brightness on the panel of black in detection, so that failed pixel
Block improves detector efficiency convenient for detection.
It should be noted that with two frames of block of pixels for a cycle period in the present embodiment.In a frame of block of pixels,
The grid voltage for controlling each transistor switch is first voltage in the first preset time period, is in the second preset time period
0V；Control the common voltage of transistor switch, source voltage is 0V in each switch periods；Control each transistor switch
The voltage of storage capacitance is second voltage within the first switch period, is tertiary voltage within the second switch period.
Further, in the present embodiment, signal generator controls second voltage and the difference of source voltage is greater than voltage difference
The difference of value threshold value, tertiary voltage and source voltage is greater than voltage difference threshold value.Specifically, since source voltage is in each crystal
It is 0V in the switch periods of pipe switch, so that second voltage and tertiary voltage are all larger than voltage difference threshold value.And then it enables to
The brightness of the block of pixels of failure reaches human eye and is easy the brightness distinguished.In the present embodiment, to the specific value of voltage difference threshold value
With no restrictions, in order to so that the easily operated personnel of the brightness of failed pixel block distinguish.
Fig. 7 is the effect diagram of test method provided by the invention, as shown in fig. 7, operator only need to be in black
Found on panel and be shown as the failed pixel block of brightness, compared to the prior art in detect stain from bright spot much easier, because
This improves detector efficiency.
In the present embodiment, the grid voltage for controlling each transistor switch is first voltage in the first preset time period,
And the grid voltage for controlling each transistor switch is shutdown voltage in the second preset time period, by each transistor switch
Display brightness of the corresponding block of pixels in conducting is adjusted to third brightness, and the brightness value of third brightness is 0；And each crystalline substance of control
The voltage of the storage capacitance of body pipe switch is second voltage within the first switch period, controls the storage electricity of each transistor switch
The voltage of appearance is tertiary voltage within the second switch period, controls each transistor switch common voltage in each switch periods
For 0V, so that there are the block of pixels of failure to be shown as the second brightness in each switch periods；And second voltage and tertiary voltage
It is equal in magnitude and contrary, avoid liquid crystal molecule in test panel and polarization phenomena occur.
Fig. 8 is the structural schematic diagram one of test device provided by the invention, which is signal generator, such as Fig. 8
Shown, which includes: the first brightness control module 801 and the second brightness control module 802.
First brightness control module 801, for controlling the grid voltage of each transistor switch in the first preset time period
Interior is first voltage, and the grid voltage for controlling each transistor switch is shutdown voltage in the second preset time period, will
Display brightness of the corresponding block of pixels of each transistor switch in conducting is adjusted to the first brightness, the brightness value of the first brightness with
The size of the source voltage of transistor switch is positively correlated, and first voltage is the conducting voltage of transistor switch, the first preset time
The sum of section and the second preset time period are a switch periods of transistor switch.
Second brightness control module 802, for control each transistor switch storage capacitance voltage in first switch
It is second voltage in period, controlling each transistor switch common voltage within the first switch period is 0V, so that test panel
It is middle to be shown as the second brightness within the first switch period there are the block of pixels of failure, the brightness value of the second brightness and second voltage
Size is positively correlated, and second voltage is greater than source voltage.
Test device provided in this embodiment is similar with principle and technical effect that above-mentioned test method is realized, does not make herein
It repeats.
Optionally, Fig. 9 is the structural schematic diagram two of test device provided by the invention, as shown in figure 9, the test 800 is also
It include: third brightness control module 803.
Third brightness control module 803, the source voltage for controlling transistor switch is 0V within the first switch period,
Display brightness of the corresponding block of pixels of each transistor switch in conducting is adjusted to third brightness, the brightness of third brightness
Value is 0.
Optionally, the second brightness control module 802, the voltage for being also used to control the storage capacitance of each transistor switch exist
It is tertiary voltage in the second switch period, controls each transistor switch common voltage, source voltage within the second switch period
For 0V, second voltage and tertiary voltage it is equal in magnitude and contrary, first switch period and second switch period are adjacent
Switch periods.
Optionally, second voltage and the difference of source voltage are greater than voltage difference threshold value, tertiary voltage and source voltage
Difference is greater than voltage difference threshold value.
Optionally, the first preset time period is the time that block of pixels is discharged completely.
Optionally, the first preset time period is 500us.
Figure 10 is the structural schematic diagram three of test device provided by the invention, as shown in Figure 10, the test device 1000 packet
It includes: memory 1001 and at least one processor 1002.
Memory 1001, for storing program instruction.
Processor 1002, for being performed the test method realized in the present embodiment in program instruction, specific implementation is former
Reason can be found in above-described embodiment, and details are not described herein again for the present embodiment.
The test device 1000 can also include and input/output interface 1003.
Input/output interface 1003 may include independent output interface and input interface, or integrated input and
The integrated interface of output.Wherein, output interface is used for output data, and input interface is used to obtain the data of input, above-mentioned output
Data be the general designation that exports in above method embodiment, the data of input are the general designation inputted in above method embodiment.
The present invention also provides a kind of readable storage medium storing program for executing, it is stored with and executes instruction in readable storage medium storing program for executing, work as test device
At least one processor when executing this and executing instruction, when computer executed instructions are executed by processor, realize above-mentioned implementation
Test method in example.
The present invention also provides a kind of program product, the program product include execute instruction, this execute instruction be stored in it is readable
In storage medium.At least one processor of test device can read this from readable storage medium storing program for executing and execute instruction, at least one
Processor executes this and executes instruction so that test device implements the test method that above-mentioned various embodiments provide.
In several embodiments provided by the present invention, it should be understood that disclosed device and method can pass through it
Its mode is realized.For example, the apparatus embodiments described above are merely exemplary, for example, the division of the unit, only
Only a kind of logical function partition, there may be another division manner in actual implementation, such as multiple units or components can be tied
Another system is closed or is desirably integrated into, or some features can be ignored or not executed.Another point, it is shown or discussed
Mutual coupling, direct-coupling or communication connection can be through some interfaces, the INDIRECT COUPLING or logical of device or unit
Letter connection can be electrical property, mechanical or other forms.
The unit as illustrated by the separation member may or may not be physically separated, aobvious as unit
The component shown may or may not be physical unit, it can and it is in one place, or may be distributed over multiple
In network unit.It can select some or all of unit therein according to the actual needs to realize the mesh of this embodiment scheme
's.
It, can also be in addition, the functional units in various embodiments of the present invention may be integrated into one processing unit
It is that each unit physically exists alone, can also be integrated in one unit with two or more units.Above-mentioned integrated list
Member both can take the form of hardware realization, can also realize in the form of hardware adds SFU software functional unit.
The above-mentioned integrated unit being realized in the form of SFU software functional unit can store and computer-readable deposit at one
In storage media.Above-mentioned SFU software functional unit is stored in a storage medium, including some instructions are used so that a computer
Equipment (can be personal computer, server or the network equipment etc.) or processor (English: processor) execute this hair
The part steps of bright each embodiment the method.And storage medium above-mentioned includes: USB flash disk, mobile hard disk, read-only memory
(English: Read-Only Memory, abbreviation: ROM), random access memory (English: Random Access Memory, letter
Claim: RAM), the various media that can store program code such as magnetic or disk.
In the embodiment of the above-mentioned network equipment or terminal device, it should be appreciated that processor can be central processing unit
(English: Central Processing Unit, referred to as: CPU), it can also be other general processors, digital signal processor
(English: Digital Signal Processor, abbreviation: DSP), specific integrated circuit (English: Application
Specific Integrated Circuit, referred to as: ASIC) etc..General processor can be microprocessor or the processor
It is also possible to any conventional processor etc..Hardware handles can be embodied directly in conjunction with the step of method disclosed in the present application
Device executes completion, or in processor hardware and software module combination execute completion.
Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention., rather than its limitations；To the greatest extent
Pipe present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that: its according to
So be possible to modify the technical solutions described in the foregoing embodiments, or to some or all of the technical features into
Row equivalent replacement；And these are modified or replaceed, various embodiments of the present invention technology that it does not separate the essence of the corresponding technical solution
The range of scheme.
Claims (10)
1. a kind of test method, which is characterized in that be applied to test panel, the test panel includes multiple block of pixels, each
The corresponding transistor switch of the block of pixels, comprising:
The grid voltage for controlling each transistor switch is first voltage in the first preset time period, and controls each institute
The grid voltage for stating transistor switch is shutdown voltage in the second preset time period, and each transistor switch is corresponding
Display brightness of the block of pixels in conducting be adjusted to the first brightness, the brightness value and the transistor switch of first brightness
Source voltage size be positively correlated, the first voltage be the transistor switch conducting voltage, it is described first it is default when
Between the sum of section and second preset time period be the transistor switch a switch periods；
The voltage for controlling the storage capacitance of each transistor switch is second voltage within the first switch period, and control is each
The transistor switch common voltage is 0V within the first switch period, so that there are the pictures of failure in the test panel
Plain block is shown as the second brightness within the first switch period, and the brightness value of second brightness is big with the second voltage
The difference of small positive correlation, the second voltage and the source voltage is greater than preset value.
2. the method according to claim 1, wherein the method also includes:
The source voltage for controlling the transistor switch is 0V within the first switch period, and each transistor is opened
It closes display brightness of the corresponding block of pixels in conducting and is adjusted to third brightness, the brightness value of the third brightness is 0.
3. according to the method described in claim 2, it is characterized in that, the method also includes:
The voltage for controlling the storage capacitance of each transistor switch is tertiary voltage within the second switch period, and control is each
The transistor switch common voltage, source voltage are 0V, the second voltage and described the within the second switch period
Three voltages it is equal in magnitude and contrary, the first switch period and the second switch period are adjacent switch week
Phase.
4. according to the method described in claim 3, it is characterized in that, the second voltage and the difference of the source voltage are greater than
The difference of voltage difference threshold value, the tertiary voltage and the source voltage is greater than the voltage difference threshold value.
5. according to the method described in claim 4, it is characterized in that, first preset time period is what block of pixels was discharged completely
Time.
6. according to the method described in claim 5, it is characterized in that, first preset time period is 500us.
7. a kind of test device characterized by comprising
First brightness control module, the grid voltage for controlling each transistor switch is first in the first preset time period
Voltage, and the grid voltage for controlling each transistor switch is shutdown voltage in the second preset time period, it will be each
Display brightness of the corresponding block of pixels of the transistor switch in conducting is adjusted to the first brightness, the brightness of first brightness
Value and the size of the source voltage of the transistor switch are positively correlated, and the first voltage is the electric conduction of the transistor switch
Pressure, the sum of first preset time period and second preset time period are a switch periods of the transistor switch；
Second brightness control module, for control each transistor switch storage capacitance voltage in the first switch period
Interior is second voltage, and controlling each transistor switch common voltage within the first switch period is 0V, so that described
Be shown as the second brightness within the first switch period there are the block of pixels of failure in test panel, second brightness it is bright
The size of angle value and the second voltage is positively correlated, and the difference of the second voltage and the source voltage is greater than preset value.
8. device according to claim 7, which is characterized in that described device further include: third brightness control module；
The third brightness control module, for controlling the source voltage of the transistor switch within the first switch period
For 0V, display brightness of the corresponding block of pixels of each transistor switch in conducting is adjusted to third brightness, it is described
The brightness value of third brightness is 0.
9. a kind of test device, which is characterized in that it is characterised by comprising: at least one processor and memory；
The memory stores computer executed instructions；
At least one described processor executes the computer executed instructions of the memory storage, so that the test device executes
Method described in any one of claims 1-6.
10. a kind of computer readable storage medium, which is characterized in that be stored with computer on the computer readable storage medium
It executes instruction, when the computer executed instructions are executed by processor, realizes method described in any one of claims 1-6.
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| CN113281942A (en) * | 2021-04-20 | 2021-08-20 | 信利（惠州）智能显示有限公司 | Method for improving detection rate of point defects caused by TN (twisted nematic) model Island residues |
| CN113433721A (en) * | 2021-06-17 | 2021-09-24 | 惠科股份有限公司 | Liquid crystal display panel testing method and device |
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| CN1716780A (en) * | 2005-07-22 | 2006-01-04 | 友达光电股份有限公司 | Shift buffer memory driving circuit and its level shift device |
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