CN109256942B - Self-adaptive starting circuit suitable for primary side feedback flyback converter - Google Patents

Self-adaptive starting circuit suitable for primary side feedback flyback converter Download PDF

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CN109256942B
CN109256942B CN201811293105.5A CN201811293105A CN109256942B CN 109256942 B CN109256942 B CN 109256942B CN 201811293105 A CN201811293105 A CN 201811293105A CN 109256942 B CN109256942 B CN 109256942B
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primary side
signal
flyback converter
comparator
input end
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CN109256942A (en
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罗萍
唐天缘
张辽
王强
凌荣勋
邓成达
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University of Electronic Science and Technology of China
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/36—Means for starting or stopping converters

Abstract

A self-adaptive starting circuit suitable for a primary side feedback flyback converter belongs to the technical field of switching power supplies. The negative input end of the error amplifier is connected with a primary side inductance current limit signal which is proportional to the output voltage of the primary side feedback flyback converter, the positive input end of the error amplifier is connected with the reference voltage, and the output end of the error amplifier is connected with the negative input end of the first comparator; the positive input end of the first comparator is connected with the sawtooth wave signal, and the output end of the first comparator outputs a pulse width modulation signal; the positive input end of the second comparator is connected with the primary side inductive current limit signal, the negative input end of the second comparator is connected with the primary side inductive current peak value signal, and the output end of the second comparator outputs a current limit judgment signal after passing through the latch; the logic module generates an output signal according to the pulse width modulation signal and the current-limiting judgment signal and is used for controlling the on and off of a switching tube in the primary side feedback flyback converter. The invention can adaptively adjust the starting speed of the primary side feedback flyback converter and ensure that the primary side feedback flyback converter always works in a DCM mode.

Description

Self-adaptive starting circuit suitable for primary side feedback flyback converter
Technical Field
The invention belongs to the technical field of switching power supplies, and relates to a self-adaptive starting circuit suitable for a primary side feedback flyback converter.
Background
The primary side feedback flyback converter has the advantages of natural input and output electric isolation effect, no need of an optical coupler, easiness in expanding multi-path output and the like, and is a product which is favored in a switching power supply. In the primary side feedback flyback converter, the demagnetization speed of the secondary side inductor depends on the magnitude of the output voltage. In the starting process, the output voltage slowly rises from zero, so that the demagnetizing speed of the secondary side inductor is low in a long time, the transformer cannot be completely reset, and the system continuously works in a CCM (continuous conduction mode) mode, so that a series of negative effects such as system instability, power tube overcurrent damage, sampling voltage error and the like can be caused.
In the flyback converter, if the circuit works in a CCM mode, complete transfer of energy from the primary side to the secondary side cannot be realized in one period, which not only increases the volume of the transformer, but also causes the system to have a right half-plane zero point. The traditional solution reduces the loop bandwidth to a position far smaller than the right half-plane zero point through loop compensation, but the too narrow loop bandwidth causes the loop response to be too slow, and limits the high-frequency development of the switching power supply. Therefore, ensuring that the system always operates in DCM mode (discontinuous conduction mode) is a way to fundamentally remove the right half-plane zero. On the other hand, the voltage sampling technology of the primary side feedback flyback converter mostly depends on the resonance waveform characteristics after the demagnetization of the secondary side inductor in the DCM mode, and for a system working in the CCM mode, it is difficult to obtain the output voltage information, so it is very important to ensure that the circuit always works in the DCM in the starting and stabilizing stages of the flyback converter.
The existing control chip slowly charges the off-chip large capacitor through control current to realize soft start, and the system is prevented from continuously working in a CCM mode during starting, but the mode not only consumes extra PCB area, but also the soft start capacitor must be accurately designed, the system is difficult to start in a DCM mode due to an excessively small capacitance value, the system starting time is too long due to the excessively large capacitance value, and the output voltage is slowly established. In addition, the operating frequency of the primary side feedback flyback converter is reduced in the starting process, so that the starting speed is reduced to avoid entering a CCM mode. However, the two solutions do not consider the change of the output information, and whether the actual system enters the CCM mode or not mainly depends on the magnitude of the primary and secondary side inductances and the input and output voltage values, which are determined after the primary and secondary side inductances and the input voltage values are generally designed, so that the system only has the output voltage information which can possibly enter the CCM mode, and the higher the output voltage is, the higher the V isO/LSThe larger the secondary side degaussing time is, the less easy the CCM mode is to be entered, and vice versa.
Disclosure of Invention
Aiming at the problems that the operation of the primary side feedback flyback converter in a DCM mode is difficult to control in the starting process, and the cost and the precision are difficult to control due to the fact that an extra PCB (printed circuit board) area is consumed by using a large off-chip capacitor in a traditional soft starting mode, the invention provides the self-adaptive starting circuit suitable for the primary side feedback flyback converter, the soft starting is not required to be additionally designed, the starting speed can be dynamically adjusted according to the output voltage of the primary side feedback flyback converter, and the primary side feedback flyback converter is ensured to always work in the DCM mode in the starting process.
The technical scheme of the invention is as follows:
a self-adaptive starting circuit suitable for a primary side feedback flyback converter comprises an error amplifier, a first comparator, a second comparator, a latch and a logic module;
the negative input end of the error amplifier is connected with a primary side inductive current limit signal VKneeA forward input terminal thereof is connected to a reference voltage VrefThe output end of the first comparator is connected with the negative input end of the first comparator; the primary side inductive current limit signal VKneeThe voltage signal is proportional to the output voltage of the primary side feedback flyback converter;
the positive input end of the first comparator is connected with a sawtooth wave signal with the frequency equal to the working frequency of the primary side feedback flyback converter, and the output end of the first comparator outputs a pulse width modulation signal PWM and is connected with the first input end of the logic module;
the positive input end of the second comparator is connected with the primary side inductive current limit signal VKneeThe negative input end of the primary side inductor is connected with a primary side inductor current peak value signal VCSThe output end of the current limiting judging circuit outputs a current limiting judging signal P after passing through the latchLimitAnd is connected with the second input end of the logic module;
the output signal of the logic module is used for controlling the on and off of a switching tube in the primary side feedback flyback converter, and when the pulse width modulation signal PWM and the current-limiting judgment signal PLimitAnd when the voltage is high level, the logic module outputs high level, otherwise, the logic module outputs low level.
Specifically, the logic module includes an and gate, a first input end of the and gate is used as a first input end of the logic module, a second input end of the and gate is used as a second input end of the logic module, and an output end of the and gate outputs an output signal of the logic module.
The invention has the beneficial effects that: according to the invention, the voltage information proportional to the output feedback voltage of the primary side feedback flyback converter is used as the peak current limit of the primary side inductor, so that the circuit can be ensured to work in a DCM mode all the time, and the output can be ensured to rise normally; in addition, the self-adaptive starting circuit provided by the invention improves the system stability of the primary side feedback flyback converter, saves a large capacitor in the traditional soft starting mode, further improves the integration level of the primary side feedback flyback converter, and can self-adaptively adjust the starting speed when the output voltage rises faster or slower.
Drawings
Fig. 1 is a schematic structural diagram of an adaptive start circuit applied to a primary side feedback flyback converter provided by the present invention.
Fig. 2 is a schematic diagram of an operating waveform of an adaptive start-up circuit suitable for a primary feedback flyback converter according to the present invention.
Fig. 3 is a schematic structural diagram of an adaptive start-up circuit suitable for a primary feedback flyback converter in an embodiment of the present invention.
Detailed Description
The invention is described in detail below with reference to the figures and the specific embodiments.
Fig. 1 is a schematic structural diagram of the adaptive start-up circuit applied to a primary side feedback flyback converter, where the primary side feedback flyback converter includes a primary winding, a secondary winding, and an auxiliary winding. The primary winding comprising a primary inductor LPSwitching tube NM1And a primary side inductance current detection resistor RCSPrimary side inductance LPUpper end of which is connected with an input node V of a primary side feedback flyback converterINThe lower end is connected with a switch tube NM1The drain terminal of (1); switch tube NM1On one hand, the source end of the resistor detects the resistance R through the primary side inductance currentCSBack grounding, on the other hand, a leading edge blanking circuit is used for eliminating a primary side inductance current peak value signal V generated after a current peak which possibly causes misoperation and appears at the conduction moment of a switch tubeCS. The secondary winding comprises a secondary inductor LSDiode D1An output capacitor COAnd an output resistor RODiode D1The negative end of the output node V is connected with the primary side feedback flyback converterODiode D1Positive terminal connected secondary inductor LSOutput capacitance COAnd an output resistor ROAnd connected to output node VOAnd ground. The auxiliary winding comprising an auxiliary winding inductance LAA first voltage dividing resistor R1And a second voltage dividing resistor R2Primary side inductance LPAnd secondary inductance LSPrimary side inductance L with opposite terminalsPAnd auxiliary winding inductance LAThe homonymous end is opposite; first voltage dividing resistor R1One terminal and a second voltage dividing resistor R2One end is connected in series, and the first divider resistor R1The other end is connected with an auxiliary winding inductor LAOne terminal, a second divider resistor R2The other end is connected with an auxiliary winding inductor LAThe other end is grounded; first voltage dividing resistor R1And a second voltage dividing resistor R2The series point obtains output voltage feedback information containing a primary side feedback flyback converter after passing through a sampling circuit, and a primary side inductance current limit signal V in the inventionKneeIs a voltage signal proportional to the sampled output voltage of the primary feedback flyback converter, a primary inductive current limit signal VKneeAs the primary side inductance self-adaptive peak current limit.
When the primary side feedback flyback converter circuit is in a DCM (discontinuous conduction mode) conduction working mode:
tON+tS＜T (1)
wherein t isONIndicating switching tubes NM1On-time, tsRepresenting secondary inductance LSThe degaussing time, T, represents the switching period of the primary feedback flyback converter. When primary side inductance current limit signal VKneeWhen the setting is too high, the energy of the primary inductor cannot be fully transferred to the secondary side in each period, and therefore the circuit enters a CCM mode.
Meanwhile, in order to ensure that the voltage of the output filter capacitor is normally established, the energy provided by the primary side inductor is required to be larger than the energy consumed by the load in the starting stage, so that the energy can be obtained
Figure BDA0001850446930000031
Wherein VORepresenting the output voltage, RLRepresents the resistance value of the load, IPKRepresenting the peak value of the primary side inductor current, LPThe magnitude of the inductance of the primary side is indicated. When primary side inductance current limit signal VKneeWhen the setting is too low, the energy provided by the primary side inductor current in each period is completely consumed by the load, and no residual energy is used for charging the output capacitor, so that the output voltage cannot rise. Thus determining a reasonable primary side inductive current limit signal VKneeThe circuit can be ensured to work in a DCM mode all the time, and meanwhile, the output can be ensured to rise normally.
Based on this, the adaptive start-up circuit for the primary side feedback flyback converter provided by the present invention uses the voltage signal proportional to the output feedback voltage information of the primary side feedback flyback converter as the peak current limit of the primary side inductor, in this embodiment, the ratio is 1, that is, the sampled output voltage of the primary side feedback flyback converter is directly used as the current limit signal V of the primary side inductorKnee. As shown in fig. 1, the adaptive start-up circuit includes an error amplifier, a first comparator, a second comparator, a latch, and a logic block; the negative input end of the error amplifier is connected with the output voltage of the primary feedback flyback converter sampled by the sampling circuit and used as the primary inductive current limit signal V in the embodimentKneeA forward input terminal thereof is connected to a reference voltage VrefThe output end of the first comparator is connected with the negative input end of the first comparator; the positive input end of the first comparator is connected with a sawtooth wave signal with the frequency equal to the working frequency of the primary side feedback flyback converter, and the output end of the first comparator outputs a pulse width modulation signal PWM and is connected with the first input end of the logic module; the positive input end of the second comparator is connected with a primary side inductive current limit signal VKneeThe negative input end of the primary side inductor is connected with a primary side inductor current peak value signal VCSThe output end of the current limiting judging circuit outputs a current limiting judging signal P after passing through the latchLimitAnd is connected with the second input end of the logic module; the output signal of the logic module is connected with a switching tube NM in the primary side feedback flyback converter1Gate terminal of for controlling the switchTube NM1When the pulse width modulation signal PWM and the current limit judgment signal PLimitAnd when the voltage is high level, the logic module outputs high level, otherwise, the logic module outputs low level.
Primary side inductive current limit signal VKneeAnd a reference voltage VrefThe output generated by the comparison of the error amplifier and a sawtooth wave signal generate a Pulse Width Modulation (PWM) signal through a first comparator, wherein the sawtooth wave signal has the same frequency as the working frequency of the primary side feedback flyback converter, and the peak value range is within the output range of the error amplifier.
The second comparator detects the current peak value signal V of the primary side inductorCSCurrent limit signal V of primary side inductorKneeGenerating a current-limiting judgment voltage signal VLimit(ii) a In this embodiment, the output voltage of the primary feedback flyback converter is used as the peak current signal V of the primary inductorCSThe current limit signal V of the primary inductor may be a signal proportional to the output voltage of the primary feedback flyback converterKneeWhen the primary side inductance current peak value signal VCSExceeding the primary side inductive current limit signal VKneeThe second comparator output toggles.
The latch utilizes the clock signal of the primary feedback flyback converter to control the storage of the primary inductive current peak signal V in each period latchCSVoltage greater than primary side inductive current limit signal VKneeCausing the output of the second comparator to fall low and hold this low state until the next cycle. This is because the switch tube NM turns down the output of the second comparator1When the primary side inductance current is cut off, the primary side inductance current drops to 0 in a moment, so that V is causedCSThe voltage also drops to 0, at which point the second comparator returns to V againCSLess than VKneeResulting in the second comparator output turning high again, which would result in the switching tube NM if there were no latch1And is turned on again, so the state of the second comparator is also continuously inverted between high and low. Use of a latch avoids switching transistor NM due to the second comparator output turning constantly1Switching between the on state and the off state is continuous.
The current-limiting judgment voltage signal V output by the second comparatorLimitCurrent-limiting decision signal P generated by latchLimitPerforming logic processing on the PWM signal output by the first comparator when the PWM signal and the current-limiting judgment signal PLimitAnd when the voltage is high level, the logic module outputs high level, otherwise, the logic module outputs low level. As shown in FIG. 3, in some embodiments, the logic module includes an AND gate, and operation is performed by the AND gate to obtain a switching signal for starting the adaptive DCM mode, and the switching tube NM is connected to the driving circuit1Thereby controlling the switching tube NM1On and off. In other embodiments, instead of using an and gate, the logic may be triggered by a rising edge or a falling edge to control the logic block output signal.
In summary, the adaptive start-up circuit for the primary side feedback flyback converter provided by the invention takes the voltage signal proportional to the output feedback voltage of the primary side feedback flyback converter as the peak current limit of the primary side inductor, and the voltage on the auxiliary winding passes through the first voltage dividing resistor R when the circuit is started1And a second voltage dividing resistor R2After partial pressure, VAUXThe voltage contains output voltage magnitude information. The voltage on the auxiliary winding is sampled by a sampling circuit to obtain the output voltage of the primary side feedback flyback converter, and a voltage signal which is proportional to the output voltage of the primary side feedback flyback converter is used as a primary side inductance current limit signal VKneePrimary side inductive current limit signal VKneeIs a primary side inductance current detection resistor RCSVoltage V onCSCurrent limit of (d). Switch tube NM1Primary side inductance current peak value signal V when conductingCSGradually rises along with the current of the primary side inductor, and when the current of the primary side inductor reaches a limit signal VKneeOutput signal P of time latchLimitControlling PWM signal to turn down to control switch tube NM1And the control of the output voltage to the conduction time is finished by switching off, so that the circuit always works in a DCM mode when being started. The invention can realize primary side feedback flyback conversionThe device always works in a DCM mode in the starting process, the right half-plane zero point of a system transmission function in a CCM mode is avoided, the system stability is improved, a large capacitor in a traditional soft starting mode is omitted, the integration level of the flyback converter is further improved, and the starting speed can be adjusted in a self-adaptive mode when the output voltage rises fast or slowly.
Those skilled in the art can make various other specific changes and combinations based on the teachings of the present invention without departing from the spirit of the invention, and these changes and combinations are within the scope of the invention.

Claims (2)

1. A self-adaptive starting circuit suitable for a primary side feedback flyback converter is characterized by comprising an error amplifier, a first comparator, a second comparator, a latch and a logic module;
the negative input end of the error amplifier is connected with a primary side inductance current limit signal (V)Knee) A forward input terminal thereof is connected to a reference voltage (V)ref) The output end of the first comparator is connected with the negative input end of the first comparator; the primary side inductance current limit signal (V)Knee) The voltage signal is proportional to the output voltage of the primary side feedback flyback converter, and the output voltage of the primary side feedback flyback converter is generated by an auxiliary winding of the primary side feedback flyback converter;
the positive input end of the first comparator is connected with a sawtooth wave signal with the frequency equal to the working frequency of the primary side feedback flyback converter, and the output end of the first comparator outputs a pulse width modulation signal (PWM) and is connected with the first input end of the logic module;
the positive input end of the second comparator is connected with the primary side inductive current limit signal (V)Knee) The negative input end of the primary side inductor is connected with a primary side inductor current peak value signal (V)CS) The output end of the current limiting judging circuit outputs a current limiting judging signal (P) after passing through the latchLimit) And is connected with the second input end of the logic module;
the output signal of the logic module is used for controlling the on and off of a switching tube in the primary side feedback flyback converter, and when the pulse is generatedWidth modulation signal (PWM) and current limit judgment signal (P)Limit) And when the voltage is high level, the logic module outputs high level, otherwise, the logic module outputs low level.
2. The adaptive starting circuit for the primary feedback flyback converter according to claim 1, wherein the logic module comprises an and gate, a first input terminal of the and gate is used as a first input terminal of the logic module, a second input terminal of the and gate is used as a second input terminal of the logic module, and an output terminal of the and gate outputs the output signal of the logic module.
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