CN109245190A - A kind of power supply switch circuit of " when being packed into battery for the first time and disconnecting " - Google Patents
A kind of power supply switch circuit of " when being packed into battery for the first time and disconnecting " Download PDFInfo
- Publication number
- CN109245190A CN109245190A CN201710559061.5A CN201710559061A CN109245190A CN 109245190 A CN109245190 A CN 109245190A CN 201710559061 A CN201710559061 A CN 201710559061A CN 109245190 A CN109245190 A CN 109245190A
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- Prior art keywords
- power supply
- pmos
- battery
- voltage
- switch circuit
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0063—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with circuits adapted for supplying loads from the battery
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electronic Switches (AREA)
- Secondary Cells (AREA)
Abstract
The present invention discloses the power supply switch circuit of a kind of " when being packed into battery for the first time and disconnecting " comprising five PMOS switches, three phase inverters, a comparator circuit, an output end filter capacitor.The present invention can be produced in IC chip, to realize: inventory's stock is carried out with regard to installing backup battery immediately before electronic product factory, it will not activation system work.After only accessing an external power supply power supply, whole power supply switch circuit function just will start.The energy effective protection energy content of battery of the present invention, and it is user-friendly.
Description
Technical field
The invention patent relates to the power supply switch circuits of a kind of " when being packed into battery for the first time and disconnecting ".
Background technique
At this stage, all spare to be isolated by force using an additional thin plastic sheet after for most of electronics factory calibrations
Battery, to realize power-off and power saving.Otherwise spare although external power supply disconnects after being inspected by random samples before finished product test, factory
Battery, which has begun, to be continued to power, and is unfavorable for product long-time inventory.The method of above-mentioned common isolation reserve battery, there is also such as
Lower disadvantage:
1, using complexity effect customer experience.
2, material cost and human cost are increased.
Summary of the invention
The object of the present invention is to provide the power supply switch circuits of a kind of " when being packed into battery for the first time and disconnecting ", to overcome
Disadvantages mentioned above.Inventory's stock is carried out with regard to installing backup battery immediately before electronic product factory, chip can't work at this time
Make, battery will not power consumption.
To achieve the above object, the technical solution adopted by the present invention is that: a kind of " do not connect when being packed into battery for the first time is provided
It is logical " power supply switch circuit comprising five PMOS switches, three phase inverters, a comparator circuit, an output end filtering
Capacitor.Wherein, the comparator and inverter circuit differentiate the relative size of input voltage, they are unified by system output voltage
VSW power supply.The wherein lag function that comparator circuit needs to have certain, system frequency when avoiding two supply voltages very close
Numerous switching action.First, second phase inverter is used to increase the driving capability of Y1 and Y2 signal, accelerates opening for the first, second PMOS
Close speed.
The practical control power supply switched path of first, second PMOS, the size of the two PMOS determine theirs
Conduction impedance also determines voltage loss when circuit system load.
3rd PMOS and third inverter circuit are for realizing " when being packed into battery for the first time and disconnecting " function.Work as head
Secondary when being only packed into cell voltage, since output voltage VSW initial voltage is 0, then Y1, Y2 is 0, and the output of third phase inverter
Y3 is height, and third PMOS tube turns off, and VSW voltage remains 0, system not power consumption.
Four, the 5th PMOS is for selecting backing voltage of the relatively high voltage as the first, second PMOS.
PMOS also can be used in described first to the 5th PMOS tube and the transmission gate switch of NMOS transistor composition substitutes,
And by the control of corresponding significant level, identical work is completed.
The beneficial effect of the invention patent is, lowers production cost for following two practical application, facilitate inventory and
Client uses.It is described below in detail:
Using 1, when electronic product detects or calibrates, it can permit external power supply and power and carry out detection or calibration, and
Do not access battery；After the completion of detection, disconnect the external power supply of chip, then after be directly accessed battery again, inventory, battery at this time
Do not power to chip system.After only waiting client to use external power supply primary to the product electrifying startup, just according to electricity
Source condition discrimination switches into correct working condition.
Using 2, when ammeter detects or calibrates, it can permit external power supply and power and carry out detection or calibration, together
When access battery to test power supply handoff functionality.After the completion of detection, disconnects the external power supply of chip, extracts reserve battery,
Then battery is put in back, inventory, battery is not powered to chip system at this time.Only wait client using external power supply to the production
After product electrifying startup is primary, correct working condition is just switched into according to power supply status differentiation.
Detailed description of the invention
Attached drawing 1 is power supply switch circuit schematic diagram；
Attached drawing 2 is the specific implementation of phase inverter 3；
Attached drawing 3 is 1 course of work of method diagram；
Attached drawing 4 is 2 course of work of method diagram.
Specific embodiment
Below with reference to the embodiments and with reference to the accompanying drawing the technical solution to the invention patent is described in further detail.
Embodiment:
As shown in Figure 1, the invention patent is the power supply switch circuit of a kind of " when being packed into battery for the first time and disconnecting ", wherein wrapping
It includes: comparator CMP, phase inverter INV1, INV2 and INV3, PMOS tube M1, M2, M3, M4 and M5.
Power change-over switch module includes M1, M2 and M3 pipe, they pass through according to the size of power vd D and battery VBAT
Y1, Y2, Y3 signal that comparator CMP and INV1, INV2 and INV3 phase inverter automatic discrimination obtain select the greater to be switched to interior
Portion actual power end VSW.Wherein, in order to more stably realize " when being packed into battery for the first time and disconnecting " function, by adjusting
The breadth length ratio of metal-oxide-semiconductor realizes that biggish turn threshold voltage (ensures at the end VSW due to residual charge or is disturbed inside INV3
When, INV3 phase inverter is not judged by accident), specific implementation circuit is shown in Fig. 2.
PMOS switch underlayer voltage selecting module includes M4 and M5 pipe, according to the size of power vd D and battery VB AT, certainly
Dynamic selection the greater is switched to the end underlayer voltage VSUB.
INV3 is powered using cell voltage VBAT rather than VSW powers, when being in order to ensure suspending in VSW or being 0, Y3
Still there is a specific control of Electric potentials M3.
" the differentiating circuit " that comparator CMP and phase inverter INV1 and INV2 are constituted is powered using VSW, when circuit system for the first time
When using only VBAT power supply (VDD=0 or suspension), since the effect of capacitor C ensures VSW=0V, so output Y3=1 of INV3,
M3 is in an off state, it is ensured that VSW is still not switched on to VBAT.Y1=Y2=0 is maintained at low level state.
At this point, " differentiating circuit " starts to work if M1 is connected rapidly, VSW=VDD after access external power supply VDD, compare
M1 and M2 switch is controlled after the size of VBAT and VDD, makes corresponding gating movement.
Now explained with above two application:
It is as follows using 1 specific work process:
Step 1, when chip is produced, VDD=0V, VBAT=0V；Circuit does not work not power consumption.
Step 2, product is packed into battery, and VDD=0V, VBAT=0V jump to 3V；Circuit does not work not power consumption.
The rising initial stage of 3V is jumped in VBAT=0V, VSW is still 0V since capacitor C effect variation is very slow, and INV3 is anti-at this time
Phase device effectively (power source supplying voltage of the module is VBAT), guarantee Y3=VBAT is high level, cell switch branch (VBAT-
M3-M2-VSW it) is not turned on, VSW is always 0V, then circuit does not work not power consumption.
Step 3, test/sampling observation process, VDD=0V jump to 5V, VBAT=3V；Circuit works normally.
The rising initial stage of 5V is jumped in the V of VDD=0, M1 and M2 pipe control terminal Y1 and Y2 remain low potential, power supply is opened
Close branch (VDD-M1-VSW) effectively, VSW=VDD follows VDD the upward drift in 5V；INV3 phase inverter receives VSW high potential and obtains
Y3 is 0V low potential, so that M3 is connected.It is VDD=5V high potential, warp that COMP comparator, which is received VDD > VBAT to obtain output,
Crossing INV1 phase inverter and obtaining Y1=0V is low potential, keeps power switch branch effective；Y2=VSW is exported using INV2 phase inverter
=5V is high potential, so that cell switch M2, M3 branch is invalid.
Step 4, test/sampling observation terminates, and disconnects external power supply VDD, extracts battery VBAT.
Step 5, battery is reloaded before factory, as shown in step 2 circuit do not work, not power consumption.Inventory deposits for a long time at this time
It puts, battery capacity will not be consumed, i.e., will not shorten the service life of battery.
Fig. 3 is seen using 1 course of work diagram.
It is as follows using 2 specific work process:
Step 1, when chip is produced, VDD=0V, VBAT=0V；Circuit does not work not power consumption.
Step 2, it tests or inspects process by random samples, VDD=0V jumps to 5V, VBAT=0V；Circuit works normally.Chip can be tested
And the properties of circuit system.
Step 3, testing or inspect by random samples terminates, and disconnects external power supply VDD.
Step 4, battery is reloaded before factory, jumps to the rising initial stage of 3V in VBAT=0V, VSW is acted on due to capacitor C
It is still 0V that variation is very slow, and the Y3=VBAT of INV3 phase inverter output at this time is high level, cell switch branch (VBAT-M3-M2-VSW)
It is not turned on, VSW is still 0V, and circuit system do not work, not power consumption.Inventory stores for a long time at this time, will not consume battery capacity, i.e.,
The service life of battery will not be shortened.
Fig. 4 is seen using 2 courses of work diagram.
The above description is only a preferred embodiment of the present invention, is not intended to limit the scope of the invention, all utilizations
Equivalent structure or equivalent flow shift made by description of the invention and accompanying drawing content is applied directly or indirectly in other correlations
Technical field, be included within the scope of the present invention.
Claims (6)
1. a kind of power supply switch circuit of " when being packed into battery for the first time and disconnecting " comprising five PMOS switches, three reverse phases
Device, a comparator circuit, an output end filter capacitor.
2. power supply switch circuit according to claim 1, it is characterised in that the practical control power supply switching of the first, second PMOS
The size of access, the two PMOS determines their conduction impedance, also determines voltage loss when circuit system load.
3. power supply switch circuit according to claims 1 and 2, it is characterised in that the 3rd PMOS and third inverter circuit are used
" when being packed into battery for the first time and disconnect " function in realization；When being only packed into cell voltage for the first time, since output voltage VSW is initial
Voltage is 0, then Y1, and Y2 is 0, and the output Y3 of third phase inverter is height, and third PMOS tube turns off, and VSW voltage remains 0,
System not power consumption.
4. according to claim 1 to power supply switch circuit described in 3, it is characterised in that the four, the 5th PMOS are opposite for selecting
Backing voltage of the higher voltage as the first, second PMOS.
5. according to claim 1 to power supply switch circuit described in 4, it is characterised in that differentiated using comparator and inverter circuit
The relative size of input voltage, their unifications are powered by system output voltage VSW；Wherein comparator circuit needs to have centainly
Lag function, system frequent switching acts when avoiding two supply voltages very close；First, second phase inverter is for increasing Y1
With the driving capability of Y2 signal, accelerate the switching speed of the first, second PMOS.
6. according to claim 1 to power supply switch circuit described in 4, it is characterised in that the first to the 5th PMOS tube also can be used
The transmission gate switch of PMOS and NMOS transistor composition substitutes, and by the control of corresponding significant level, completes identical work.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710559061.5A CN109245190B (en) | 2017-07-11 | 2017-07-11 | Power supply switching circuit capable of being not switched on when battery is firstly loaded |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710559061.5A CN109245190B (en) | 2017-07-11 | 2017-07-11 | Power supply switching circuit capable of being not switched on when battery is firstly loaded |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109245190A true CN109245190A (en) | 2019-01-18 |
| CN109245190B CN109245190B (en) | 2020-08-28 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710559061.5A Active CN109245190B (en) | 2017-07-11 | 2017-07-11 | Power supply switching circuit capable of being not switched on when battery is firstly loaded |
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| CN (1) | CN109245190B (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN202134953U (en) * | 2011-02-15 | 2012-02-01 | 深圳市锐能微科技有限公司 | Power supply switching circuit |
| US20170005487A1 (en) * | 2013-02-25 | 2017-01-05 | Semiconductor Components Industries, Llc | Method of forming a balancing circuit for a plurality of battery cells and structure therefor |
| CN206302341U (en) * | 2016-10-21 | 2017-07-04 | 法乐第(北京)网络科技有限公司 | A kind of DC voltage changer |
-
2017
- 2017-07-11 CN CN201710559061.5A patent/CN109245190B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN202134953U (en) * | 2011-02-15 | 2012-02-01 | 深圳市锐能微科技有限公司 | Power supply switching circuit |
| US20170005487A1 (en) * | 2013-02-25 | 2017-01-05 | Semiconductor Components Industries, Llc | Method of forming a balancing circuit for a plurality of battery cells and structure therefor |
| CN206302341U (en) * | 2016-10-21 | 2017-07-04 | 法乐第(北京)网络科技有限公司 | A kind of DC voltage changer |
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| Publication number | Publication date |
|---|---|
| CN109245190B (en) | 2020-08-28 |
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Address after: 310052 2nd floor, 790 BINKANG Road, Binjiang District, Hangzhou City, Zhejiang Province Patentee after: Hangzhou Jinghua Microelectronics Co.,Ltd. Address before: 310052 2nd floor, 790 BINKANG Road, Binjiang District, Hangzhou City, Zhejiang Province Patentee before: HANGZHOU SDIC MICROELECTRONICS Co.,Ltd. |