CN109240979A - Data processing chip and LED display system - Google Patents
Data processing chip and LED display system Download PDFInfo
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- CN109240979A CN109240979A CN201810917946.2A CN201810917946A CN109240979A CN 109240979 A CN109240979 A CN 109240979A CN 201810917946 A CN201810917946 A CN 201810917946A CN 109240979 A CN109240979 A CN 109240979A
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- 238000012545 processing Methods 0.000 title claims abstract description 115
- 230000005540 biological transmission Effects 0.000 claims abstract description 38
- 230000006870 function Effects 0.000 claims description 24
- 230000015654 memory Effects 0.000 claims description 16
- 238000012937 correction Methods 0.000 claims description 12
- 230000005055 memory storage Effects 0.000 claims description 5
- 238000013461 design Methods 0.000 abstract description 6
- 238000012986 modification Methods 0.000 abstract description 3
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F2015/761—Indexing scheme relating to architectures of general purpose stored programme computers
- G06F2015/766—Flash EPROM
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Abstract
The present invention relates to a kind of data processing chip and LED display system, data processing chip is applied to LED display system, comprising: central processing unit for receiving instruction, and is instructed based on the received, handled data;Storage unit, for storing data;Interface unit, for sending and receiving data;Clock Managing Unit, for generating preset clock frequency;Bus, connection central processing unit, storage unit, interface unit and Clock Managing Unit;DMA channel connects storage unit and interface unit, and when being sent out data, interface unit is directly read the data in the storage unit, be sent out by DMA channel.Interface unit can be sent out data with its DMA channel between storage unit, without waiting for bus, not influence the data processing of central processing unit, the processing of data, efficiency of transmission are higher.Modification instruction, can be adjusted the function of chip execution, and the design of product is more flexible.
Description
Technical field
The present invention relates to data processing fields, more particularly to data processing chip and LED display system.
Background technique
Currently, in LED display system, the display data of host computer are generally first transferred to capture card and carry out Gamma correction etc.
It handles and then is sent on scanning card or terminal screen by the network port and be distributed, show.It is actual in order to meet
Display requires, and processing and transmission to data need to keep a higher processing and transmission speed.Such as it adopts at this stage
Data processing, transmission control chip on truck generally use fpga chip, compared to previous singlechip chip, in processing speed
It has been greatly improved on degree.But it is limited to the limitation of fpga chip itself, in the processing of data, transmission speed,
There are also very big rooms for promotion.Although the mode that FPGA can be emulated by first modification Verilog code, again, reconfigures, with
Meet the update of newly-increased product function or product;But relative to existing product update speed, FPGA is again
Configuration mode is just inflexible, restricts the development rate of product, increases development difficulty.
Summary of the invention
Based on this, available data processing chip aiming at the problem that lacking flexibility in terms of product up-gradation, it is necessary to provide
A kind of more flexible, higher speed data processing chip.
The present invention provides a kind of data processing chip, is applied to LED display system, comprising:
Central processing unit for receiving instruction, and is instructed based on the received, is handled data;
Storage unit, for storing data;
Interface unit, for sending and receiving data;
Clock Managing Unit, for generating preset clock frequency;
Bus connects the central processing unit, the storage unit, the interface unit and the Clock management list
Member;
DMA channel connects the storage unit and the interface unit, when being sent out data, the interface unit
By the DMA channel, the data in the storage unit are directly read, and are sent out by the interface unit.
Further, the central processing unit, including Instruction decoding module, computing module, register;Wherein,
Described instruction decoding module is instructed and is decoded for receiving, and generates the control signal operated needed for completing instruction;
The computing module, for handling data according to the control signal;
The register, for data and treated data needed for the storage computing module work.
Further, the data processing chip further includes dma controller, for controlling the DMA channel.
Further, the Clock Managing Unit includes reference clock module and clock frequency adjustment module, wherein
The reference clock module, for generating reference clock frequency;
The clock frequency adjustment module, for work clock needed for the reference clock frequency is adjusted to each unit
Frequency.
Further, the storage unit is random access memory.
Further, the storage unit further includes storage control module, is posted for managing the storage unit with described
Data transmission between storage.
Further, the bus includes data/address bus, address bus and control bus, and the storage control module is specific
It is transmitted for managing the storage unit and the register by the data that data/address bus carries out.
Further, the data processing chip further includes interrupt/exception administrative unit, carries out pipe with to interruption, exception
Reason.
The present invention also provides a kind of LED display systems, including data processing chip and non-volatile memories above-mentioned
Device, the nonvolatile memory are stored with instruction, and the data processing chip receives described instruction and handles data.
Further, the instruction of the nonvolatile memory storage is the instruction of gamma correction, the data processing core
The function of piece execution gamma correction.
Data processing chip provided by the invention, is applied in LED display system, by interface unit and storage unit
Between DMA channel is set, when being sent out data, interface unit can directly using DMA channel carry out data transmission, not have to
Bus is waited to carry out data transmission, the efficiency of transmission of data is higher;Also, because being not take up bus, in the same time, center
Processing unit still can use bus to carry out the reception of data, processing, without being influenced by data are sent out, greatly
Improve processing speed.Meanwhile the central processing unit of external command can be received by being arranged, difference refers to based on the received
It enables, data is carried out with different processing, to realize different functions.According to the needs of LED display system, instruction can be execution
The one or more functions of capture card and scanning card --- such as show that the gray proces of data, gamma correction are handled, data are beaten
Packet, data transmission etc..Thus the adjustment of the function of data processing chip can be realized by way of modifying external command,
Design, the adjustment of product are more flexible.
Detailed description of the invention
Fig. 1 is the architecture diagram of the data processing chip of one embodiment of the invention;
Fig. 2 is the refinement architecture diagram of the central processing unit of one embodiment of the invention;
Fig. 3 is the architecture diagram of the data processing chip of another embodiment of the present invention;
The architecture diagram of the data processing chip of the position Fig. 4 further embodiment of this invention.
Specific embodiment
To better understand the objects, features and advantages of the present invention, with reference to the accompanying drawing and specific real
Applying mode, the present invention will be described in detail.It should be noted that in the absence of conflict, presently filed embodiment and reality
The feature applied in mode can be combined with each other.
Unless otherwise defined, all technical and scientific terms used herein and belong to technical field of the invention
The normally understood meaning of technical staff is identical.Term as used herein in the specification of the present invention is intended merely to description tool
The purpose of the embodiment of body, it is not intended that in the limitation present invention.
Fig. 1 is the architecture diagram of the data processing chip of one embodiment of the invention.Specifically, at the data of the embodiment of the present invention
Chip 100 is managed, LED display system is applied to, comprising:
Central processing unit 10 for receiving instruction, and is instructed based on the received, is handled data;
Storage unit 20, for storing data;
Interface unit 30, for sending and receiving data;
Clock Managing Unit 40, for generating preset clock frequency;
Bus, connection central processing unit 10, storage unit 20, interface unit 30 and Clock Managing Unit 40;
DMA channel connects storage unit 20 and interface unit 30, and when being sent out data, interface unit 30 passes through DMA
Channel directly reads the data in storage unit 30, and is sent out by the interface unit 30.
After interface unit 30 receives data to be treated, instructed based on the received by central processing unit 10, logarithm
According to performing corresponding processing, then stored by storage unit 20.When needing externally to send treated data, interface list
Member 30 directly reads the corresponding data in storage unit 20, can be sent out data by DMA channel.
Central processing unit 10 receives externally input instruction, instructs based on the received, handles data.According to connecing
The difference of the instruction of receipts, central processing unit 10 can execute different functions.Externally input instruction, is stored at data
Manage the instruction in the external memory except chip.It is understood that by way of modifying program coding, can modify
The instruction being stored in external memory realizes the different disposal to data to change the function of central processing unit execution.Tool
Body is into LED display system, the instruction being stored in external memory, can be used for completing the function of capture card and scanning card
Can --- such as show gray proces, gamma correction processing, data packing, data transmission of data etc..According to LED display system
Actual needs, the instruction being stored in external memory can also complete other functions.
Data processing chip in the present embodiment, it can be understood as belong to a kind of asic chip, apply in LED display system
In, by the way that DMA channel is arranged between interface unit and storage unit, when being sent out data, interface unit can be directly sharp
The transmission that data are carried out with DMA channel is not needed to arbitrate the claim for obtaining bus with other units, be carried out without waiting for bus
Data transmission, the transmitting efficiency of data are higher.Also, it is single to read storage to have used DMA channel when because being sent out data
Member data, be not take up bus, in the same time, central processing unit still can use bus carry out the reception of data,
Processing, without being influenced by data are sent out, is greatly improved processing speed.Meanwhile outside can be received by setting
The central processing unit of instruction, data are carried out different processing by different instruction based on the received, to realize different functions.
According to the needs of LED display system, instruction can be the one or more functions for executing capture card and scanning card --- and it is such as aobvious
Gray proces, gamma correction processing, data packing, data transmission of registration evidence etc..It thus can be by modifying external command
Mode, realize the adjustment of the function of data processing chip, design, the adjustment of product are more flexible.At the data of the present embodiment
Chip is managed, data processing, the transmission of high speed may be implemented, be particularly suitable for display data processing and transmission, network data processing
Etc. scenes.
In wherein some embodiments, as shown in Fig. 2, central processing unit 10, may include Instruction decoding module 11, fortune
Calculate module 12, register 13;Wherein,
Instruction decoding module 11 is instructed and is decoded for receiving, and generates the control signal operated needed for completing instruction;
Computing module 12, for handling data according to control signal;
Register 13, for storing data that computing module 12 works required and treated data.
Specifically, the processing that arithmetic element 12 executes is arithmetic operation, mainly including arithmetical operation and logical operation, such as
Add, subtract, multiplication and division, with, it is non-etc..
Instruction decoding module 11 receives externally input instruction, and is corresponding control signal by the instruction translation.It is external
The instruction of input refers to the instruction stored in the external memory except data processing chip, for example is stored in flash storage
Instruction, code in device.It is understood that Instruction decoding module 11 has the interface outside connection, to realize to external defeated
The reception of the instruction entered.Obviously, by modifying to the instruction in external memory, code, the adjustment of function can be realized.
The process of successive generations of products is thus greatly simplified, so that the design of product is more flexible.
Instruction decoding module 11, computing module 12, register 13, both can individually connect with bus, can also unify by
A certain module connecting bus.For simplified architecture, bus is rationally utilized, as shown in figure 3, Instruction decoding module 11, computing module
12, register 13 is respectively connect with bus.
Further, data processing chip 100 further includes dma controller, for controlling DMA channel.DMA channel is mainly
In order to promote the speed with external I-goal data, target data, which refers to, needs data processing chip to instruct based on the received,
The data that main to be processed, needs are sent out.And between interface unit 30 and storage unit 20, in addition to transmission and target data
Other than relevant data, other kinds of data, such as status data, feedback data etc. can be also transmitted.In order to avoid unrelated class
The data transmission of type occupies DMA channel, influences the transmission of target data, dma controller can identify data type, and then control
The unlatching of DMA channel is then carried out data transmission using DMA channel if it is determined that belonging to target data;Otherwise DMA cannot be used
Channel transmission data can only be carried out data transmission using bus.
In one embodiment, each unit is all made of unified clock frequency in data processing chip, at this point, Clock management
Unit 40 is specially reference clock module, for generating reference clock frequency.In order to meet the high speed processing of data, reference clock
Frequency can be within the scope of 500MHz~1GHz.
In another embodiment, Clock Managing Unit 40, including reference clock module and clock frequency adjustment module.Its
In, reference clock module can produce reference clock frequency, and reference clock frequency is adjusted to each list by clock frequency adjustment module
The required working clock frequency of member.In this way, the different units in data processing chip, can select different according to actual needs
Working clock frequency, with equilibrium data high speed processing and cost.
In yet another embodiment, Clock Managing Unit 40, specially clock frequency adjustment module, according to external input
Reference clock frequency, adjust generate chip in each unit need working clock frequency.Since using in the circuit of chip, one
As can configurable clock generator frequency generation module the number of modules on chip reduced by using external clock frequency generation module
Amount, it is possible thereby to which chip is made smaller.
Storage unit 20 need store treated had between data, with central processing unit 10 data transmission, specifically
The data that are that treated in register 13, need to be transferred to storage unit 20 and are stored.Due to the work of central processing unit 10
Make speed quickly, in order to avoid the access speed of storage unit 20 influences the data transmission of register 13, and then affects
The processing speed of Central Processing Unit 10, in one embodiment, storage unit 20 are random access memory (RAM).Further
, storage unit 20 is preferably static random access memory (SRAM).
Further, storage unit 20 further includes storage control module, for manage storage unit 20 and register 13 it
Between data transmission.
Specifically, bus includes data/address bus, address bus and control bus, storage control module is single for managing storage
Member 20 is transmitted with register 13 by the data that data/address bus carries out.Storage control module can be obtained when needing to transmit data
It takes the control of data/address bus, coordinates register 13 and storage unit 20, so that the data for realizing on the data bus send, connect
It receives.In some embodiments, between storage unit 20 and register 13, the data of 20Gbps can be supported to transmit.
In one embodiment, the data that interface unit 30 receives, are transferred to storage unit by DMA channel first
20, when central processing unit 10 instructs based on the received, when handling data, register 13 obtains from storage unit 20
Data to be treated, then will treated that data are transferred to storage unit 20 stores.When externally sending data, interface
Unit 30 reads the data that store that treated in storage unit 20, is subsequently sent to outside by DMA channel.In this way, data
The data that processing chip receives, are temporarily stored in storage unit using DMA channel, using storage unit as data relay first
It stands, is just transferred data in register when needing to handle, the quantity of register can be reduced in this way.
In another embodiment, the data that interface unit 30 receives can also directly pass through bus transfer to deposit
In device 13, is instructed, handled based on the received by central processing unit 10, treated data re-transmission to storage unit 20
On stored.When sending out data, interface unit 30 is by DMA channel, reads and stores that treated in storage unit 20
Data are subsequently sent to outside.
In one embodiment, interface unit 30 includes receiving port and sending port.Receiving port is for receiving outside
The data of transmission, sending port are used to send data to outside.Receiving port and sending port can share one group of pin,
There can be respective individual pin.When receiving port and sending port share one group of pin, interface unit 30 further includes connecing
Mouth management module, for controlling and receiving the use of port and sending port to pin, such as receiving port and sending port timesharing
Multiplexing pins.In order to reduce the area of data processing chip, preferably receiving port and sending port shares one group of pin, and reduction is drawn
Foot quantity, and then reduce the area of data processing chip.
In one embodiment, interface unit supports the data transmission of 128bit.Sending port can have 128 and draw
Foot, for externally sending data.By supporting the data transmission of 128bit, realizes the high bandwidth of 128bit, can preferably expire
The data processing speed of sufficient high speed.
In another embodiment, interface unit supports the data transmission of 256bit.Specifically, interface unit has 256
A pin, receiving port and sending port share 256 pins and meet the data of high speed to realize the high bandwidth of 256bit
Processing speed.It is understood that receiving port and sending port can also have respective individual pin, i.e., it is each 256 own
Pin.But in order to reduce the area of data processing chip, preferably receiving port and sending port shares 256 pins.
In some embodiments, it as shown in figure 4, data processing chip 100, further includes interrupt/exception administrative unit 50, uses
Interruption, exception are managed.It, may be because of originals such as arithmetic operation or data accesses in the data processing chip course of work
There are various exceptions in cause, if do not handled them, may seriously affect the normal work of chip.By in setting
Disconnected/exception management unit 50, comes management interrupt, exception, to restore the normal work of data processing chip.
One embodiment of the invention additionally provides a kind of LED display system, includes above-mentioned data processing chip and non-volatile
Property memory, the nonvolatile memory is stored with instruction, and the data processing chip receives described instruction and carries out to data
Processing.
In one embodiment, the nonvolatile memory is specially flash memory.
In one embodiment, the instruction of nonvolatile memory storage is the instruction of gamma correction, at the data
Manage the function that chip executes gamma correction.
It is understood that being also possible to other functions to the processing of data according to the needs of LED display system, only
The function of data processing chip execution can be adjusted in the instruction that accordingly modify nonvolatile memory storage.Such as it instructs
It can be the one or more functions for executing capture card and scanning card --- such as show the gray proces of data, at gamma correction
Reason, data are packaged, data are sent etc..The function of instruction execution can be configured according to the needs of LED display system.
In one embodiment, the instruction of the nonvolatile memory storage is the instruction of network data transmission, the number
The function of network data transmission is executed according to processing chip.
By using above-mentioned data processing chip in LED display system, using individual DMA channel in interface unit
Carry out data transmission between storage unit, improve the transmitting efficiency of data, and do not influence the processing of data, can satisfy
High speed processing, the demand of transmission for showing data, realize preferable display effect.Also, it is stored in nonvolatile memory
The function of instruction can be adjusted, and then change at data by modifying software code for the instruction that central processing unit executes
The function that chip executes is managed, the one or more functions of capture card and scanning card can be executed --- such as show the gray scale of data
Processing, gamma correction processing, data packing, data transmission etc..It, can be with replacement acquisition card by using above-mentioned data processing chip
Block with scanning, reduce the complexity of LED display system, the flexibility of significant increase product design meets LED and shows that product is quick
Update the needs of iteration.
One embodiment of the invention additionally provides a kind of network equipment, includes above-mentioned data processing chip and non-volatile deposits
Reservoir, the nonvolatile memory are stored with the instruction of network data transmission, and the data processing chip receives described instruction
Data are handled.
By in the network device use above-mentioned data processing chip, using individual DMA channel interface unit with
Carry out data transmission between storage unit, can satisfy the high speed processing of network data, the demand of transmission.It can also receive and refer to
It enables, as needed, realizes to the different disposal of data, improve the flexibility of product design, adjustment.
In several specific embodiments provided by the present invention, it should be understood that disclosed system and method, it can be with
It realizes by another way.For example, system embodiment described above is only schematical, for example, the component
Division, only a kind of logical function partition, there may be another division manner in actual implementation.
In addition, each functional module/component in each embodiment of the present invention can integrate in same treatment module/component
In, it is also possible to modules/component and physically exists alone, can also be integrated in two or more module/components identical
In module/component.Above-mentioned integrated module/component both can take the form of hardware realization, can also add software using hardware
Functional module/component form is realized.
It is obvious to a person skilled in the art that the embodiment of the present invention is not limited to the details of above-mentioned exemplary embodiment,
And without departing substantially from the spirit or essential attributes of the embodiment of the present invention, this hair can be realized in other specific forms
Bright embodiment.Therefore, in all respects, the present embodiments are to be considered as illustrative and not restrictive, this
The range of inventive embodiments is indicated by the appended claims rather than the foregoing description, it is intended that being equal for claim will be fallen in
All changes in the meaning and scope of important document are included in the embodiment of the present invention.It should not be by any attached drawing mark in claim
Note is construed as limiting the claims involved.Furthermore, it is to be understood that one word of " comprising " does not exclude other units or steps, odd number is not excluded for
Plural number.Multiple units, module or the device stated in system, device or terminal claim can also be by the same units, mould
Block or device are implemented through software or hardware.The first, the second equal words are used to indicate names, and are not offered as any specific
Sequence.
The embodiments described above only express several embodiments of the present invention, and the description thereof is more specific and detailed, but simultaneously
It cannot therefore be construed as limiting the scope of the patent.It should be pointed out that coming for those of ordinary skill in the art
It says, without departing from the inventive concept of the premise, various modifications and improvements can be made, these belong to protection of the invention
Range.Therefore, the scope of protection of the patent of the invention shall be subject to the appended claims.
Claims (10)
1. a kind of data processing chip is applied to LED display system, characterized in that it comprises:
Central processing unit for receiving instruction, and is instructed based on the received, is handled data;
Storage unit, for storing data;
Interface unit, for sending and receiving data;
Clock Managing Unit, for generating preset clock frequency;
Bus connects the central processing unit, the storage unit, the interface unit and the Clock Managing Unit;
DMA channel connects the storage unit and the interface unit, and when being sent out data, the interface unit passes through
The DMA channel directly reads the data in the storage unit, and is sent out by the interface unit.
2. data processing chip according to claim 1, which is characterized in that the central processing unit, including instruction are translated
Code module, computing module, register;Wherein,
Described instruction decoding module is instructed and is decoded for receiving, and generates the control signal operated needed for completing instruction;
The computing module, for handling data according to the control signal;
The register, for data and treated data needed for the storage computing module work.
3. data processing chip according to claim 1, which is characterized in that the data processing chip further includes DMA control
Device processed, for controlling the DMA channel.
4. data processing chip according to claim 1, which is characterized in that the Clock Managing Unit includes reference clock
Module and clock frequency adjustment module, wherein
The reference clock module, for generating reference clock frequency;
The clock frequency adjustment module, for the frequency of work clock needed for the reference clock frequency is adjusted to each unit
Rate.
5. data processing chip according to claim 1, which is characterized in that the storage unit is random access memory
Device.
6. data processing chip according to claim 5, which is characterized in that the storage unit further includes storage control mould
Block, for managing the transmission of the data between the storage unit and the register.
7. data processing chip according to claim 6, which is characterized in that the bus includes that data/address bus, address are total
Line and control bus, the storage control module is specifically used for managing the storage unit and the register passes through data/address bus
The data of progress are transmitted.
8. data processing chip according to claim 1-7, which is characterized in that the data processing chip also wraps
Interrupt/exception administrative unit is included, is managed with to interruption, exception.
9. a kind of LED display system, including the described in any item data processing chips of claim 1-8 and non-volatile memories
Device, the nonvolatile memory are stored with instruction, and the data processing chip receives described instruction and handles data.
10. LED display system according to claim 9, which is characterized in that the instruction of the nonvolatile memory storage
For the instruction of gamma correction, the data processing chip executes the function of gamma correction.
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CN116030748A (en) * | 2023-03-30 | 2023-04-28 | 深圳曦华科技有限公司 | Method and device for dynamically adjusting chip clock frequency |
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