CN109213716A - A kind of I2C bus unit and a kind of I2C signal protection method - Google Patents
A kind of I2C bus unit and a kind of I2C signal protection method Download PDFInfo
- Publication number
- CN109213716A CN109213716A CN201810993998.8A CN201810993998A CN109213716A CN 109213716 A CN109213716 A CN 109213716A CN 201810993998 A CN201810993998 A CN 201810993998A CN 109213716 A CN109213716 A CN 109213716A
- Authority
- CN
- China
- Prior art keywords
- register
- port
- mode
- control unit
- channel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Alarm Systems (AREA)
Abstract
This application provides a kind of I2C bus units, comprising: I2C host interface, the I2C are used for information I2C signal communication between host and CPLD;I2C register group, the I2C register group is the CPLD internal register, including Mode Selection register, port select register, port configuration registers, port state register and alarm register, the I2C register group is for being written and read register data;Key control unit, the key control unit are the CPLD in house software control module, and the key control unit controls the read-write of I2C register data for being connected with the I2C register group;The key control unit is also used to be connected with configurable port unit, according to the operating mode and working condition of I2C register configuration, sets corresponding operating mode for different ports;The configurable port, the configurable port is used to be configured to I2C operating mode by the key control unit, or is configured to universal input and output port mode by the key control unit.
Description
Technical field
This application involves field of information transmission, and more particularly, to a kind of I2C bus unit and a kind of I2C signal
Guard method.
Background technique
I2C bus is a kind of simple, the bidirectional two-line synchronous serial bus developed by Philips company, using data
Line SDA and clock line SCL constitutes communication line, and each device can realize data transmit-receive by being parallel in bus, between device each other
The advantages that independence, is distinguished by unique bus address, has wiring few, and control mode is simple, and traffic rate is high.
Not only wiring is few for I2C bus, control mode is simple, but also can manage bus (System with compatible system
Management Bus, SMBUS), power management bus (Power Management Bus, PMBUS), therefore, in server
Portion is widely used I2C bus and carries out equipment management.When the equipment of carry in I2C bus is more, to ensure signal quality and always
Linear load mostly uses I2C switching chip to carry out bus extension, and this extended mode not only increases design cost, and increases
Board density and design difficulty.
Therefore, a kind of simple and effective way realization I2C bus extension is needed.
Summary of the invention
The application provides a kind of I2C bus unit, can be realized I2C bus extension.
In a first aspect, providing a kind of I2C bus unit, comprising: I2C host interface, the I2C for host and CPLD it
Between information I2C signal communication;I2C register group, the I2C register group are the CPLD internal register, including mode is selected
Select register, port select register, port configuration registers, port state register and alarm register, the I2C deposit
Device group is for being written and read register data;Key control unit, the key control unit are the CPLD in house software
Control module, the key control unit control the read-write of I2C register data for being connected with the I2C register group;Institute
It states key control unit to be also used to be connected with configurable port unit, according to the operating mode of I2C register configuration and work shape
Different ports is set corresponding operating mode by state;The configurable port, the configurable port are used for by the core
Heart control unit is configured to I2C operating mode, or is configured to universal input and output port mode by the key control unit.
With reference to first aspect, in the first possible implementation of the first aspect, the Mode Selection register is
8bit register, every 1bit data correspond to 1 group of IO in the configurable port, are for selecting the operating mode of the port, 1
I2C operating mode, 0 is GPIO operating mode;
With reference to first aspect and its above-mentioned implementation, the port select register are 8bit register, every 1bit number
According to the on-off of 1 group of I2C signal in the correspondence configurable port, the port select register function is in the model selection
Register port can come into force when being configured to I2C mode, and 1 represents the unlatching port channel I2C, and 0, which represents closing port I2C, leads to
Road;The port configuration registers are 8bit register, and every 1bit data correspond to the defeated of 1 group of GPIO in the configurable port
Enter output mode, the port configuration registers function is raw when the Mode Selection register port is configured to GPIO mode
Effect, 1, which represents the port, represents the port as input pattern, 0 as output mode;The port state register includes 3 8bit
Register, every 3bit data correspond to the real-time status of 1 group of GPIO in the configurable port, and the port state register exists
The Mode Selection register port can just come into force when being configured to GPIO mode, and 1 represents the GPIO state as height, and 0 representative should
GPIO state is low;The alarm register includes alarm ALERT channel register and alarm ALERT information register 1 to report
Alert ALERT information register 8, the ALERT channel register is for storing the channel I2C of accordingly alarming in configurable port, institute
ALERT information register is stated to be respectively used to store the warning message in 8 groups of channels I2C in the configurable port.
With reference to first aspect and its above-mentioned implementation, in the second possible implementation of the first aspect, described
Configurable port unit includes at least 8 groups of ports CPLD.
With reference to first aspect and its above-mentioned implementation, in a third possible implementation of the first aspect, described
Key control unit is also used to monitor I2C signal clock signal or I2C data signal levels state.
Second aspect provides a kind of I2C signal protection method, comprising: judge the operating mode of I2C bus unit;Work as institute
When the operating mode for stating I2C bus unit is GPIO mode, the configuration port configured in the I2C bus unit is output and input
Mode, and configure the output state of the input state of the port, the inquiry port;When the work of the I2C bus unit
Whether mode is I2C mode, opened according to the channel I2C, it is determined whether alarm.
In conjunction with second aspect, in the first possible implementation of the second aspect, whether opened according to the channel I2C
Open, it is determined whether alarm, comprising: when the channel I2C open when, judge be in the data information transmitted in the channel I2C
No there are warning messages, and according to whether determine whether to alarm there are warning message.
The present invention proposes a kind of I2C bus expansion based on CPLD for settlement server inside I2C bus extension problem
Exhibition and guard method, make it not only and single channel I2C signal extension multipath I 2 C signal may be implemented, but also I2C signal may be implemented
With the conversion of universal input and output port, meanwhile, the extension and guard method can also protect I2C signal, effectively anti-
Only I2C signal " hanging dead ".
Detailed description of the invention
Fig. 1 is the schematic block diagram of the device of the application one embodiment.
Fig. 2 is the schematic flow chart of the method for the application one embodiment.
Specific embodiment
Below in conjunction with attached drawing, the technical solution in the application is described.
As shown in Figure 1, showing a kind of I2C bus unit, comprising: I2C host interface, the I2C for host and
Information I2C signal communication between CPLD;I2C register group, the I2C register group are the CPLD internal register, including
Mode Selection register, port select register, port configuration registers, port state register and alarm register, it is described
I2C register group is for being written and read register data;Key control unit, the key control unit are in the CPLD
Portion's software control module, the key control unit control I2C register data for being connected with the I2C register group
Read-write;The key control unit is also used to be connected with configurable port unit, according to the operating mode of I2C register configuration and
Different ports is set corresponding operating mode by working condition;The configurable port, the configurable port are used for quilt
The key control unit is configured to I2C operating mode, or is configured to universal input output end by the key control unit
Mouth mold formula.
Optionally, as the application one embodiment, the Mode Selection register is 8bit register, every 1bit data
1 group of IO in the corresponding configurable port, for selecting the operating mode of the port, 1 is I2C operating mode, and 0 is GPIO work
Operation mode;The port select register is 8bit register, and every 1bit data correspond to 1 group of I2C in the configurable port
The on-off of signal, the port select register function can give birth to when the Mode Selection register port is configured to I2C mode
Effect, 1 represents the unlatching port channel I2C, and 0 represents the closing port channel I2C;The port configuration registers are 8bit deposit
Device, every 1bit data correspond to the input and output mode of 1 group of GPIO in the configurable port, the port configuration registers function
It can come into force when the Mode Selection register port is configured to GPIO mode, 1 represents the port as input pattern, and 0 representative should
Port is output mode;The port state register includes 3 8bit registers, and every 3bit data correspond to the configurable end
The real-time status of 1 group of GPIO in mouthful, the port state register are configured to GPIO in the Mode Selection register port
It can just come into force when mode, 1 represents the GPIO state, and as height, 0, to represent the GPIO state be low;The alarm register includes alarm
To alarm ALERT information register 8, the channel ALERT is deposited for ALERT channel register and alarm ALERT information register 1
Device is respectively used to match described in storage for storing the channel I2C of accordingly alarming in configurable port, the ALERT information register
Set the warning message in 8 groups of channels I2C in port.
Optionally, as the application one embodiment, the configurable port unit includes at least 8 groups of ports CPLD.
Optionally, as the application one embodiment, the key control unit is also used to monitor I2C signal clock signal
Or I2C data signal levels state.
Specifically,
(1) I2C host interface includes I2C signal clock signal wire (SCL), data signal line (SDA), alarm signal line
(ALERT), the I2C signal connection being mainly used between host and CPLD, realizes host to the read-write capability of I2C register group.
(2) I2C register group is CPLD internal register, including Mode Selection register, port select register, port
Configuration register, port state register and alarm register.
Mode Selection register is 8bit register, and 1 group of IO (3) in the corresponding configurable port of every 1bit data is used
In the operating mode for selecting the port, 1 is I2C operating mode, and 0 is GPIO operating mode;
Port select register is 8bit register, 1 group of I2C signal in the corresponding configurable port of every 1bit data
(SCL/SDA/ALERT) on-off, register functions corresponding port only in Mode Selection register are configured to I2C mode
Shi Caihui comes into force, and 1 represents the unlatching port channel I2C, and 0 represents the closing port channel I2C;
Port configuration registers are 8bit register, the input of 1 group of GPIO in the corresponding configurable port of every 1bit data
Output mode, the register functions can just come into force when corresponding port is configured to GPIO mode only in Mode Selection register, and 1
It represents the port and represents the port as input pattern, 0 as output mode;
Port state register is 3 8bit registers, the reality of 1 group of GPIO in the corresponding configurable port of every 3bit data
When state, which can just come into force when corresponding port is configured to GPIO mode only in Mode Selection register, 1 generation
The table GPIO state is height, and 0 to represent the GPIO state be low;
Alarm register includes I2C ALERT channel register and ALERT information register 1~8, the deposit of the channel ALERT
For storing the channel I2C of accordingly alarming in configurable port, ALERT information register is respectively used to store in configurable port device
The specific warning message (SCL is low, SDA is low etc.) in 8 groups of channels I2C.
(3) key control unit is CPLD in house software control module, control module one side and I2C register group phase
Even, the read-write to I2C register data is realized;On the other hand it is connected with configurable port unit, according to I2C register configuration
Different ports is set different operating modes by operating mode and working condition.Meanwhile key control unit is also supervised in real time
I2C signal SCL/SDA level state is controlled, if it is more than 600ms, core that the SCL/SDA signal in a certain channel, which drags down the time by equipment end,
Heart control unit both can determine whether link exception, to automatically cut off the connection between the I2C link and host I2C signal, prevent
Only I2C signal is dragged down the appearance for causing letter " to hang dead " phenomenon by equipment end.
(4) can configure port unit includes but is not limited to 8 groups of ports CPLD (every group of 3 IO), can both have been controlled by core single
Member is configured to I2C operating mode (SCL/SDA/ALERT), and universal input and output port mould can also be configured to by key control unit
Formula (GPIO).
Fig. 2 shows the schematic flow charts of the method for another embodiment of the application, as shown in Fig. 2,
(1) after system starting, for host by I2C interface configuration work mode, 8 groups of ports are mutually indepedent, can individually carry out
Configuration, if being configured to I2C mode, enters step (2), if being configured to GPIO mode, enters step (6);
(2) channel Selection of chiller I2C is turned on or off, if selection is opened, is entered step (3), otherwise, is entered step
(9);
(3) host and channel I2C equipment carry out data communication, enter step (4);
(4) warning message is judged whether there is, is alarmed if it exists, (5) is entered step, alarms if it does not exist, enter step
(9);
(5) host query is specifically alarmed channel and detailed warning message, into (9);
(6) host configuration port input pattern or output mode, into (7);
(7) host is that output port configures output state, and 1 is height, and 0 is low, into (8);
(8) host query input port level state, 1 is height, and 0 is low, enters step (9);
Terminate.
Those of ordinary skill in the art may be aware that list described in conjunction with the examples disclosed in the embodiments of the present disclosure
Member and algorithm steps can be realized with the combination of electronic hardware or computer software and electronic hardware.These functions are actually
It is implemented in hardware or software, the specific application and design constraint depending on technical solution.Professional technician
Each specific application can be used different methods to achieve the described function, but this realization is it is not considered that exceed
The scope of the present invention.
It is apparent to those skilled in the art that for convenience and simplicity of description, the system of foregoing description,
The specific work process of device and unit, can refer to corresponding processes in the foregoing method embodiment, and details are not described herein.
In several embodiments provided herein, it should be understood that disclosed systems, devices and methods, it can be with
It realizes by another way.For example, the apparatus embodiments described above are merely exemplary, for example, the unit
It divides, only a kind of logical function partition, there may be another division manner in actual implementation, such as multiple units or components
It can be combined or can be integrated into another system, or some features can be ignored or not executed.Another point, it is shown or
The mutual coupling, direct-coupling or communication connection discussed can be through some interfaces, the indirect coupling of device or unit
It closes or communicates to connect, can be electrical property, mechanical or other forms.
The unit as illustrated by the separation member may or may not be physically separated, aobvious as unit
The component shown may or may not be physical unit, it can and it is in one place, or may be distributed over multiple
In network unit.It can select some or all of unit therein according to the actual needs to realize the mesh of this embodiment scheme
's.
It, can also be in addition, the functional units in various embodiments of the present invention may be integrated into one processing unit
It is that each unit physically exists alone, can also be integrated in one unit with two or more units.
It, can be with if the function is realized in the form of SFU software functional unit and when sold or used as an independent product
It is stored in a computer readable storage medium.Based on this understanding, technical solution of the present invention is substantially in other words
The part of the part that contributes to existing technology or the technical solution can be embodied in the form of software products, the meter
Calculation machine software product is stored in a storage medium, including some instructions are used so that a computer equipment (can be a
People's computer, server or the second equipment etc.) it performs all or part of the steps of the method described in the various embodiments of the present invention.
And storage medium above-mentioned includes: that USB flash disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), arbitrary access are deposited
The various media that can store program code such as reservoir (RAM, Random Access Memory), magnetic or disk.
The above description is merely a specific embodiment, but scope of protection of the present invention is not limited thereto, any
Those familiar with the art in the technical scope disclosed by the present invention, can easily think of the change or the replacement, and should all contain
Lid is within protection scope of the present invention.Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (6)
1. a kind of I2C bus unit characterized by comprising
I2C host interface, the I2C are used for information I2C signal communication between host and CPLD;
I2C register group, the I2C register group are the CPLD internal register, including Mode Selection register, channel choosing
Register, port configuration registers, port state register and alarm register, the I2C register group is selected to be used for deposit
Device data are written and read;
Key control unit, the key control unit are the CPLD in house software control module, the key control unit
For being connected with the I2C register group, the read-write of I2C register data is controlled;The key control unit is also used to and can
It configures port unit to be connected, according to the operating mode and working condition of I2C register configuration, sets corresponding for different ports
Operating mode;
The configurable port, the configurable port are used to be configured to I2C operating mode by the key control unit, or
Universal input and output port mode is configured to by the key control unit.
2. the apparatus according to claim 1, which is characterized in that
The Mode Selection register is 8bit register, and every 1bit data correspond to 1 group of IO in the configurable port, are used for
The operating mode of the port is selected, 1 is I2C operating mode, and 0 is GPIO operating mode;
The port select register is 8bit register, and every 1bit data correspond to 1 group of I2C signal in the configurable port
On-off, the port select register function can come into force when the Mode Selection register port is configured to I2C mode, 1
It represents and opens the port channel I2C, 0 represents the closing port channel I2C;
The port configuration registers are 8bit register, and every 1bit data correspond to 1 group of GPIO's in the configurable port
Input and output mode, the port configuration registers function are raw when the Mode Selection register port is configured to GPIO mode
Effect, 1, which represents the port, represents the port as input pattern, 0 as output mode;
The port state register includes 3 8bit registers, and every 3bit data correspond to 1 group in the configurable port
The real-time status of GPIO, the port state register just meeting when the Mode Selection register port is configured to GPIO mode
It comes into force, 1 represents the GPIO state, and as height, 0, to represent the GPIO state be low;
The alarm register includes alarm ALERT channel register and alarm ALERT information register 1 to alarm ALERT letter
Register 8 is ceased, the ALERT channel register is for storing the channel I2C of accordingly alarming in configurable port, the ALERT letter
Breath register is respectively used to store the warning message in 8 groups of channels I2C in the configurable port.
3. device according to claim 1 or 2, which is characterized in that the configurable port unit includes at least 8 groups of CPLD
Port.
4. device according to any one of claim 1 to 3, which is characterized in that the key control unit is also used to supervise
Control I2C signal clock signal or I2C data signal levels state.
5. a kind of I2C signal protection method characterized by comprising
Judge the operating mode of I2C bus unit;
When the operating mode of the I2C bus unit is GPIO mode, the configuration port configured in the I2C bus unit is defeated
Enter and output mode, and configures the output state of the input state of the port, the inquiry port;
When the I2C bus unit operating mode be I2C mode, whether opened according to the channel I2C, it is determined whether report
It is alert.
6. according to method described in right 5, which is characterized in that whether opened according to the channel I2C, it is determined whether alarm, packet
It includes:
When the channel I2C is opened, judge with the presence or absence of warning message in the data information transmitted in the channel I2C, and
According to whether determining whether to alarm there are warning message.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201810993998.8A CN109213716A (en) | 2018-08-29 | 2018-08-29 | A kind of I2C bus unit and a kind of I2C signal protection method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201810993998.8A CN109213716A (en) | 2018-08-29 | 2018-08-29 | A kind of I2C bus unit and a kind of I2C signal protection method |
Publications (1)
Publication Number | Publication Date |
---|---|
CN109213716A true CN109213716A (en) | 2019-01-15 |
Family
ID=64985202
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201810993998.8A Pending CN109213716A (en) | 2018-08-29 | 2018-08-29 | A kind of I2C bus unit and a kind of I2C signal protection method |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN109213716A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110046120A (en) * | 2019-04-12 | 2019-07-23 | 苏州浪潮智能科技有限公司 | Data processing method, device, system and storage medium based on IIC agreement |
CN110896372A (en) * | 2019-12-02 | 2020-03-20 | 深圳震有科技股份有限公司 | I2C link switching method, terminal and storage medium |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1694082A (en) * | 2005-05-26 | 2005-11-09 | 海信集团有限公司 | Radio transmission system of I2C bus data |
CN101329663A (en) * | 2008-07-31 | 2008-12-24 | 炬力集成电路设计有限公司 | Apparatus and method for implementing pin time-sharing multiplexing |
CN102981996A (en) * | 2012-11-26 | 2013-03-20 | 福州瑞芯微电子有限公司 | Expansion device and method for periphery interfaces |
CN106649180A (en) * | 2016-09-09 | 2017-05-10 | 锐捷网络股份有限公司 | Method and device for relieving I2C bus deadlock |
-
2018
- 2018-08-29 CN CN201810993998.8A patent/CN109213716A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1694082A (en) * | 2005-05-26 | 2005-11-09 | 海信集团有限公司 | Radio transmission system of I2C bus data |
CN101329663A (en) * | 2008-07-31 | 2008-12-24 | 炬力集成电路设计有限公司 | Apparatus and method for implementing pin time-sharing multiplexing |
CN102981996A (en) * | 2012-11-26 | 2013-03-20 | 福州瑞芯微电子有限公司 | Expansion device and method for periphery interfaces |
CN106649180A (en) * | 2016-09-09 | 2017-05-10 | 锐捷网络股份有限公司 | Method and device for relieving I2C bus deadlock |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110046120A (en) * | 2019-04-12 | 2019-07-23 | 苏州浪潮智能科技有限公司 | Data processing method, device, system and storage medium based on IIC agreement |
CN110896372A (en) * | 2019-12-02 | 2020-03-20 | 深圳震有科技股份有限公司 | I2C link switching method, terminal and storage medium |
CN110896372B (en) * | 2019-12-02 | 2022-02-18 | 深圳震有科技股份有限公司 | I2C link switching method, terminal and storage medium |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN109491946A (en) | A kind of chip and method for I2C bus extension | |
CN106649180B (en) | A kind of releasing I2The method and device of C bus deadlock | |
CN107181659B (en) | Intelligent cabinet communication method and system based on RS485 bus | |
CN105808407B (en) | Method, equipment and the equipment management controller of management equipment | |
CN107111588A (en) | The data transfer of PCIe protocol is used via USB port | |
US20050165997A1 (en) | Data communication system | |
CN105425783A (en) | Real vehicle data processing method and system, controller and upper computer | |
CN109213716A (en) | A kind of I2C bus unit and a kind of I2C signal protection method | |
CN101447915A (en) | Method for realizing automatic and smooth switch among different network topology structures and network device thereof | |
CN107872494A (en) | A kind of information push method and device | |
CN105807722A (en) | Numerical control system including internal register self-reset function with serial communication signal monitoring | |
CN109032062A (en) | A kind of PCIE switching chip | |
JP2016144204A (en) | Data collection terminal and data collection system using the same | |
CN109446145A (en) | A kind of channel server master board I2C extended chip, circuit and control method | |
CN101621424A (en) | Intelligent monitoring method of Infiniband exchanger | |
JP2003132038A5 (en) | ||
CN104394101A (en) | Dial switch-based multi-functional switch and quick configuration method thereof | |
CN101414175A (en) | Method, apparatus and system for equipment interconnection | |
CN109558360A (en) | The methods of exhibiting and device of electronic system architecture | |
CN103226535B (en) | A kind of microserver and management method thereof | |
CN108361020A (en) | Underground drill rig diagnosis protective device and method based on virtual instrument | |
CN103246243B (en) | For the extensible architecture of human-computer interface device | |
CN201323593Y (en) | Network device for automatic smooth switching between various network topology structures | |
CN208000578U (en) | A kind of blade type data processing equipment | |
CN108427608A (en) | Event alarm method and event alarm device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20190115 |
|
RJ01 | Rejection of invention patent application after publication |