CN109151623A - A kind of large-scale strict non-blockage light-crossing connection matrix structure and its control method - Google Patents
A kind of large-scale strict non-blockage light-crossing connection matrix structure and its control method Download PDFInfo
- Publication number
- CN109151623A CN109151623A CN201811252544.1A CN201811252544A CN109151623A CN 109151623 A CN109151623 A CN 109151623A CN 201811252544 A CN201811252544 A CN 201811252544A CN 109151623 A CN109151623 A CN 109151623A
- Authority
- CN
- China
- Prior art keywords
- sel
- unit
- alternative
- input
- value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 22
- 239000011159 matrix material Substances 0.000 title claims abstract description 20
- 230000003287 optical effect Effects 0.000 claims description 10
- 238000004364 calculation method Methods 0.000 claims description 3
- 125000004122 cyclic group Chemical group 0.000 claims description 2
- 239000000203 mixture Substances 0.000 claims description 2
- 230000000903 blocking effect Effects 0.000 abstract description 5
- 239000013307 optical fiber Substances 0.000 description 7
- 238000010586 diagram Methods 0.000 description 5
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000004891 communication Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 235000013399 edible fruits Nutrition 0.000 description 1
- 239000000835 fiber Substances 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q11/00—Selecting arrangements for multiplex systems
- H04Q11/0001—Selecting arrangements for multiplex systems using optical switching
- H04Q11/0005—Switch and router aspects
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q11/00—Selecting arrangements for multiplex systems
- H04Q11/0001—Selecting arrangements for multiplex systems using optical switching
- H04Q11/0005—Switch and router aspects
- H04Q2011/0037—Operation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q11/00—Selecting arrangements for multiplex systems
- H04Q11/0001—Selecting arrangements for multiplex systems using optical switching
- H04Q11/0005—Switch and router aspects
- H04Q2011/0052—Interconnection of switches
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q11/00—Selecting arrangements for multiplex systems
- H04Q11/0001—Selecting arrangements for multiplex systems using optical switching
- H04Q11/0005—Switch and router aspects
- H04Q2011/0052—Interconnection of switches
- H04Q2011/0058—Crossbar; Matrix
Abstract
A kind of large-scale strict non-blockage light-crossing connection matrix structure and its control method, first, for each alternative element numerals of every level-one, label rule is, each alternative unit is successively from left to right labeled as 0 from top to bottom, 1,2, ..., and the label is corresponded with each alternative unit sel bit that will be controlled, that is sel [0] controls the selection output of label Unit 0, and sel [1] controls the selection output of label Unit 1, and sel [q] controls the selection output of label q unit;Secondly, according to route handoff demand, from the input of the road m which selects as output, correct 0/1 value is assigned to each sel, correctly to be selected each alternative unit, n grades of each alternative units of serial connection network by the selection all the way of demand in the road m and can then export under corresponding sel control.The problem of present invention has strictly non-blocking characteristic, and there is no route handoff failures.
Description
Technical field
The present invention relates to the allocation plans and its control method of optical cross connect in optic communication and optical-fiber network transmission, especially relate to
And a kind of large-scale strict non-blockage light-crossing connection matrix structure and its control method, the optical fiber for optical cross connection device
Wiring.
Background technique
With the broadband high speed development of telecommunication network, the scale of telecommunication market increases substantially, and optical fiber is as telecommunication transmission
Main medium be laid with spread each corner.In telecom operation department, when carrying out optical fiber distributing using optical cross connection device, wish
The case where hoping light intersects obstructing problem is not present, that is, being not in cross-over configuration failure.And it is desirable that cross-capacity is as big as possible, with
Realize the automatic interconnection of large-scale optical fiber.So how to design simple to operation, strictly non-blocking and can realize big rule
The allocation plan of mode fiber interconnection is particularly important.For example, by AT&T Labs Charles doctor Clos in 1953
The CLOS network that year proposes, it includes multiplying m optical switch module by r n to constitute input stage;M r multiplies in r optical switch module composition
Intercaste;R m multiplies n optical switch module and constitutes output stage, connects between three-level optical switch module for symmetrical chiasma.The matrix structure
Only in m >=2n-1, just there is strictly non-blocking characteristic.In addition, being needed multiple when carrying out intersecting switching to CLOS network
Miscellaneous method configures the structure.Since CLOS network path selection is not unique, it can output is generated there are many mode,
And a newly-built later routing will consider configured routing before, cannot have an impact to configured routing in the past, institute
To propose very high requirement to routing algorithm when using CLOS structure.In short, good optical cross connect technology is to telecommunications network
The broadband further development of network plays the role of vital.
Summary of the invention
Present invention aim to solve the problems, such as above-mentioned technology, provide a kind of simple operable, stringent
Clog-free, allocation plan without the limitation of any condition and suitable for large-scale optical fiber interconnection is that is, a kind of extensive tight
The clog-free optical cross-connect matrix structure of lattice and its control method.
The present invention to achieve the above object, is adopted the technical scheme that: a kind of extensive strictly non-blocking light intersection company
Connect matrix structure, which is characterized in that the structure is made of most basic alternative unit, is n grades of serial connection networks, n value
To guarantee 2^n >=m smallest positive integral, wherein m is number to be intersected;
The n grade is connected in series network, and every level-one is made of a alternative unit of m/ (2^r)+m% (2^r), wherein r=1,
2 ..., n, even m/ (2^r) are aliquant, then the result of quotient is taken to add 1;
Between n grades of serial connection networks, the input of each alternative unit of rear stage, for upper level output by arranging from top to bottom
Afterwards, being successively grouped two-by-two as a result, if after grouping it is remaining all the way, that mends one 0 value virtually for this all the way, to gather into rear class
The input that alternative unit is two, the input of alternative unit each for the first order, m circuit-switched data as to be intersected, method one
The input of the road m is arranged from top to bottom, is grouped two-by-two, then the input as each alternative unit of the first order by sample, by this structure,
Afterbody centainly only includes an alternative unit.
A kind of control method of large-scale strict non-blockage light-crossing connection matrix structure, which is characterized in that light is intersected
The method that each alternative unit in connection matrix switches over is as follows:
Firstly, being each alternative element numerals of every level-one, label rule is from left to right successively to select from top to bottom by each two
Unit one is labeled as 0,1,2 ..., and the label is corresponded with each alternative unit sel bit that will be controlled,
That is sel [0] controls the selection output of label Unit 0, and sel [1] controls the selection output of label Unit 1, and sel [q] controls label q
The selection of unit exports;
Secondly, which selecting as output from the input of the road m according to route handoff demand, being assigned to correctly to each sel
0/1 value, correctly to be selected each alternative unit, n grades of each alternative units of serial connection network are controlled at corresponding sel
Under system, then by the selection all the way of demand in the road m and it can export;
The calculation method of sel control signal is provided below by a few row pseudocodes, generally, the road m is inputted, it is assumed that be from
Wherein select kth road as output, k=0,1,2 ..., m-1, pseudocode is as follows:
1st row --- for (n=1, j=0;n<=max_n;n++)
2nd row --- (i=1 for;i<=(m/(2^n)+m%(2^n));i++,j++)
3rd row --- sel [j]=((2*i-1)==(k/ (2^ (n-1))))1 : 0;
N therein, j, i are cyclic variable;M indicates the input of the road m;K expression selects kth road as output;Max_n is according to formula
Next the smallest positive integral that 2^max_n >=m is calculated illustrates each row meaning: the 1st row pseudocode is meant that, is tied
Structure is max_n grades of serial connections;2nd row is meant that, corresponds to the number of alternative unit in every grade;3rd behavior calculates each two
A unit is selected to correspond to the value of sel bit, concrete meaning is that two inputs to each alternative unit judge whether respectively
For k value to be selected, if a high position for alternative unit is equal with k value, corresponding sel bit is 1, if alternative list
Equal or high-order and low level is not equal with k value with k value for the low level of member, then corresponding sel bit is 0;
0/1 value that sel controls each bit of signal is obtained by the above method, to complete defeated to the selection of each alternative unit
Out, it corresponds to matrix structure that is, realizes and select the functional requirement as output all the way from the input of the road m;
It can be seen that the structure with the control method to alternative unit each in structure from the matrix structure of foregoing description to be not present
Obstructing problem after routing configuration switching, that is, changes each 0/1 value of bit of sel, then can be by the switching all the way in the input of the road m
To output, the problem of failure there is no route handoff;In addition, there is no limit conditions for the structure, and after input number m is determined, square
Battle array structure and the sel bit place value of each alternative unit are just decided, and are realized and are intersected from the routing for being input to output.
The beneficial effects of the present invention are: 1, interconnection routing capacity is big, large-scale optical fiber interconnection routing is suitble to match
It sets.2, the problem of there is strictly non-blocking characteristic, fail there is no route handoff.3, control method is simple and reliable, and without any
Restrictive condition.
The present invention provides beneficial reference for the broadband further development of telecommunication network.
Detailed description of the invention
Fig. 1 is the cross matrix structural schematic diagram that the road m of the present invention inputs the output of the road m;
Fig. 2 is that m of the present invention selects 1 structural schematic diagram and as Figure of abstract;
Fig. 3 is that the present invention 8 selects 1 structural schematic diagram;
Fig. 4 is that the present invention 9 selects 1 structural schematic diagram.
Specific embodiment
Below in conjunction with attached drawing and example, the present invention will be further described.
Fig. 1 illustrates the cross matrix structure chart of the road the m input road m output.Per the m exported in all corresponding diagrams 2 all the way
Select 1 minor structure.The minor structure is n grades of serial connection networks, and n value is to guarantee 2^n >=m smallest positive integral.N grades of serial connection nets
Every level-one of network is made of a alternative unit of m/ (2^r)+m% (2^r), wherein r=1,2 ..., n.N grades of serial connection networks it
Between, the input of each alternative unit of rear stage, be upper level output by arranging from top to bottom after, the knot that is successively grouped two-by-two
Fruit.The input of alternative unit each for the first order, m circuit-switched data as to be intersected, method is the same, by the road m input on to
Lower arrangement, is grouped two-by-two, then the input as each alternative unit of the first order.By this structure, afterbody centainly only includes
One alternative unit.Sel_y in Fig. 2 is the control selections signal of the road y output, each bit control of sel_y
One alternative unit.Each bit of sel_y method corresponding with alternative unit is, is first each alternative list of every level-one
First label, label rule are that each alternative unit is successively from left to right labeled as 0,1,2 from top to bottom ....Label with
Each alternative unit sel_y bit that will be controlled corresponds, such as the selection of sel_y [0] control label Unit 0
Output.
Fig. 3 shows that 8 select 1 structure, is 3 grades of serial connection networks.The first order includes 8/ (2^1)=4 alternative list
Member, the second level include 8/ (2^2)=2 alternative unit, and the third level includes (8/2^3)=1 alternative unit.By from top to bottom
Label rule from left to right, and the corresponding relationship with each bit of sel_0, are marked sel_0 [0]-sel_0 in figure
[6].For example, need the I (7) for selecting input to be crossed to the O (0) of output when user is specified, the value of each bit of that sel_0 is,
Sel_0 [0]=x, sel_0 [1]=x, sel_0 [2]=x, sel_0 [3]=1, sel_0 [4]=x, sel_0 [5]=1, sel_0 [6]=1,
Wherein x indicates that the bit can be 0 or 1.For another example, the I (1) of selection input is needed to be crossed to the O (0) of output when user is specified,
The value of each bit of that sel_0 is sel_0 [0]=1, sel_0 [1]=x, sel_0 [2]=x, sel_0 [3]=x, sel_0 [4]=0,
Sel_0 [5]=x, sel_0 [6]=0.Through example as can be seen that after front end input m value determines, under matrix structure just determines
Come, the sel signal for the only corresponding every road output for needing to control.Each bit of sel control signal corresponds to corresponding two
A selector is selected, the value of signal is controlled by changing sel, can realize that the selection for being input to output intersects.In addition, the structure
There is no obstructing problems, and when sel control signal value changes, output can change therewith, and there is no asking for configuration failure
Topic.
Fig. 4 shows that 9 select 1 structure.Select 1 structure with 8 the difference is that, in addition to afterbody, remaining is at different levels
True input is not 2 multiple, so after being grouped according to the rule being grouped two-by-two from top to bottom, the last one two choosing
Only one the true input of Unit one, needs to use 0 virtual value complement complete by as shown in the figure at this time, to gather into alternative basic unit
Two inputs.Since the 4 power durations 2 can just be greater than 9, so 9 select 1 structure to include 4 grades of serial connections.By in Fig. 4
The bit label of sel_0 is carried out to each alternative unit, for example, when user is specified needing that the I (5) of input is selected to be crossed to
The O (0) of output, the value of each bit of that sel_0 are sel_0 [0]=x, sel_0 [1]=x, sel_0 [2]=1, sel_0 [3]=x,
Sel_0 [4]=x, sel_0 [5]=x, sel_0 [6]=0, sel_0 [7]=x, sel_0 [8]=1, sel_0 [9]=x, sel_0 [10]=
0。
Corresponding each bit place value of sel when selecting the output of 1 tunnel from the road m is listed above by specific example.It is general
, the road m is inputted, from kth road is wherein selected, as output, k=0, the value that 1,2 ..., m-1, sel control signal should be how
It calculates, provides calculation method below by a few row pseudocodes.Pseudocode is as follows:
1st row --- for (n=1, j=0;n<=max_n;n++)
2nd row --- (i=1 for;i<=(m/(2^n)+m%(2^n));i++,j++)
3rd row --- sel [j]=((2*i-1)==(k/ (2^ (n-1)))) 1 : 0;
Max_n therein is the smallest positive integral being calculated according to formula 2^max_n >=m.
Next each row meaning is illustrated.1st row pseudocode is meant that structure is max_n grades of serial connections;The
2 rows are meant that, correspond to the number of alternative unit in every grade;3rd behavior calculates each alternative unit and corresponds to sel bit
Value, concrete meaning are that two inputs to each alternative unit judge whether it is k value to be selected, if alternative respectively
A high position for unit is equal with k value, then corresponding sel bit is 1, if the low level of alternative unit is equal or high-order with k value
Inequal with k value with low level, then corresponding sel bit is 0.Below by a specific example, the fortune of lower pseudocode is seen
Row process.For example, selecting the 5th tunnel as output from the input of 8 tunnels, notice that inputting road serial number is since 0.Specifically calculated
Journey is as follows,
n=1,
i=1,(2*i-1=1)!=(k/ (2^ (n-1)=5), therefore sel [0]=0;
i=2,(2*i-1=3)!=(k/ (2^ (n-1)=5), therefore sel [1]=0;
I=3, (2*i-1=5)==(k/ (2^ (n-1)=5), therefore sel [2]=1;
i=4,(2*i-1=7)!=(k/ (2^ (n-1)=5), therefore sel [3]=0;
n=2,
i=1,(2*i-1=1)!=(k/ (2^ (n-1)=2), therefore sel [4]=0;
i=2,(2*i-1=3)!=(k/ (2^ (n-1)=2), therefore sel [5]=0;
n=3,
I=1, (2*i-1=1)==(k/ (2^ (n-1)=1), therefore sel [6]=1;
By the calculating of above-mentioned pseudocode, obtained each sel bit place value is substituted into matrix structure shown in Fig. 3, on inspection
Such calculated result realizes the demand that the 5th tunnel of selection exports from the input of 8 tunnels really.
Claims (2)
1. a kind of large-scale strict non-blockage light-crossing connection matrix structure, which is characterized in that the structure is by two most basic choosings
The composition of Unit one is n grades of serial connection networks, and n value is to guarantee 2^n >=m smallest positive integral, and wherein m is number to be intersected;
The n grade is connected in series network, and every level-one is made of a alternative unit of m/ (2^r)+m% (2^r), wherein r=1,
2 ..., n, even m/ (2^r) are aliquant, then the result of quotient is taken to add 1;
Between n grades of serial connection networks, the input of each alternative unit of rear stage, for upper level output by arranging from top to bottom
Afterwards, being successively grouped two-by-two as a result, if after grouping it is remaining all the way, that mends one 0 value virtually for this all the way, to gather into rear class
The input that alternative unit is two, the input of alternative unit each for the first order, m circuit-switched data as to be intersected, method one
The input of the road m is arranged from top to bottom, is grouped two-by-two, then the input as each alternative unit of the first order by sample, by this structure,
Afterbody centainly only includes an alternative unit.
2. a kind of control method using large-scale strict non-blockage light-crossing connection matrix structure described in claim 1,
It is characterized in that, the method switched over to each alternative unit in optical cross-connect matrix is as follows:
Firstly, being each alternative element numerals of every level-one, label rule is from left to right successively to select from top to bottom by each two
Unit one is labeled as 0,1,2 ..., and the label is corresponded with each alternative unit sel bit that will be controlled,
That is sel [0] controls the selection output of label Unit 0, and sel [1] controls the selection output of label Unit 1, and sel [q] controls label q
The selection of unit exports;
Secondly, which selecting as output from the input of the road m according to route handoff demand, being assigned to correctly to each sel
0/1 value, correctly to be selected each alternative unit, n grades of each alternative units of serial connection network are controlled at corresponding sel
Under system, then by the selection all the way of demand in the road m and it can export;
The calculation method of sel control signal is provided below by a few row pseudocodes, generally, the road m is inputted, it is assumed that be from
Wherein select kth road as output, k=0,1,2 ..., m-1, pseudocode is as follows:
1st row --- for (n=1, j=0;n<=max_n;n++)
2nd row --- (i=1 for;i<=(m/(2^n)+m%(2^n));i++,j++)
3rd row --- sel [j]=((2*i-1)==(k/ (2^ (n-1))))1 : 0;
N therein, j, i are cyclic variable;M indicates the input of the road m;K expression selects kth road as output;Max_n is according to formula
Next the smallest positive integral that 2^max_n >=m is calculated illustrates each row meaning: the 1st row pseudocode is meant that, is tied
Structure is max_n grades of serial connections;2nd row is meant that, corresponds to the number of alternative unit in every grade;3rd behavior calculates each two
A unit is selected to correspond to the value of sel bit, concrete meaning is that two inputs to each alternative unit judge whether respectively
For k value to be selected, if a high position for alternative unit is equal with k value, corresponding sel bit is 1, if alternative list
Equal or high-order and low level is not equal with k value with k value for the low level of member, then corresponding sel bit is 0;
0/1 value that sel controls each bit of signal is obtained by the above method, to complete defeated to the selection of each alternative unit
Out, it corresponds to matrix structure that is, realizes and select the functional requirement as output all the way from the input of the road m;
It can be seen that the structure with the control method to alternative unit each in structure from the matrix structure of foregoing description to be not present
Obstructing problem after routing configuration switching, that is, changes each 0/1 value of bit of sel, then can be by the switching all the way in the input of the road m
To output, the problem of failure there is no route handoff;In addition, there is no limit conditions for the structure, and after input number m is determined, square
Battle array structure and the sel bit place value of each alternative unit are just decided, and are realized and are intersected from the routing for being input to output.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201811252544.1A CN109151623A (en) | 2018-10-25 | 2018-10-25 | A kind of large-scale strict non-blockage light-crossing connection matrix structure and its control method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201811252544.1A CN109151623A (en) | 2018-10-25 | 2018-10-25 | A kind of large-scale strict non-blockage light-crossing connection matrix structure and its control method |
Publications (1)
Publication Number | Publication Date |
---|---|
CN109151623A true CN109151623A (en) | 2019-01-04 |
Family
ID=64809755
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201811252544.1A Pending CN109151623A (en) | 2018-10-25 | 2018-10-25 | A kind of large-scale strict non-blockage light-crossing connection matrix structure and its control method |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN109151623A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109873623A (en) * | 2019-03-11 | 2019-06-11 | 深圳市杰普特光电股份有限公司 | Selection switch |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1356569A (en) * | 2000-08-31 | 2002-07-03 | 朗迅科技公司 | NxN cross-linking switch using wavelength router and space switch |
US20040178935A1 (en) * | 2003-03-11 | 2004-09-16 | Yokogawa Electric Corporation | Optical signal processing system |
CN101394678A (en) * | 2008-11-07 | 2009-03-25 | 烽火通信科技股份有限公司 | Serialization/de-serialization interface module generally used in GEPON/GPON |
CN102904819A (en) * | 2012-09-28 | 2013-01-30 | 北京华为数字技术有限公司 | Router networking network and cross-over router |
CN104076445A (en) * | 2013-03-28 | 2014-10-01 | Jds尤尼弗思公司 | Compact multicast switches, MxN switches and MxN splitters |
WO2014155033A1 (en) * | 2013-03-28 | 2014-10-02 | British Telecommunications Public Limited Company | Optical switch |
CN106134116A (en) * | 2014-04-25 | 2016-11-16 | 华为技术有限公司 | Use the apparatus and method of the expansible smooth packet configuration of PIC switch |
-
2018
- 2018-10-25 CN CN201811252544.1A patent/CN109151623A/en active Pending
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1356569A (en) * | 2000-08-31 | 2002-07-03 | 朗迅科技公司 | NxN cross-linking switch using wavelength router and space switch |
US20040178935A1 (en) * | 2003-03-11 | 2004-09-16 | Yokogawa Electric Corporation | Optical signal processing system |
CN101394678A (en) * | 2008-11-07 | 2009-03-25 | 烽火通信科技股份有限公司 | Serialization/de-serialization interface module generally used in GEPON/GPON |
CN102904819A (en) * | 2012-09-28 | 2013-01-30 | 北京华为数字技术有限公司 | Router networking network and cross-over router |
CN104076445A (en) * | 2013-03-28 | 2014-10-01 | Jds尤尼弗思公司 | Compact multicast switches, MxN switches and MxN splitters |
WO2014155033A1 (en) * | 2013-03-28 | 2014-10-02 | British Telecommunications Public Limited Company | Optical switch |
CN106134116A (en) * | 2014-04-25 | 2016-11-16 | 华为技术有限公司 | Use the apparatus and method of the expansible smooth packet configuration of PIC switch |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109873623A (en) * | 2019-03-11 | 2019-06-11 | 深圳市杰普特光电股份有限公司 | Selection switch |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8908674B2 (en) | Method for configuring an optical network | |
AU670141B2 (en) | Routing logic means | |
CN103797737B (en) | Optical architecture and channel plan employing multi-fiber configurations for data center network switching | |
US5631902A (en) | Digital cross-connect system | |
US9584373B2 (en) | Configurable Clos network | |
CN102740177B (en) | Non-blocking expandable multistage photoswitch array and working method thereof | |
CN101277547A (en) | Large-scale strict non-blockage light-crossing connection matrix structure and control method thereof | |
CN105190386A (en) | Method for crosstalk and power optimization in silicon photonic based switch matrices | |
CN114363251B (en) | Low-complexity obstacle avoidance routing method and device for Benes network | |
CN109151623A (en) | A kind of large-scale strict non-blockage light-crossing connection matrix structure and its control method | |
CN109327410B (en) | Improved three-level CLOS routing method based on FPGA crossing | |
CN113114220B (en) | Chip system with remapping function and chip remapping configuration system | |
Karol | Optical interconnection using shufflenet multihop networks in multi-connected ring topologies | |
CN110062303A (en) | Adaptive high capacity of switch optical communication equipment framework based on mesh network | |
CN208987108U (en) | A kind of large-scale strict non-blockage light-crossing connection matrix structure | |
CN100417079C (en) | Automatic protection conversion device for synchronous digital system branch | |
US7729360B2 (en) | Switching network | |
EP2112790B1 (en) | Method for mapping a protection scheme over a switching system | |
CN101141213B (en) | Time slot optimizing configuration method of multiple time-division module | |
US20020009255A1 (en) | Switch modules, a switch matrix including such modules, and a non-blocking modular switch network including such a matrix | |
CN101309222B (en) | Method, apparatus and system for regulating network routing | |
KR100262474B1 (en) | Methods and system for immediately connecting and reswitching digital cross-connect networks | |
Varsou et al. | Waveband protection mechanisms in hierarchical optical networks | |
CN107079205B (en) | PIC type optical switch matrix routing configuration method and device | |
CN210745452U (en) | Structure for realizing large-capacity line intersection |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
WD01 | Invention patent application deemed withdrawn after publication | ||
WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20190104 |