CN109143022B - Method and circuit for preventing damage caused by reverse insertion of single chip microcomputer chip - Google Patents
Method and circuit for preventing damage caused by reverse insertion of single chip microcomputer chip Download PDFInfo
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- 238000012544 monitoring process Methods 0.000 claims abstract description 47
- 241001323319 Psen Species 0.000 claims abstract description 14
- 238000001514 detection method Methods 0.000 claims description 39
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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- G01R31/2853—Electrical testing of internal connections or -isolation, e.g. latch-up or chip-to-lead connections
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
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Abstract
A method and a circuit for protecting a singlechip chip from damage caused by reverse insertion. A monitoring circuit is provided, which contains a main microprocessor chip U2 to monitor whether the MCS-51 series chip U1 of the singlechip is reversely inserted into the socket. The transistor Q1 in the monitoring circuit is connected in series with the Vcc input end of the power supply of the singlechip. The 3 pins of the chip U1 are respectively and electrically connected to the P1 pins of the main chip U2; when the singlechip is powered on, the first method is to detect that the pin P1.3 of the main chip U2 is at a high level, and the singlechip is in a reset state, wherein the pins PSEN and ALE of the U1 are both at the high level and are in a normal state; otherwise, if the two pins are at low level, U1 is reversely inserted, Q1 is instantaneously converted into cut-off, and Vcc is blocked; in the second method, the value of the pressure drop V D‑S of the Q1 pipe is detected, if the pressure drop V D‑S is abnormally increased, U1 is reversely inserted, Q1 is cut off instantaneously, and Vcc is blocked. The method and the circuit are simple and reliable, and are suitable for teaching and learning occasions of 51 series single chip microcomputer.
Description
Technical Field
The invention relates to a single-chip microcomputer (hereinafter referred to as a single-chip microcomputer or a single-chip microcomputer) used as a teaching instrument, in particular to a method and a circuit for protecting and warning the chip of the MCS-51 series single-chip microcomputer from being reversely inserted to cause damage in teaching and learning processes.
Background
The MCS-51 series single chip microcomputer in the prior art is widely applied to the fields of intelligent management of instruments and meters, household appliances, medical equipment, aerospace and various special equipment, process control and the like in the electronic control equipment manufacturing industry, the teaching of colleges and universities and intermediate occupations. However, when using the single chip microcomputer, some beginners often do not know the pin arrangement sequence of the microprocessor (hereinafter referred to as a chip or a main chip) for the single chip microcomputer, and easily insert the single chip microcomputer chip into the dual in-line socket thereof in a reverse direction (hereinafter referred to as a reverse plug), so that the single chip microcomputer and the chip circuits thereof are short-circuited, and the chip and the peripheral circuits are injured or even damaged.
Disclosure of Invention
The invention aims to solve the technical problem that the defect of the prior art is avoided and provides a method for judging whether the singlechip chip is reversely inserted or not by detecting specific output voltage values of PSEN and ALE pins of the singlechip chip or comparing power field effect transistors in a peripheral circuit of the singlechip for switching on/off the singlechip and a chip power supply Vcc thereof in a reset process of switching on the power supply of the singlechip chip by detecting drain-source current I D-S change of the power supply Vcc when the power supply Vcc is normally switched on and the chip is reversely inserted. Once the chip is detected to be reversely inserted, a detection monitoring circuit immediately outputs a power supply shutoff signal, the field effect transistor is instantly converted into a power off state, vcc power supply of the singlechip is interrupted, and simultaneously, acoustic and optical alarms are started to effectively protect the singlechip and the chip thereof at microsecond speed.
The invention adopts the technical proposal for solving the technical problems that a method for protecting a singlechip chip from damage caused by reverse insertion comprises the following steps:
A. The method comprises the steps of setting a function of monitoring the level of at least two pins for an MCS-51 series chip U1 inserted by a singlechip, comparing the monitoring result with the level value of the two pins when the chip U1 works normally, and carrying out logic operation to judge whether the chip U1 is reversely inserted into a double-in-line socket SK1 of the singlechip. If yes, starting sound and light alarm in real time, and simultaneously enabling a transistor Q1 connected in series in a Power supply line of the singlechip to quickly cut off the voltage supply of a Power supply lead-in terminal Power, so that the terminal Vcc=0 of the chip U1 and peripheral equipment thereof;
B. In order to implement the step A, creating peripheral hardware circuits which are respectively and electrically connected with the singlechip and used for protecting the MCS-51 series chip U1 of the singlechip from damage caused by reverse insertion, writing software programs for controlling the peripheral hardware circuits to orderly operate and storing the software programs in a read-only memory, so as to manufacture a detection monitoring circuit for ensuring the safe operation of the singlechip for teaching and learning;
C. In the teaching and learning process, if the lead pin RST of the MCS-51 series chip U1 of the singlechip presents a high level, the singlechip is in a reset state; at this time, if the singlechip is working normally, the pins PSEN and ALE of the chip U1 should be both high level; otherwise, the lead pins PSEN and ALE are low, and the chip U1 should be determined to be inserted into the SK1 socket of the singlechip upside down;
D. In order to implement the steps a to C, another microprocessor is provided as a main chip U2 of a detection and monitoring circuit for guarding the safe operation of the single chip microcomputer for teaching and learning, and the pins RST, PSEN and ALE of the single chip microcomputer U1 are electrically connected to the pins P1.3/ADC3, P1.2/ADC2 and P1.4/ADC4 of the main chip U2 of the detection and monitoring circuit, respectively, and when the single chip microcomputer is powered up, the level of the pin P1.3/ADC3 of the main chip U2 of the detection and monitoring circuit (400) is detected;
E. When the pin P1.3/ADC3 of the main chip U2 detects that the pin RST of the MCS-51 series chip U1 inserted by the singlechip is at a high level, if the pins P1.2/ADC2 and P1.4/ADC4 of the main chip U2 respectively detect that the levels of the pins PSEN and ALE of the chip U1 are also at the high level, the logic operation of the main chip U2 judges that the MCS-51 series chip U1 inserted by the singlechip is not reversely inserted; if the pins PSEN and ALE of the chip U1 are detected to be low level, determining that the main chip U1 is reversely inserted, immediately converting the logic determination into a hardware execution command by the main chip U2, transmitting the hardware execution command to a control end G of a transistor Q1 connected in series in a Power supply line, enabling the transistor Q1 to be instantaneously converted into a cut-off state, and blocking the voltage supply of a Power supply lead-in terminal Power; at the same time, the hardware execution command is transmitted to an audible and visual alarm circuit, so that the loudspeaker and/or the buzzer sound, and the diode LED-Y blinks and emits light.
In the above steps a and E, the transistor Q1 connected in series to the Power supply line of the singlechip is a Power field effect transistor MOSFET, and the gate G inputs a gate-source voltage signal Vg-s for "blocking the Power supply", and the transistor Q1 is immediately switched to the off state at a microsecond level speed, so as to block the voltage supply of the Power supply introduction terminal Power.
In the step B, the software program for controlling the peripheral hardware circuit to operate orderly is stored in the memory circuit of the detection and monitoring circuit or directly stored in the rom in the main chip U2, so that the memory circuit may not be separately provided.
The technical scheme adopted by the invention for solving the technical problems can be that another method for protecting the chip of the singlechip from damage caused by reverse insertion comprises the following steps:
A. The method comprises the steps of setting a function of monitoring the total current I D-S consumed by a single chip microcomputer when the single chip microcomputer is connected with a power supply Vcc for a MCS-51 series chip U1, comparing a monitoring result with the total current value consumed by the chip U1 in a normal working state stored in a read-only memory, and carrying out logic operation to judge whether the chip U1 is reversely inserted into a dual-in-line socket SK1 of the single chip microcomputer. If the total current value I D-S is abnormally increased, judging that a chip U1 is reversely inserted into the SK1 socket, starting a real-time sound and light alarm immediately, and simultaneously enabling a transistor Q1 connected in a Power supply line of the singlechip to quickly cut off the voltage supply of a Power supply introduction terminal Power so as to enable the chip U1 and a terminal Vcc=0 of peripheral equipment of the chip U1;
B. In order to implement the step A, creating peripheral hardware circuits which are respectively and electrically connected with the singlechip and used for protecting the MCS-51 series chip U1 of the singlechip from damage caused by reverse insertion, writing software programs for controlling the peripheral hardware circuits to orderly run, and storing the software programs in a read-only memory to prepare a detection monitoring circuit for ensuring the safe running of the singlechip for teaching and learning;
C. In order to implement the steps a and B, a microprocessor is additionally provided to be used as a main chip U2 of the detection and monitoring circuit for the safe operation of the single-chip microcomputer for teaching and learning, and a power field effect transistor MOSFET is simultaneously selected to be used as a transistor Q1 connected in series in the power supply line of the single-chip microcomputer, and by utilizing the characteristic that the conducting resistance value R D-S of the field effect transistor is basically unchanged when the field effect transistor is saturated and turned on, namely, R D-S is approximately equal to const, the value of the voltage drop V D-S of the transistor Q1 is monitored, so as to determine whether the consumption current I D-S of the single-chip microcomputer is abnormally increased;
D. To implement the above step C, the pins P1.1/ADC1 and P1.0/ADC0 of the main chip U2 in the monitor circuit are respectively coupled to the drain D and the source S of the transistor Q1 interrupting the supply of Power from the Power supply introduction terminal Power; at the moment of the power-on operation of the singlechip, detecting the potential difference between the lead pins P1.1/ADC1 and P1.0/ADC0 of the main chip U2 in the detection monitoring circuit, namely the pipe voltage drop V D-S of the transistor Q1;
E. In the teaching and learning process, if the voltage drop V D-S of the transistor Q1 connected in series in the Power supply line of the single-chip microcomputer and used for blocking the Power supply of the Power supply introduction terminal Power is relatively low, the current I D-S consumed by the single-chip microcomputer is relatively small, the detection and monitoring circuit main chip U2 carries out logic operation to determine that the MCS-51 series single-chip microcomputer chip U1 is not inserted reversely and is in a normal working state; on the contrary, if the pin P1.3/ADC3 of the main chip U2 of the detection and monitor circuit detects that the pin RST of the single-chip microcomputer chip U1 is at a high level, and the pins P1.1/ADC1 and P1.0/ADC0 of the same main chip U2 detect that the voltage drop V D-S of the transistor Q1 is abnormally increased, which means that the current I D-S consumed by the single-chip microcomputer is larger, it is determined that the single-chip microcomputer chip U1 of the MCS-51 series is reversely inserted into the socket SK1 of the single-chip microcomputer, the main chip U2 of the detection and monitor circuit immediately converts the logic determination into a hardware execution command, and transmits the hardware execution command to the gate G of the transistor Q1, so that the transistor Q1 is instantaneously converted into a cut-off state, the voltage supply of the Power supply terminal Power is interrupted at a microsecond level speed, and meanwhile, the hardware execution command is transmitted to the sound and light alarm circuit, so that the speaker and/or the buzzer sounds, and the diode LED-Y blinks.
In the step B, the software program for controlling the peripheral hardware circuit to operate orderly is stored in the peripheral memory of the detection and monitor circuit, or directly stored in the rom in the main chip U2, without providing a peripheral memory circuit.
The invention can be a detection monitoring circuit for protecting the chip of the single-chip microcomputer from being inversely inserted and damaged, wherein the detection monitoring circuit for protecting the chip U1 of the single-chip microcomputer from being inversely inserted and damaged comprises functional blocks which are distinguished according to logic functions, a microprocessor for running a control software program is arranged on the detection monitoring circuit, namely, a main chip U2 and ② of the detection monitoring circuit is used for storing a memory circuit of the control software program, a circuit for carrying out level monitoring on the chip U1 of the single-chip microcomputer by ③, a ④ logic operation judging circuit, a ⑤ real-time sound and light alarm circuit and a ⑥ circuit for rapidly cutting off a Power supply Power; however, the detection monitoring circuit is actually formed by only needing a main chip U2, a real-time sound and light alarm circuit and a circuit for rapidly cutting off a Power supply Power; the functions of the memory circuit for storing the control software program, the circuit for monitoring the level of the pin of the U1 part of the chip and the logic operation judging circuit are all completed by the main chip U2.
The circuit of the fast interrupt Power supply Power is provided with a Power field effect transistor MOSFET and a circuit symbol Q1, so as to execute a command of the fast interrupt Power supply Power, wherein the command is sent out by a lead pin P1.5/ADC5 of the main chip U2 and is transmitted to a grid G of the field effect transistor Q1; the drain electrode D of the transistor Q1 is electrically connected with the lead pin P1.1/ADC1 of the main chip U2 and one end of a loudspeaker LSI of the real-time sound and light alarm circuit, and is simultaneously connected with a Power supply terminal Power through isolating diodes D1 and D2; the pin P1.6/ADC6 of the main chip U2 is connected with the other end of the loudspeaker LSI through a resistor R7 and a base-collector junction of a transistor Q2, and the source S is connected with the power terminals Vcc of the two microprocessors U1 and U2 and peripheral circuits thereof.
The main chip U2 of the detection and monitoring circuit is an STC15W01AS microprocessor, and the lead pins P1.3/ADC3, P1.2/ADC2 and P1.4/ADC4 of the main chip U2 are respectively connected to the lead pins RST, PSEN and ALE of the singlechip chip U1.
The main chip U2 of the detection and monitoring circuit is an STC15W01AS microprocessor, and the lead pins P1.1/ADC1 and P1.0/ADC0 of the main chip are respectively connected to the drain electrode D and the source electrode S of the transistor Q1 in the circuit for rapidly cutting off the Power supply Power; at the moment of the Power on operation of the singlechip, the potential difference between the lead pins P1.1/ADC1 and P1.0/ADC0 of the main chip U2 in the detection and monitoring circuit is automatically monitored, namely the voltage drop V D-S of the transistor Q1, if the potential difference is abnormally increased, the chip U1 is judged to be reversely inserted into the socket SK1 of the singlechip, the transistor Q1 can be quickly converted into a cut-off state, the voltage supply of the Power supply leading-in terminal Power is quickly cut off, the chip U1 of the singlechip and the terminals Vcc=0 of peripheral equipment of the chip U1 are enabled, and the lead pins P5.4/RST of the main chip U2 send pulse trains to the light emitting diode LED-Y to enable the LED-Y to flash and emit light.
Compared with the prior art, the invention has the advantages of simplicity, practicability and low cost, and can reliably ensure that the MCS-51 series single chip microcomputer is not damaged due to the fact that the chip is reversely inserted in the teaching and learning process.
Drawings
FIG. 1 is an electrical schematic logic block diagram of a preferred embodiment of the invention, a method and a circuit for protecting a singlechip chip from damage by reverse insertion;
Fig. 2 is a schematic circuit diagram of protecting a main chip U1 from being damaged by reverse insertion for an MCS-51 series single chip microcomputer control system actually used in the two preferred embodiments of the present invention;
Fig. 3 is a schematic diagram of a MCS-51 serial single chip microcomputer control system commonly used in the prior art, wherein various peripheral devices can be controlled by pins of a chip U1, the single chip microcomputer is a protection object of the two preferred embodiments of fig. 2, and a character SK1 marked on the right lower side of the protected chip U1 is a dual in-line socket for inserting and implementing external electrical connection of the chip.
In the above figures, power is an external Power supply, vcc is a voltage source controlled by on/off of the Power field effect transistor Q1 connected in series to the forefront end of the Power supply introduction terminal Power in fig. 2, and Vcc is electrically connected to the source S of the transistor Q1 for supplying Power to the protected chip U1; when the singlechip chip U1 is found to be inverted, the Vcc voltage source for supplying power to the singlechip chip U1 can be quickly cut off.
Detailed Description
The following is a further detailed description of the technical scheme of two preferred embodiments of the invention using an Intel MCS-51 series singlechip in combination with the accompanying drawings.
Referring to fig. 1, the detection and monitoring circuit 400 for protecting the chip of the singlechip from being damaged by reverse insertion of the invention comprises functional blocks, which are distinguished according to logic functions, a microprocessor for executing a control software program is arranged at ①, namely, the main chips U2/402 and ② of the detection and monitoring circuit 400 are used for storing the memory circuits 403 and ③ of the control software program to perform level monitoring on part of the lead pins of the chip U1 of the singlechip 100, and the circuits 404 and ④ of the logic operation judging circuits 405 and ⑤ are used for real-time acoustic and optical alarm circuits 406 and the circuit 408 for ⑥ to rapidly interrupt Power supply Power; however, the detection and monitoring circuit 400 is actually configured, and only needs to have a main chip U2/402, a real-time sound and light alarm circuit 406 and a circuit 408 for rapidly cutting off the Power supply Power; the functions of the memory circuit 403 for storing control software programs, the circuit 404 for level monitoring of a part of the pins of the chip U1, and the logic operation judging circuit 405 are all completed by the main chip U2/402.
The circuit 408 for rapidly interrupting the Power supply Power is equipped with a Power field effect transistor MOSFET, a circuit symbol Q1, for executing a command for rapidly interrupting the Power supply Power, which is issued by the pin P1.5/ADC5 of the main chip U2/402 and is transmitted to the gate G of the field effect transistor Q1; the drain electrode D of the transistor Q1 is electrically connected to the pin P1.1/ADC1 of the main chip U2/402 and one end of the speaker LSI of the real-time audible and visual alarm circuit 406, and is simultaneously connected to the Power supply terminal Power via the isolation diodes D1, D2, the pin P1.6/ADC6 of the main chip U2/402 is connected to the other end of the speaker LSI via the resistor R7 and the "base-collector" junction of the transistor Q2, and the source electrode S is connected to the Power supply terminals Vcc of the two microprocessors U1, U2/402 and their peripheral circuits.
In a first preferred embodiment, the protected object is monitored, and the level of the pin related to the 51-series single chip microcomputer chip U1 shown in fig. 3: in the detection and monitoring circuit 400, the main chip U2/402 employs an STC15W01AS microprocessor, and the pins P1.3/ADC3, P1.2/ADC2 and P1.4/ADC4 of the microprocessor are respectively connected to pins RST, PSEN and ALE of the chip U1 of the single chip 100.
In a second preferred embodiment, the protected object is monitored, and the total current drain I D-S of the 51-series single-chip microcomputer chip U1 shown in fig. 3: the detection and monitoring circuit main chip U2/402 adopts an STC15W01AS microprocessor, and two lead pins P1.1/ADC1 and P1.0/ADC0 of the microprocessor are respectively connected to a drain electrode D and a source electrode S of a transistor Q1 in a circuit 408 for rapidly interrupting a Power supply Power; at the moment when the singlechip 100 is powered on and operates, the potential difference between the pins P1.1/ADC1 and P1.0/ADC0 of the main chip U2/402 in the detection and monitoring circuit 400 is automatically monitored, that is, the voltage drop V D-S of the transistor Q1 is determined, if the potential difference is abnormally increased, the chip U1 is judged to be inversely inserted into the socket SK1 of the singlechip 100, the transistor Q1 is immediately turned off, the voltage supply of the Power supply lead-in terminal Power is quickly blocked, so that the chip U1 of the singlechip 100 and the terminals vcc=0 of peripheral equipment thereof are enabled, and the pin P5.4/RST of the main chip U2/402 sends a pulse train to the light emitting diode LED-Y to enable the light emitting diode LED-Y to flash and emit light.
Claims (5)
1. A method for protecting a singlechip chip from damage caused by reverse insertion comprises the following steps:
A. The method comprises the steps of setting a function of monitoring the level of at least two pins for an MCS-51 series chip U1 inserted by a singlechip (100), comparing the monitoring result with the level value of the two pins when the chip U1 works normally, and carrying out logic operation to judge whether the chip U1 is reversely inserted into a double-in-line socket SK1 of the singlechip (100)? If yes, starting sound and light alarm in real time, and simultaneously enabling a transistor Q1 connected in series in a Power supply line of the singlechip (100) to quickly cut off the voltage supply of a Power supply introduction terminal Power, so that the terminals Vcc=0 of the chip U1 and peripheral equipment thereof;
B. In order to implement the step A, creating peripheral hardware circuits which are respectively and electrically connected with the singlechip (100) and used for protecting the MCS-51 series chip U1 of the singlechip from being damaged by reverse insertion, writing software programs for controlling the peripheral hardware circuits to orderly run and storing the software programs in a read-only memory, and manufacturing a detection and monitoring circuit (400) for ensuring the safe running of the singlechip (100) for teaching and learning;
C. In the teaching and learning process, if the lead pin RST of the MCS-51 series chip U1 of the singlechip (100) presents a high level, the singlechip (100) is in a reset state; at this time, if the single chip microcomputer (100) is working normally, the pins PSEN and ALE of the chip U1 are both high level; otherwise, the lead pins PSEN and ALE are low, and it should be determined that the chip U1 is reversely inserted into the SK1 socket of the single-chip microcomputer (100);
D. In order to implement the steps a to C, another microprocessor is provided to serve as a main chip U2 (402) of a detection monitoring circuit (400) for guarding the safe operation of the single chip microcomputer (100) for teaching and learning, and the pins RST, PSEN and ALE of the chip U1 of the single chip microcomputer (100) are electrically connected to the pins P1.3/ADC3, P1.2/ADC2 and P1.4/ADC4 of the main chip U2 (402) of the detection monitoring circuit (400), respectively, so that the level of the pin P1.3/ADC3 of the main chip U2 (402) of the detection monitoring circuit (400) is detected when the single chip microcomputer (100) is powered up;
E. When the pin P1.3/ADC 3 of the main chip U2 (402) detects that the pin RST of the MCS-51 series chip U1 inserted by the single chip microcomputer (100) is at a high level, if the pins P1.2/ADC2 and P1.4/ADC4 of the main chip U2 respectively detect that the levels of the pins PSEN and ALE of the chip U1 are also at the high level, the logic operation of the main chip U2 (402) judges that the MCS-51 series chip U1 inserted by the single chip microcomputer (100) is not reversely inserted; if the pins PSEN and ALE of the chip U1 are detected to be low level, determining that the main chip U1 is reversely inserted, immediately converting the logic determination into a hardware execution command by the main chip U2, transmitting the hardware execution command to a control end G of a transistor Q1 connected in series in a Power supply line, enabling the transistor Q1 to be instantaneously converted into a cut-off state, and blocking the voltage supply of a Power supply lead-in terminal Power; at the same time, the hardware execution command is transmitted to an audible and visual alarm circuit, so that the loudspeaker and/or the buzzer sound, and the diode LED-Y blinks and emits light.
2. The method for protecting a single-chip microcomputer chip from damage caused by reverse insertion according to claim 1, wherein the method comprises the following steps: in the steps a and E, the transistor Q1 connected in series to the Power supply line of the singlechip (100) is a Power field effect transistor MOSFET, a gate-source voltage signal Vg-s for "blocking the Power supply" is input to the gate G thereof, and the transistor Q1 is immediately switched to the off state at a microsecond speed, and blocks the voltage supply of the Power supply introduction terminal Power.
3. The method for protecting the chip of the single-chip microcomputer from being damaged by reverse insertion according to claim 1 or 2, which is characterized in that: in the step B, the software program for controlling the peripheral hardware circuit to operate orderly is stored in the memory circuit of the detection and monitoring circuit (400) or directly stored in the read-only memory contained in the main chip U2 (402), so that the memory circuit is not required to be additionally provided.
4. A method for protecting a singlechip chip from damage caused by reverse insertion comprises the following steps:
A. the method comprises the steps of setting a function of monitoring the total current I D-S consumed by a chip U1 in MCS-51 series for plugging a singlechip (100) when the chip is connected with a power supply Vcc, comparing the monitoring result with the total current value consumed by the chip U1 in normal working state stored in a read-only memory and performing logic operation to judge whether the chip U1 is reversely plugged into a dual-in-line socket SK1 of the singlechip (100)? If the total current value I D-S is abnormally increased, judging that a chip U1 is reversely inserted into the SK1 socket, starting a real-time sound and light alarm immediately, and simultaneously enabling a transistor Q1 connected in a Power supply line of the singlechip (100) to quickly interrupt the voltage supply of a Power supply introduction terminal Power so that the chip U1 and a terminal Vcc=0 of peripheral equipment thereof;
B. In order to implement the step A, creating peripheral hardware circuits which are respectively and electrically connected with the singlechip (100) and used for protecting the MCS-51 series chip U1 of the singlechip from being damaged by reverse insertion, writing software programs for controlling the peripheral hardware circuits to orderly operate, and storing the software programs in a read-only memory to prepare a detection monitoring circuit (400) for ensuring the safe operation of the singlechip (100) for teaching and learning;
C. In order to implement the steps a and B, a microprocessor is additionally provided to be used as the main chip U2 (402) of the detection and monitoring circuit (400) for the safe operation of the single chip microcomputer (100) for teaching and learning, and meanwhile, a power field effect transistor MOSFET is selected to be used as the transistor Q1 connected in series in the power supply line of the single chip microcomputer (100), and by utilizing the characteristic that the conducting resistance value R D-S of the field effect transistor is basically unchanged when the field effect transistor is saturated and turned on, namely, R D-S ≡const, the voltage drop V D-S of the transistor Q1 is monitored to determine whether the current consumption I D-S of the single chip microcomputer (100) is abnormally increased;
D. To implement the above step C, the pins P1.1/ADC1 and P1.0/ADC0 of the main chip U2 (402) in the monitor circuit (400) are respectively coupled to the drain D and the source S of the transistor Q1 interrupting the supply of Power to the Power supply introduction terminal Power; at the moment when the singlechip (100) is powered on and operates, detecting the potential difference between the lead pins P1.1/ADC1 and P1.0/ADC0 of the main chip U2 (402) in the detection monitoring circuit (400), namely the tube voltage drop V D-S of the transistor Q1;
E. In the teaching and learning process, if the voltage drop V D-S of the transistor Q1 connected in series in the Power supply line of the single-chip microcomputer (100) and used for blocking the Power supply of the Power supply introduction terminal Power is relatively low, it indicates that the current I D-S consumed by the single-chip microcomputer (100) is relatively small, the detection and monitoring circuit main chip U2 carries out logic operation to determine that the chip U1 of the MCS-51 series single-chip microcomputer (100) is not inserted reversely and is in a normal working state; conversely, if the pin P1.3/ADC 3 of the main chip U2 (402) of the detection and monitor circuit (400) detects that the pin RST of the chip U1 of the single chip microcomputer (100) is at a high level, and the pins P1.1/ADC1 and P1.0/ADC0 of the same main chip U2 detect that the voltage drop V D-S of the transistor Q1 is abnormally increased, which means that the current I D-S consumed by the single chip microcomputer (100) is large, it is determined that the chip U1 of the single chip microcomputer (100) of the MCS-51 series is reversely inserted into the socket SK1 of the single chip microcomputer (100), the detection and monitor circuit main chip U2 immediately converts the logic determination into a hardware execution command, transmits the hardware execution command to the gate G of the transistor Q1, causes the transistor Q1 to be instantaneously converted into a cut-off state, and simultaneously transmits the hardware execution command to the sound and light alarm circuit with microsecond-level speed to introduce the voltage supply of the terminal Power, so that the speaker and/or the diode-LED-Y flash.
5. The method for protecting a single-chip microcomputer chip from damage caused by reverse insertion according to claim 4, wherein the method comprises the following steps: in the step B, the software program for controlling the peripheral hardware circuit to operate orderly is stored in the peripheral memory of the detection and monitor circuit (400) or directly stored in the rom memory contained in the main chip U2 (402), without providing a peripheral memory circuit.
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