CN109067369B - Predistortion optimization method, device and system - Google Patents

Predistortion optimization method, device and system Download PDF

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CN109067369B
CN109067369B CN201810737142.4A CN201810737142A CN109067369B CN 109067369 B CN109067369 B CN 109067369B CN 201810737142 A CN201810737142 A CN 201810737142A CN 109067369 B CN109067369 B CN 109067369B
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power amplifier
predistortion
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CN109067369A (en
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刁穗东
吴卓智
姜成玉
周建红
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Comba Network Systems Co Ltd
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3241Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/213Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only in integrated circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/24Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/372Noise reduction and elimination in amplifier

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Abstract

The invention relates to a predistortion optimization method, which comprises the following steps: collecting an input signal and a power amplifier feedback signal of a power amplifier in a predistortion loop; performing nonlinear response estimation according to the input signal and the power amplifier feedback signal to obtain an estimation signal; denoising the estimation signal to obtain a denoising estimation signal; performing signal recovery according to the de-noising estimation signal and the input signal to obtain a recovered power amplifier feedback signal; and inputting the acquired input signal and the recovered power amplifier feedback signal into a predistortion module in the predistortion loop. And restoring to obtain a restored power amplifier feedback signal according to the obtained de-noised estimated signal and the input signal by de-noising the estimated signal, and finally performing pre-distortion processing according to the restored power amplifier feedback signal and the input signal. The problem that the predistortion efficiency is low in a traditional predistortion method is effectively solved, and the predistortion efficiency is greatly improved.

Description

Predistortion optimization method, device and system
Technical Field
The present invention relates to the field of wireless communication technologies, and in particular, to a predistortion optimization method, apparatus, and system.
Background
In modern wireless communication systems, a transmitter with higher power is the most energy-consuming part of the wireless communication system, and in order to save energy consumption of the whole system, the energy efficiency ratio of the transmitter is the best choice. Increasing the quiescent operating point can increase the energy efficiency ratio of the transmitter, but also leads to nonlinear distortion of the transmitted signal due to entering the nonlinear region of the power amplifier. The traditional approach to solving for nonlinear distortion is digital predistortion.
In a digital predistortion system, a hardware part for signal transmission and acquisition is called a predistortion loop, and in order to ensure the performance of digital predistortion, the predistortion loop needs to meet a certain signal-to-noise ratio requirement. In the process of implementing the invention, the inventor finds that: in hardware design, the predistortion loop inevitably has the problems of thermal noise, phase noise, spurious signals and the like. After part of noise and spurious signals pass through the power amplifier, the noise and spurious signals are increased along with the signals, the signal-to-noise ratio of a predistortion loop is further deteriorated, and the predistortion efficiency of the traditional predistortion method is greatly reduced.
Disclosure of Invention
Based on this, it is necessary to provide a predistortion optimization method, a predistortion optimization apparatus, and a predistortion processing system, which address the above-mentioned problems in the conventional predistortion methods.
In order to achieve the purpose, the embodiment of the invention adopts the following technical scheme:
in one aspect, an embodiment of the present invention provides a predistortion optimization method, including the following steps:
collecting an input signal and a power amplifier feedback signal of a power amplifier in a predistortion loop;
performing nonlinear response estimation according to the input signal and the power amplifier feedback signal to obtain an estimation signal;
denoising the estimation signal to obtain a denoising estimation signal;
performing signal recovery according to the input signal and the de-noising estimation signal to obtain a recovered power amplifier feedback signal;
and inputting the acquired input signal and the recovered power amplifier feedback signal into a predistortion module in the predistortion loop.
In one embodiment, the non-linear response estimate comprises a least squares estimate or a minimum mean square error estimate.
In one embodiment, the step of performing denoising processing on the estimation signal to obtain a denoised estimation signal includes:
determining a peak power point of the estimation signal, and calculating a memory depth estimation value of the predistortion loop through a first setting algorithm according to the estimation signal in a setting range of the peak power point;
if the memory depth estimation value is larger than a set threshold, calculating to obtain a first noise threshold through a second set algorithm according to the set threshold and the estimation signal in the set range;
and eliminating the estimation signal which is lower than the first noise threshold value to obtain the de-noised estimation signal.
In one embodiment, the method further comprises:
if the memory depth estimation value is smaller than the set threshold value, discarding the estimation signal in the set range;
and jumping to the step of acquiring the input signal and the power amplifier feedback signal of the power amplifier in the predistortion loop.
In one embodiment, the step of performing denoising processing on the estimation signal to obtain a denoised estimation signal includes:
and carrying out smooth denoising processing according to the estimation signal to obtain the denoising estimation signal.
In one embodiment, the step of performing smoothing and denoising processing according to the estimation signal to obtain the denoising estimation signal includes:
smoothing the estimation signal in the set window length through a smoothing window with the set window length until smoothing processing of each frequency point of the estimation signal is finished to obtain the de-noising estimation signal; and the window moving step length of the smooth window is one frequency point.
In one embodiment, the step of performing denoising processing on the estimation signal to obtain a denoised estimation signal includes:
performing time domain conversion according to the estimation signal obtained by the least square estimation;
calculating a noise threshold according to the estimation signal after time domain conversion to obtain a second noise threshold;
and eliminating the estimation signal which is lower than the second noise threshold value to obtain the de-noising estimation signal.
On the other hand, an embodiment of the present invention further provides a predistortion optimization apparatus, including:
the signal acquisition module is used for acquiring an input signal and a power amplifier feedback signal of a power amplifier in the predistortion loop;
the signal estimation module is used for carrying out nonlinear response estimation according to the input signal and the power amplifier feedback signal to obtain an estimation signal;
the de-noising module is used for de-noising the estimation signal to obtain a de-noised estimation signal;
the signal recovery module is used for performing signal recovery according to the input signal and the de-noising estimation signal to obtain a recovered power amplifier feedback signal;
and the signal input module is used for inputting the acquired input signal and the recovered power amplifier feedback signal into a predistortion module in the predistortion loop.
In still another aspect, an embodiment of the present invention further provides a computer device, including a memory and a processor, where the memory stores a computer program, and the computer program, when executed by the processor, implements the steps of the predistortion optimization method.
In still another aspect, an embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored, where the computer program, when executed by a processor, implements the steps of the predistortion optimization method.
On the other hand, the embodiment of the invention also provides a predistortion processing system, which comprises a predistortion module, a power amplifier, a signal acquisition circuit, a nonlinear response circuit, a noise eliminator and a power amplifier feedback recovery circuit;
the signal acquisition circuit is used for acquiring an input signal and a power amplifier feedback signal of the power amplifier and sending the input signal and the power amplifier feedback signal to the nonlinear response circuit;
the nonlinear response circuit is used for carrying out nonlinear response estimation according to the input signal and the power amplifier feedback signal to obtain an estimation signal and sending the estimation signal to the noise eliminator;
the de-noising device is used for de-noising the estimation signal to obtain a de-noising estimation signal and sending the de-noising estimation signal to the power amplifier feedback restoring circuit;
the power amplifier feedback recovery circuit is used for performing signal recovery according to the de-noising estimation signal and the input signal to obtain a recovered power amplifier feedback signal, and inputting the input signal and the recovered power amplifier feedback signal into the predistortion module;
the predistortion module is used for carrying out predistortion processing on the input signal and the recovered power amplifier feedback signal.
One of the above technical solutions has the following technical effects:
the method comprises the steps of carrying out nonlinear response estimation on an input signal and a power amplifier feedback signal of a power amplifier in a predistortion loop, carrying out denoising processing on an obtained estimation signal, further carrying out signal recovery according to the obtained denoising estimation signal and the input signal to obtain a recovered power amplifier feedback signal, and finally carrying out predistortion processing according to the obtained recovered power amplifier feedback signal and the input signal. The problem that the predistortion efficiency is low in the traditional predistortion method is effectively solved, and the predistortion efficiency is greatly improved.
Drawings
FIG. 1 is a diagram of an exemplary implementation of a predistortion optimization method;
FIG. 2 is a schematic flow chart diagram of a predistortion optimization method in one embodiment;
FIG. 3 is a schematic flow diagram of an embodiment of a denoising process;
FIG. 4 is a schematic flow chart of a denoising process in another embodiment;
FIG. 5 is a block diagram of the predistortion optimization device in one embodiment;
fig. 6 is a block diagram of a predistortion processing system in one embodiment.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more clearly understood, the present application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
Referring to fig. 1, the predistortion optimization method according to the embodiment of the present invention may be applied to a transmitter 101 shown in fig. 1. A transmitter 101 for transmitting signals in a wireless communication system comprises a predistortion module 12 and a power amplifier 14. The input signal of the predistortion module 12, that is, the input signal of the transmitter 101, is output to the power amplifier 14 for power amplification after being subjected to predistortion processing, and then is output to the post-stage processing unit. In the conventional signal processing process, a predistortion optimization unit (for example, a corresponding optimization unit circuit is expanded in the transmitter 101 or a processor is configured) performs nonlinear response estimation according to the input signal of the power amplifier 14 and the power amplifier feedback signal output by the power amplifier 14 to obtain an estimation signal, and further performs denoising processing on the estimation signal to obtain a denoising estimation signal, so as to perform signal recovery according to the denoising estimation signal and the input signal to obtain a recovered power amplifier feedback signal, and input the input signal and the recovered power amplifier feedback signal to the predistortion module 12. In this way, the predistortion module 12 may perform predistortion processing according to the input signal and the recovered power amplifier feedback signal, and send the processed output signal to the power amplifier 14 for subsequent signal processing.
Referring to fig. 2, in an embodiment, a predistortion optimization method is provided, which is described by way of example as applied to the transmitter 101 in fig. 1, and includes the following steps S12 to S20:
and S12, collecting an input signal and a power amplifier feedback signal of a power amplifier in the predistortion loop.
And S14, carrying out nonlinear response estimation according to the input signal and the power amplifier feedback signal to obtain an estimation signal.
It is understood that the input signal is a signal output to the power amplifier 14 after being subjected to the predistortion processing by the predistortion module 12. The power amplifier feedback signal is a signal output after being processed by the power amplifier of the power amplifier 14. The nonlinear response estimation is to calculate the nonlinear response output for the input signal, and can be implemented by various conventional nonlinear response calculation methods in the art. Such as fourier transform and least squares. The estimation signal is a nonlinear response output signal of the predistortion loop, which contains effective nonlinear components and signal components such as noise and spurious signals which are unfavorable for predistortion.
And S16, denoising the estimation signal to obtain a denoising estimation signal.
It is understood that the denoising process is to perform noise cancellation on the estimation signal obtained above to remove noise signal components such as noise and spurs in the estimation signal, for example, noise signal components in a nonlinear response of a power amplifier after the signal is amplified by the power amplifier 14. The denoising process may be implemented by various conventional noise removal in the art, or conventional signal filtering, etc.
And S18, performing signal recovery according to the de-noising estimated signal and the input signal to obtain a recovered power amplifier feedback signal.
And S20, inputting the acquired input signal and the recovered power amplifier feedback signal into a predistortion module in a predistortion loop.
It can be understood that the signal recovery is used for recovering the power amplifier feedback signal after the noise is eliminated by combining the input signal with the estimated signal after the noise is eliminated; the recovery method may be, but is not limited to, a Fourier Transform such as FFT (Fast Fourier Transform) or DFT (Discrete Fourier Transform) which is conventional in the art.
Specifically, the predistortion optimization unit may perform signal acquisition from the output terminal of the predistortion module 12, that is, the input terminal of the power amplifier 14, to obtain a required input signal, and perform signal acquisition from the output terminal of the power amplifier 14 to obtain a required power amplifier feedback signal. The loss prediction optimization unit further estimates the nonlinear response output according to the obtained input signal and the power amplifier feedback signal, and obtains a nonlinear response output signal corresponding to the input signal and the power amplifier feedback signal, namely an estimation signal. Therefore, the pre-loss optimization unit can perform denoising processing on the obtained estimation signal to obtain a denoised estimation signal, namely a denoised estimation signal; and finally, according to the de-noising estimated signal and the obtained input signal, performing signal recovery to recover the power amplifier feedback signal after noise removal, namely the recovered power amplifier feedback signal. Therefore, the predistortion optimization unit can input the obtained recovered power amplifier feedback signal and the input signal into the predistortion module 12, so that the predistortion module 12 can perform predistortion processing according to the input signal and the recovered power amplifier feedback signal and output the predistortion processing to a post-stage processing unit, thereby effectively reducing the negative influence of noise on the signal-to-noise ratio of the whole predistortion loop and greatly improving the predistortion efficiency.
Referring to fig. 3, in one embodiment, the step S16 may specifically include steps S162 to S166:
and S162, determining a peak power point of the estimation signal, and calculating to obtain a memory depth estimation value of the predistortion loop through a first setting algorithm according to the estimation signal in a setting range of the peak power point.
It can be understood that the peak power point of the estimated signal, that is, the frequency point corresponding to the peak power of the estimated signal, may be determined, for example, by applying a broader peak search (or called peak search). Peak retrieval is an effective way to perform peak power retrieval on a signal, and the peak power point of an estimated signal can be quickly determined. The setting range is a signal range from a peak power point as an initial frequency point to a frequency point with a preset number, that is, a part of the estimated signals selected near the peak, and the set number may be set according to the signal processing requirement or the signal processing experience, for example, the set number is set to an empirical value 16.
The peak power point of the estimation signal is determined by peak search, which may be determined by, but not limited to, the following processing manners:
h-pwr(n)=|h(n)|2
wherein h (n) represents an estimation signal; h is-pwr(n)Representing the power of the estimated signal, and n represents a variable whose value is greater than or equal to 1 and less than or equal to the number of signal samples. The number of signal sampling points is also referred to as the secondary predistortion module of the predistortion optimization unitThe number of sampling points used to obtain the desired input signal at the output of 12 and the desired power amplifier feedback signal from the output of power amplifier 14.
Specifically, the predistortion optimization unit may perform peak value retrieval on the obtained estimation signal, determine a peak power point of the estimation signal, and calculate, according to the vicinity of the peak power point, that is, the estimation signal within the set range, a memory depth estimation value of the entire predistortion loop through a first setting algorithm.
The memory depth estimation value can be calculated by the following first setting algorithm:
Figure BDA0001722313150000081
wherein, l represents a memory depth estimate; n _ peak represents a constant at the peak power point; n represents a variable; h (n) represents an estimation signal; range represents the aforementioned set number. It is to be understood that the first setting algorithm shown above may also include an adaptively deformed formula, such as an adaptively deformed calculation formula with addition of a correction coefficient or a variable replacement, as long as a desired memory depth estimation value can be accurately calculated.
And S164, if the memory depth estimation value is larger than the set threshold, calculating to obtain a first noise threshold through a second setting algorithm according to the set threshold and the estimation signal in the set range.
It is understood that the threshold is set to be a preset effective non-linear index value, and may be set empirically, for example, to be 5. The first noise threshold is a power threshold used for estimating the decision of the noise component in the signal for the noise removal process in the following steps. Specifically, the predistortion optimization unit may compare the obtained memory depth estimation value with a set threshold, and if the memory depth estimation value is greater than the set threshold, that is, the estimation signal in the set range satisfies the effective nonlinear index; the predistortion optimization unit may calculate the first noise threshold by the second setting algorithm based on the estimation signal within the above-mentioned setting range satisfying the effective nonlinearity indicator.
The first noise threshold may be calculated by, but is not limited to, the following second setting algorithm:
Q=h_pwr(n_peak)*K*L/l
wherein Q represents a first noise threshold; h _ pwr (n _ peak) represents the power of the estimated signal peak power point; k represents an empirical constant, such as 0.5; l represents the above-mentioned set threshold; l represents a memory depth estimate. The second setting algorithm shown above may further include an adaptively modified noise calculation formula, for example, an adaptively modified noise calculation formula such as adding a correction coefficient or replacing a variable, as long as the required first noise threshold can be accurately calculated.
And S166, eliminating the estimation signal lower than the first noise threshold value to obtain a de-noised estimation signal.
Specifically, after obtaining the first noise threshold, the predistortion optimization unit may eliminate the estimation signal with the power lower than the first noise threshold, so as to retain the estimation signal with the power higher than the first noise threshold, that is, obtain the denoising estimation signal. Optionally, the denoising process may be implemented by the following algorithm:
Figure BDA0001722313150000091
wherein h _ cancel (n) represents the de-noising estimation signal; h (n) represents an estimation signal; q denotes a first noise threshold. Through the processing steps from S162 to S166, the noise signal component in the estimation signal can be effectively eliminated, the output of the de-noised estimation signal can be accurately and quickly obtained, the reliability of the subsequently obtained recovered power amplifier feedback signal is ensured, and the high efficiency of predistortion optimization is ensured.
In one embodiment, for step S16, after obtaining the memory depth estimation value of the predistortion loop through step S162, the method may further include the following steps: if the memory depth estimation value is smaller than the set threshold value, discarding the estimation signal in the set range; the process proceeds to step S12 described above.
Specifically, when comparing the obtained memory depth estimation value with a set threshold, the predistortion optimization unit determines that the memory depth estimation value is smaller than the set threshold, that is, the estimation signal in the set range does not satisfy the effective nonlinear index. The predistortion optimization unit discards the current estimation signal, skips to the step S12, starts a new round of predistortion optimization processing, and executes subsequent denoising processing until the obtained estimation result meets the effective nonlinear index. Thus, through the processing steps, the estimation signals which do not meet the effective nonlinearity index can be automatically discarded, and a new predistortion optimization processing process can be started again. And when the estimation signal meets the effective nonlinear index, the denoising processing is automatically executed, the denoising estimation signal is output, and the persistence and the flexibility of the predistortion optimization are enhanced.
In one embodiment, the step S16 may specifically include the following steps: and according to the estimation signal, carrying out smooth denoising processing to obtain a denoising estimation signal.
It can be understood that, in this embodiment, in addition to the above manners such as the effective nonlinear index comparison, the signal denoising processing in the predistortion optimization method in the embodiment of the present invention may also perform denoising processing on the estimation signal in a smooth denoising manner, so as to obtain a denoising estimation signal. The smoothing and denoising process may be any of various signal smoothing techniques conventional in the art, such as mean filtering, median filtering, gaussian filtering, or bilateral filtering.
Specifically, after obtaining the estimation signal, the predistortion optimization unit may also obtain the denoising estimation signal by performing smoothing denoising processing on the estimation signal. The smoothing technology is mature, the reliability is good, the reliability of predistortion optimization can be effectively improved, and the predistortion efficiency is favorably improved.
In one embodiment, the step of smoothing and denoising may specifically include the following steps: and smoothing the estimation signal in the set window length through a smoothing window with the set window length until the smoothing processing of each frequency point of the estimation signal is finished to obtain the de-noising estimation signal. The window shift step length of the smooth window is one frequency point.
It can be understood that the setting window length is a preset window length of the smoothing window, and can be specifically set according to the effect of smoothing and denoising or experience, and preferably, the setting window length may take a value of 3 in this embodiment. The window shift step length is a step length of each moving of the smoothing window, and in this embodiment, the preferred window shift step length is one frequency point, that is, after the estimation signal in the smoothing window is smoothed, the smoothing window moves by one frequency point, so as to smooth the estimation signal in the smoothed window after the smoothing window is moved.
Specifically, the predistortion optimization unit may perform smoothing denoising processing on the estimation signal by setting a smoothing window with a window length, and output a denoising estimation signal. For example, the estimation signal is smoothed by the following smoothing algorithm:
Figure BDA0001722313150000111
wherein, H _ cancel (k) represents the frequency domain de-noising estimation signal obtained after the smoothing de-noising processing; m represents a set window length; k0 represents the initial point of the smoothing window; h (j) represents an estimated signal of the frequency domain; j represents a variable.
The predistortion optimization unit may set the starting point of the smoothing window to k0+1 (the value of k0 is 0), that is, the starting frequency point of the estimation signal, so as to start smoothing the estimation signal located in the smoothing window from the starting frequency point; and moving a frequency point after the smoothing is finished, and smoothing the estimation signal positioned in the smoothing window. And thus, the smoothing window is continuously moved, the estimation signal is smoothed until k0 is larger than N-M, namely, the tail end point of the smoothing window reaches the last frequency point of the estimation signal, the smoothing processing of all frequency points of the estimation signal is completed, and the output smoothed estimation signal is the denoising estimation signal. Through the smooth denoising processing, the denoising reliability is good, the reliability of predistortion optimization can be effectively improved, and the predistortion efficiency is favorably improved.
In one embodiment, in the above embodiment, in the process of performing the nonlinear response estimation according to the input signal of the power amplifier and the power amplifier feedback signal, the adopted nonlinear response estimation includes least square estimation or minimum mean square error estimation.
Specifically, in this embodiment, the nonlinear response estimation may adopt least square estimation, or minimum mean square error estimation to obtain the estimation signal. For example, when least squares estimation is used, there may be:
HLS(k)=Y(k)/X(k)
wherein HLS(k) An estimated signal representing a frequency domain; y (k) represents a power amplifier feedback signal in a frequency domain; x (k) represents an input signal in the frequency domain; k represents a variable having a value of 1 or more and equal to or less than the number of signal sampling points. Therefore, the input signal and the power amplifier feedback signal are converted into the frequency domain (for example, when the time domain signal is obtained by sampling, the signal time-frequency domain conversion can be carried out), the estimation signal can be rapidly output by adopting least square estimation, the signal processing is simple and rapid, and the speed of predistortion optimization processing is favorably improved.
For another example, when minimum mean square error estimation is used, there may be:
Figure BDA0001722313150000121
R=HLS(k)*(HLS(k))H
Figure BDA0001722313150000122
wherein HMMSE(k) An estimated signal representing a frequency domain; hLS(k) An estimation signal representing the frequency domain obtained by the least square method; SNR represents the signal-to-noise ratio of the predistortion loop; i represents a unit array; k represents a variable, the value of which is more than or equal to 1 and less than or equal to the number of signal sampling points; x (k) represents an input signal in the frequency domain; r represents an autocorrelation matrix of LS channel estimation; β represents a coefficient relating to a modulation scheme, and may be an empirical value; e denotes an expectation function, e.g. E (| X (k) & gtdoes not count2) Represents the average power of X (k). Tong (Chinese character of 'tong')By adopting the minimum mean square error estimation, the estimation signal can be obtained, the accuracy is higher, and the reliability of the predistortion optimization processing is improved.
Referring to fig. 4, in one embodiment, the step S16 may further include the following steps S161 to S165:
and S161, performing time domain conversion according to the estimation signal obtained by least square estimation.
It is understood that the predistortion optimization unit may also implement the above-mentioned denoising process by using an estimation signal obtained by least square estimation. In the implementation process of the foregoing embodiment, as can be understood by those skilled in the art, the fourier transform may be performed on each signal to perform corresponding time domain or frequency domain conversion according to the processing requirement.
And S163, calculating a noise threshold according to the estimation signal after the time domain conversion to obtain a second noise threshold.
It will be appreciated that the second noise threshold is also a power threshold for the decision to estimate the noise component in the signal for the purpose of performing the de-noising process in the following steps. Specifically, the predistortion optimization unit may also calculate the second noise threshold directly according to the estimation signal of the time domain. Alternatively, the second noise threshold may be calculated by the following formula:
Q=h_pwr(n_peak)*K
wherein Q represents a second noise threshold; h _ pwr (n _ peak) represents the power of the estimated signal peak power point; k represents an empirical constant, for example 0.5.
And S165, eliminating the estimation signal lower than the second noise threshold value to obtain a de-noising estimation signal.
Specifically, after obtaining the second noise threshold, the predistortion optimization unit may eliminate the estimation signal with power lower than the second noise threshold, so as to retain the estimation signal with power higher than the second noise threshold, that is, obtain the denoising estimation signal. Optionally, the denoising process may also be implemented by the following algorithm:
Figure BDA0001722313150000131
wherein h _ cancel (n) represents the de-noising estimation signal; h (n) represents an estimation signal; q denotes a second noise threshold. Through the processing steps S161 to S165, the noise signal component in the estimation signal can be effectively eliminated, the noise-removed estimation signal output can be obtained accurately and more quickly, the reliability of the subsequently obtained recovered power amplifier feedback signal is ensured, and the efficiency of predistortion optimization is improved.
In an embodiment, the predistortion optimization method in the foregoing embodiments may also be applied to other types of signal processing apparatuses, such as a transmitter apparatus or a predistortion processing apparatus, where the foregoing technical problems indicated by the present invention exist, and the embodiments of the present invention are not limited to the examples.
Referring to fig. 5, in an embodiment, a predistortion optimization apparatus 100 is provided, which includes a signal acquisition module 09, a signal estimation module 11, a denoising module 13, a signal recovery module 15, and a signal input module 17. And the signal acquisition module 09 is used for acquiring an input signal and a power amplifier feedback signal of the power amplifier in the predistortion loop. The signal estimation module 11 is configured to perform nonlinear response estimation according to the input signal and the power amplifier feedback signal to obtain an estimation signal. The denoising module 13 is configured to perform denoising processing on the estimation signal to obtain a denoising estimation signal. The signal recovery module 15 is configured to perform signal recovery according to the de-noising estimation signal and the input signal, so as to obtain a recovered power amplifier feedback signal. And the signal input module 17 is used for inputting the acquired input signal and the recovered power amplifier feedback signal into a predistortion module in a predistortion loop.
It is understood that the specific limitations regarding the predistortion optimization device 100 can be referred to the limitations regarding the predistortion optimization method in the foregoing, and will not be described in detail herein. The modules in the predistortion optimization device 100 may be implemented in whole or in part by software, hardware, and a combination thereof. The modules can be embedded in a hardware form or be independent of a processor of the computer device, and can also be stored in a memory of the computer device in a software form, so that the processor can call and execute operations corresponding to the modules.
The signal estimation module 11 performs nonlinear response estimation on the input signal and the power amplifier feedback signal to obtain an estimation signal, further eliminates noise in the estimation signal through the de-noising module 13, and finally recovers to obtain a recovered power amplifier feedback signal through the signal recovery module 15 according to the obtained de-noising estimation signal and the input signal, so that the recovered power amplifier feedback signal and the input signal are sent to the pre-distortion module for pre-distortion processing. The problem that the predistortion efficiency is low in a traditional predistortion method is effectively solved, and the predistortion efficiency is greatly improved.
In one embodiment, the predistortion optimization apparatus 100 may further implement the substeps of the predistortion optimization method in each of the embodiments.
In one embodiment, a computer device is also provided, which may be an upper computer. The computer device may include a processor, memory, a network interface, a display screen, and an input device connected by a system bus. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device comprises a nonvolatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of an operating system and computer programs in the non-volatile storage medium. The network interface of the computer device is used for communicating with an external terminal through a network connection. The computer program is executed by a processor to implement the predistortion optimization method described above. The display screen of the computer equipment can be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer equipment can be a touch layer covered on the display screen, a key, a track ball or a touch pad arranged on a shell of the computer equipment, an external keyboard, a touch pad or a mouse and the like.
In one embodiment, when executed by a processor, the computer program in the computer device may further implement the sub-steps of the predistortion optimization method in the embodiments.
In an embodiment, a computer-readable storage medium is also provided, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the predistortion optimization method described above.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above may be implemented by hardware instructions of a computer program, which may be stored in a non-volatile computer-readable storage medium, and when executed, may include the processes of the embodiments of the methods described above. Any reference to memory, storage, database, or other medium used in the embodiments provided herein may include non-volatile and/or volatile memory, among others. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically Programmable ROM (EPROM), electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double Data Rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous Link DRAM (SLDRAM), rambus (Rambus) direct RAM (RDRAM), direct Rambus Dynamic RAM (DRDRAM), and Rambus Dynamic RAM (RDRAM), among others.
In one embodiment, when the computer program in the readable storage medium is executed by a processor, the sub-steps of the predistortion optimization method in the above embodiments may also be implemented.
Referring to fig. 6, in an embodiment, a predistortion processing system 200 is further provided, which includes a predistortion module 12, a power amplifier 14, a signal acquisition circuit 16, a nonlinear response circuit 18, a noise canceller 20, and a power amplifier feedback recovery circuit 22. The signal acquisition circuit 16 is configured to acquire an input signal and a power amplifier feedback signal of the power amplifier 14, and send the acquired input signal and the power amplifier feedback signal to the nonlinear response circuit 18. The nonlinear response circuit 18 is configured to perform nonlinear response estimation according to the input signal and the power amplifier feedback signal, obtain an estimation signal, and send the estimation signal to the noise canceller 20. The noise eliminator 20 is configured to perform noise elimination on the estimation signal to obtain a noise eliminated estimation signal, and send the noise eliminated estimation signal to the power amplifier feedback recovery circuit 22. The power amplifier feedback recovery circuit 22 is configured to perform signal recovery according to the de-noising estimation signal and the input signal to obtain a recovered power amplifier feedback signal, and input the input signal and the recovered power amplifier feedback signal to the predistortion module 12. The predistortion module 12 is configured to perform predistortion processing on the input signal and the recovered power amplifier feedback signal.
It is understood that the predistortion optimization method in the above embodiments may be implemented by a predistortion optimization unit in the form of an optimization unit circuit or a processor. In the present embodiment, the above-described optimization of the conventional predistortion processing technique can be embodied by each unit circuit configured by using a digital circuit or an analog circuit.
Specifically, the predistortion module 12 is configured to perform predistortion processing on a signal passing through and output the signal to the power amplifier 14. The signal acquisition circuit 16 may obtain the aforementioned input signal from the output side of the predistortion module 12 and obtain the power amplifier feedback signal from the output side of the power amplifier 14, and input the signal into the nonlinear response circuit 18. Signal acquisition circuit 16 may be a digital signal sampling circuit constructed by electronic circuit techniques conventional in the art or an analog signal sampling circuit. The nonlinear response circuit 18, the noise canceller 20 and the power amplifier feedback restoring circuit 22 may be logic circuits with logic operation function, such as various PLC programmable circuits.
Through the circuit units, according to the input signal and the power amplifier feedback signal, nonlinear response estimation is carried out, and after an estimation signal is obtained, noise in the estimation signal is eliminated; and then restoring the restored power amplifier feedback signal according to the obtained de-noising estimation signal and the input signal, and sending the restored power amplifier feedback signal and the restored input signal into a pre-distortion module for pre-distortion processing. The problem that the predistortion efficiency is low in a traditional predistortion method is effectively solved, and the predistortion efficiency is greatly improved.
In one embodiment, during the operation of each circuit unit of the predistortion processing system 200, the substeps of each predistortion optimization method may be further performed, so as to further improve the efficiency of predistortion.
All possible combinations of the technical features of the above embodiments may not be described for the sake of brevity, but should be considered as within the scope of the present disclosure as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is specific and detailed, but not to be understood as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims (8)

1. A predistortion optimization method, characterized by comprising the steps of:
acquiring an input signal and a power amplifier feedback signal of a power amplifier in a predistortion loop; the input signal is output to the power amplifier after being subjected to predistortion processing by the predistortion module, and the power amplifier feedback signal is output after being subjected to power amplifier processing by the power amplifier;
performing nonlinear response estimation according to the input signal and the power amplifier feedback signal to obtain an estimation signal; the non-linear response estimate comprises a least squares estimate or a minimum mean square error estimate;
denoising the estimation signal to obtain a denoising estimation signal;
performing signal recovery according to the input signal and the de-noising estimation signal to obtain a recovered power amplifier feedback signal;
inputting the acquired input signal and the recovered power amplifier feedback signal into a predistortion module in the predistortion loop;
the step of performing denoising processing on the estimation signal to obtain a denoising estimation signal comprises the following steps:
determining a peak power point of the estimation signal, and calculating a memory depth estimation value of the predistortion loop through a first setting algorithm according to the estimation signal in a setting range of the peak power point;
if the memory depth estimation value is larger than a set threshold, calculating to obtain a first noise threshold through a second set algorithm according to the set threshold and the estimation signal in the set range;
eliminating the estimation signal lower than the first noise threshold value to obtain the de-noising estimation signal;
if the memory depth estimation value is smaller than the set threshold value, discarding the estimation signal in the set range;
and jumping to the step of acquiring the input signal and the power amplifier feedback signal of the power amplifier in the predistortion loop.
2. The predistortion optimization method of claim 1, wherein the step of performing a denoising process on the estimation signal to obtain a denoised estimation signal comprises:
and carrying out smooth denoising processing according to the estimation signal to obtain the denoising estimation signal.
3. The predistortion optimization method according to claim 2, wherein the step of performing smoothing and denoising processing based on the estimation signal to obtain the denoising estimation signal comprises:
smoothing the estimation signal in the set window length through a smoothing window with the set window length until smoothing processing of each frequency point of the estimation signal is finished to obtain the de-noising estimation signal; and the window moving step length of the smooth window is one frequency point.
4. The predistortion optimization method of claim 1, wherein the step of performing denoising processing on the estimation signal to obtain a denoised estimation signal comprises:
performing time domain conversion according to the estimation signal obtained by the least square estimation;
calculating a noise threshold according to the estimation signal after time domain conversion to obtain a second noise threshold;
and eliminating the estimation signal lower than the second noise threshold value to obtain the de-noised estimation signal.
5. A predistortion optimization device, comprising:
the signal acquisition module is used for acquiring an input signal and a power amplifier feedback signal of a power amplifier in the predistortion loop; the input signal is output to the power amplifier after being subjected to predistortion processing by the predistortion module, and the power amplifier feedback signal is output after being subjected to power amplifier processing by the power amplifier;
the signal estimation module is used for carrying out nonlinear response estimation according to the input signal and the power amplifier feedback signal to obtain an estimation signal; the non-linear response estimate comprises a least squares estimate or a minimum mean square error estimate;
the de-noising module is used for de-noising the estimation signal to obtain a de-noised estimation signal;
the signal recovery module is used for performing signal recovery according to the input signal and the de-noising estimation signal to obtain a recovered power amplifier feedback signal;
the signal input module is used for inputting the acquired input signal and the recovered power amplifier feedback signal into a predistortion module in the predistortion loop;
the denoising module is specifically configured to:
determining a peak power point of the estimation signal, and calculating a memory depth estimation value of the predistortion loop through a first setting algorithm according to the estimation signal in a setting range of the peak power point;
if the memory depth estimation value is larger than a set threshold value, calculating to obtain a first noise threshold value through a second set algorithm according to the set threshold value and the estimation signal in the set range;
eliminating the estimation signal lower than the first noise threshold value to obtain the de-noised estimation signal;
if the memory depth estimation value is smaller than the set threshold value, discarding the estimation signal in the set range;
and jumping to the step of acquiring the input signal and the power amplifier feedback signal of the power amplifier in the predistortion loop.
6. A computer device comprising a memory and a processor, the memory storing a computer program, characterized in that the computer program, when executed by the processor, implements the steps of the predistortion optimization method of any of claims 1 to 4.
7. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the predistortion optimization method of any one of claims 1 to 4.
8. A predistortion processing system is characterized by comprising a predistortion module, a power amplifier, a signal acquisition circuit, a nonlinear response circuit, a noise eliminator and a power amplifier feedback recovery circuit;
the signal acquisition circuit is used for acquiring an input signal and a power amplifier feedback signal of the power amplifier in the predistortion loop and sending the input signal and the power amplifier feedback signal to the nonlinear response circuit; the input signal is a signal which is output to the power amplifier after being subjected to predistortion processing by the predistortion module, and the power amplifier feedback signal is a signal which is output after being subjected to power amplifier processing by the power amplifier;
the nonlinear response circuit is used for carrying out nonlinear response estimation according to the input signal and the power amplifier feedback signal to obtain an estimation signal and sending the estimation signal to the noise eliminator; the non-linear response estimate comprises a least squares estimate or a minimum mean square error estimate;
the noise eliminator is used for eliminating noise of the estimation signal to obtain a noise elimination estimation signal and sending the noise elimination estimation signal to the power amplifier feedback recovery circuit;
the power amplifier feedback recovery circuit is used for performing signal recovery according to the de-noising estimation signal and the input signal to obtain a recovered power amplifier feedback signal, and inputting the input signal and the recovered power amplifier feedback signal into the predistortion module;
the predistortion module is used for carrying out predistortion processing on the input signal and the recovered power amplifier feedback signal;
denoising the estimation signal to obtain a denoised estimation signal, comprising:
determining a peak power point of the estimation signal, and calculating a memory depth estimation value of the predistortion loop through a first setting algorithm according to the estimation signal in a setting range of the peak power point;
if the memory depth estimation value is larger than a set threshold value, calculating to obtain a first noise threshold value through a second set algorithm according to the set threshold value and the estimation signal in the set range;
eliminating the estimation signal lower than the first noise threshold value to obtain the de-noised estimation signal;
if the memory depth estimation value is smaller than the set threshold value, discarding the estimation signal in the set range;
and jumping to the step of acquiring the input signal and the power amplifier feedback signal of the power amplifier in the predistortion loop.
CN201810737142.4A 2018-07-06 2018-07-06 Predistortion optimization method, device and system Expired - Fee Related CN109067369B (en)

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Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6798843B1 (en) * 1999-07-13 2004-09-28 Pmc-Sierra, Inc. Wideband digital predistortion linearizer for nonlinear amplifiers
US7366252B2 (en) * 2004-01-21 2008-04-29 Powerwave Technologies, Inc. Wideband enhanced digital injection predistortion system and method
US7151405B2 (en) * 2004-07-14 2006-12-19 Raytheon Company Estimating power amplifier non-linearity in accordance with memory depth
CN102487367B (en) * 2010-12-02 2014-09-10 中国科学院微电子研究所 Adaptive amplifying digital baseband pre-distortion method
KR101204964B1 (en) * 2011-07-20 2012-11-27 한국과학기술원 Predistortion apparatus and method for linearizing the local oscillator coupling effect and the power amplifier nonlinearity
CN102970262B (en) * 2012-11-16 2015-07-01 华南理工大学 Method for improving digital pre-distortion stability

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
A new architecture for frequency-selective digital predistortion linearization for RF power amplifiers;Jiwoo Kim;《2012 IEEE/MTT-S International Microwave Symposium Digest》;20121231;1-3 *
OFDM 系统功率放大器有记忆自适应预失真研究;张珅;《电视技术》;20131231;171-174 *

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