CN109065602A - A kind of terminal structure of power device and preparation method thereof - Google Patents
A kind of terminal structure of power device and preparation method thereof Download PDFInfo
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- CN109065602A CN109065602A CN201810824924.1A CN201810824924A CN109065602A CN 109065602 A CN109065602 A CN 109065602A CN 201810824924 A CN201810824924 A CN 201810824924A CN 109065602 A CN109065602 A CN 109065602A
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- 238000002360 preparation method Methods 0.000 title abstract description 4
- 239000004065 semiconductor Substances 0.000 claims abstract description 44
- 238000000034 method Methods 0.000 claims description 27
- 238000004519 manufacturing process Methods 0.000 claims description 7
- 239000004020 conductor Substances 0.000 claims 1
- 150000002500 ions Chemical class 0.000 description 35
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 12
- 230000015556 catabolic process Effects 0.000 description 12
- 229910052710 silicon Inorganic materials 0.000 description 12
- 239000010703 silicon Substances 0.000 description 12
- 230000001413 cellular effect Effects 0.000 description 10
- -1 phosphonium ion Chemical class 0.000 description 10
- 239000000758 substrate Substances 0.000 description 10
- 230000005684 electric field Effects 0.000 description 7
- 229910052787 antimony Inorganic materials 0.000 description 6
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 6
- 229910052785 arsenic Inorganic materials 0.000 description 6
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 6
- 239000000463 material Substances 0.000 description 6
- 125000004122 cyclic group Chemical group 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 5
- 230000004048 modification Effects 0.000 description 5
- 238000012986 modification Methods 0.000 description 5
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 4
- 241000209094 Oryza Species 0.000 description 4
- 235000007164 Oryza sativa Nutrition 0.000 description 4
- 229910052796 boron Inorganic materials 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 230000005669 field effect Effects 0.000 description 4
- 229910052733 gallium Inorganic materials 0.000 description 4
- 229910052738 indium Inorganic materials 0.000 description 4
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 4
- 235000009566 rice Nutrition 0.000 description 4
- 239000007787 solid Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 239000012071 phase Substances 0.000 description 3
- 230000000052 comparative effect Effects 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 238000011109 contamination Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000000407 epitaxy Methods 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 239000002994 raw material Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 239000012808 vapor phase Substances 0.000 description 2
- 239000002699 waste material Substances 0.000 description 2
- 238000009434 installation Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/063—Reduced surface field [RESURF] pn-junction structures
- H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
Abstract
The present invention relates to terminal structures of a kind of power device and preparation method thereof, the power device includes the first semiconductor layer of the first conduction type, the terminal structure for being formed in the active area in the body area in first semiconductor layer with the second conduction type and being formed in first semiconductor layer, the terminal structure includes the knot terminal expansion area of second conduction type adjacent with the body area, knot terminal expansion area surface is formed with super-junction structure, the super-junction structure includes multiple doped columns, the multiple doped column includes the first doped column of at least one the first conduction type and the second doped column of at least one the second conduction type, second doped column and first doped column are successively alternately arranged on body area direction from the near to the remote.The power device can substantially reduce the size of conventional junction termination extension plot structure, and then promote device performance, reduce device cost.
Description
Technical field
The present invention relates to technical field of semiconductors, the terminal structure of specifically a kind of power device and its production side
Method.
Background technique
Common extended structure knot terminal technology specifically includes that field plate techniques in power device at present, field limiting ring technology,
Junction terminal extension technology, laterally varying doping, and reduce surface field technology etc., wherein knot terminal expansion structure itself
Concentration it is usually smaller, due to electric field have surface curvature effect, surface is extremely easy to be affected, so as to cause resistance to pressure drop
It is low, the purpose of effective protection is not achieved, and if the concentration of increase knot terminal expansion area will lead to knot terminal expansion structure size
Increase, in turn results in the waste of device chip area.
Summary of the invention
The embodiment of the invention provides terminal structures of a kind of power device and preparation method thereof, can not waste chip
The pressure resistance of device is improved under the premise of area.
In a first aspect, the embodiment of the invention provides a kind of terminal structure of power device, the power device includes the
First semiconductor layer of one conduction type is formed in the active of the body area in first semiconductor layer with the second conduction type
Area and the terminal structure being formed in first semiconductor layer, the terminal structure include second with body area adjoining
The knot terminal expansion area of conduction type, knot terminal expansion area surface are formed with super-junction structure, and the super-junction structure includes more
A doped column, the multiple doped column include at least one the first conduction type the first doped column and at least one second lead
Second doped column of electric type, second doped column and first doped column are in the direction apart from the body area from the near to the remote
On be successively alternately arranged.
Second aspect, further embodiment of this invention provide a kind of production method of power device, which comprises this
Inventive embodiments provide a kind of terminal structure of power device, which comprises
The first semiconductor layer for being formed with the first conduction type of active area is provided, second is formed in the active area and leads
The body area of electric type；The knot terminal that second conduction type adjacent with the body area is formed in first semiconductor layer extends
Area；Super-junction structure is formed on the surface of the knot terminal expansion area, the super-junction structure includes multiple doped columns, the multiple to mix
Miscellaneous column includes the first doped column of at least one the first conduction type and the second doped column of at least one the second conduction type,
Second doped column and first doped column are successively alternately arranged on body area direction from the near to the remote.
It is appreciated that the present invention introduces the super-junction structure by the surface in the knot terminal expansion area, it is anti-in device
When to pressure-bearing, the knot terminal expansion area is set to undertake higher backward voltage, termination environment can be effectively reduced in such method
Surface field substantially reduces the size of conventional junction termination extension plot structure, and then promotes device performance, reduces device cost.
Detailed description of the invention
In order to illustrate the technical solution of the embodiments of the present invention more clearly, below to needed in embodiment description
Attached drawing is briefly described, it should be apparent that, drawings in the following description are some embodiments of the invention, general for this field
For logical technical staff, without creative efforts, it is also possible to obtain other drawings based on these drawings.
It constitutes a part of attached drawing of the invention to be used to provide further understanding of the present invention, schematic implementation of the invention
Example and its specification are used to explain the present invention, and do not constitute the improper restriction to not allowing you to invent.
Fig. 1 is the regional area schematic diagram for the power device that the embodiment of the present invention proposes；
Fig. 2 is the top view for the power device that the embodiment of the present invention proposes；
Fig. 3 is the regional area schematic diagram for the power device that further embodiment of this invention proposes；
Description of symbols: 1, the first semiconductor layer；2, active area；21, body area；3, terminal structure；31, knot terminal extends
Area；32, end ring；A1, the first doped column；A2, the second doped column.
Specific embodiment
It is clear in order to be more clear the purpose of the present invention, technical solution and advantageous effects, below in conjunction with this hair
Attached drawing in bright embodiment, technical scheme in the embodiment of the invention is clearly and completely described, it is clear that described
Embodiment is only a part of the embodiment of the present invention, instead of all the embodiments.Based on the embodiments of the present invention, this field
Those of ordinary skill's every other embodiment obtained without making creative work, belongs to protection of the present invention
Range.
It should be noted that in the absence of conflict, the feature in embodiment and embodiment in the present invention can phase
Mutually combination.
In the description of the present invention, it is to be understood that, term " center ", " longitudinal direction ", " transverse direction ", "upper", "lower",
The orientation or positional relationship of the instructions such as "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outside" is
It is based on the orientation or positional relationship shown in the drawings, is merely for convenience of description of the present invention and simplification of the description, rather than instruction or dark
Show that signified device or element must have a particular orientation, be constructed and operated in a specific orientation, therefore should not be understood as pair
Limitation of the invention.In addition, term " first ", " second " etc. are used for description purposes only, it is not understood to indicate or imply phase
To importance or implicitly indicate the quantity of indicated technical characteristic.The feature for defining " first ", " second " etc. as a result, can
To explicitly or implicitly include one or more of the features.In the description of the present invention, unless otherwise indicated, " multiple "
It is meant that two or more.
In the description of the present invention, it should be noted that unless otherwise clearly defined and limited, term " installation ", " phase
Even ", " connection " shall be understood in a broad sense, for example, it may be being fixedly connected, may be a detachable connection, or be integrally connected；It can
To be mechanical connection, it is also possible to be electrically connected；It can be directly connected, can also can be indirectly connected through an intermediary
Connection inside two elements.For the ordinary skill in the art, above-mentioned term can be understood by concrete condition
Concrete meaning in the present invention.
It is special to illustrate herein: according to the type of majority carrier semiconductor in semiconductor for convenience of subsequent description.If the
The majority carrier of one conduction type is hole, then the first conduction type is p-type, then the first conduction type of heavy doping is P+
Type, the first conduction type being lightly doped are P-type；If the majority carrier of the first conduction type is electronics, the first conductive-type
Type is N-type, and the first conduction type of heavy doping is N+ type, and the first conduction type being lightly doped is N-type.In next implementation
In example, it is described so that first conduction type is N-type and second conduction type is p-type as an example, but not to this
It is defined.
Fig. 1 and Fig. 2 is please referred to, Fig. 1 is the regional area schematic diagram for the power device that the embodiment of the present invention proposes；Fig. 2 is
The top view for the power device that the embodiment of the present invention proposes；The embodiment of the present invention provides a kind of terminal structure of power device, institute
The first semiconductor layer 1 that power device includes the first conduction type is stated, being formed in first semiconductor layer 1 has second to lead
The active area 2 in the body area 21 of electric type and the terminal structure being formed in first semiconductor layer 1, the terminal structure 3
Knot terminal expansion area 31 including second conduction type adjacent with the body area 21,31 surface of knot terminal expansion area is formed
There is a super-junction structure 311, the super-junction structure 311 includes multiple doped columns, and the multiple doped column includes that at least one first is led
Second doped column a2, the second doped column a2 of the first doped column a1 of electric type and at least one the second conduction type with
The first doped column a1 is successively alternately arranged on the body area 21 direction from the near to the remote.
It is appreciated that the present invention introduces the super-junction structure 311 by the surface in the knot terminal expansion area 31, in device
When part reverse pressure-bearing, the knot terminal expansion area 31 is enable to undertake higher backward voltage, such method can be effectively reduced
Termination environment surface field substantially reduces the size of 31 structure of conventional junction termination extension area, and then promotes device performance, reduces device
Cost.
Further, power device described in the embodiment of the present invention includes power diode, IGBT (Insulated
Gate Bipolar Transistor, ambipolar isolated-gate field effect transistor (IGFET)), MOS (metal-oxide-
Semiconductor, field effect transistor), the devices such as SCR (thyristor, Silicon Controlled Rectifier).
Specifically, in some embodiments of the invention, the material of first semiconductor layer 1 is elemental silicon, can be with
The epitaxial layer in semi-conductive substrate is formed in by epitaxy technique for one, the epitaxial layer is N-type ion doping, Doped ions
Specially phosphonium ion, in other embodiments, Doped ions can also be other pentavalent ions such as arsenic or antimony.The epitaxial layer 2
Thickness and concentration and device pressure resistance it is closely related, usual resistivity is in 5-50ohm.cm, and thickness is between 5-10um.It is described
Epitaxial layer can be formed on the upper surface of the substrate using epitaxial growth method, and the epitaxial growth method is preferably chemical vapor
Deposition process (or vapor phase epitaxial growth), chemical vapor deposition method be it is a kind of with vapor reaction raw material in solid matrix table
The technique of solid thin layer or film is reacted and is deposited into face, is a kind of epitaxial growth method of the transistor of comparative maturity, this method
Silicon and doped chemical are sprayed in the substrate, uniformity is reproducible, and step coverage is excellent.In other implementations
In example, first semiconductor layer 1 can also be semiconductor substrate, and carrier of the substrate 1 as the device, material is same
Sample is silicon, and silicon is most common, cheap and stable performance semiconductor material.
Specifically, the terminal structure 3 is semiconductor around the periphery active area 2 for having active area 2 is set to
The region of active device is done on silicon wafer, different doping can form the active area 2 of N-type or p-type, it is understood that, power
The voltage endurance capability of device depends primarily on the reverse-biased breakdown voltage of specific PN junction in device architecture, in order to obtain certain electric current energy
Power is usually composed in parallel by many cellulars, in device reverse withstand voltage, since the transverse electric field between cellular and cellular is mutual
It offsets, because breakdown does not occur inside cellular generally, but outmost cellular can puncture since electric field is concentrated.
Therefore specific structure is just needed to reduce electric field to improve breakdown voltage, these special constructions are terminal structure 3.It is described to have
Source region 2 is adjacent to based on the PN junction that type is between the body area 21 of the terminal structure 3 and first semiconductor layer 1 and ties,
The main knot assumes responsibility for the most important breakdown voltage of power device, by increasing the terminal structure 3 to share breakdown voltage, with
Reduce the breakdown possibility of power device.
Further, in some embodiments of the invention, the body area 21 and the knot terminal expansion area 31 are p-type
Type is lightly doped, wherein the doping concentration of the knot terminal expansion area 31 is lower than the doping concentration in the body area 21, specifically, institute
The doping concentration in the area Shu Ti 21 is in 2E13-5E13/cm3Between, the doping concentration of the knot terminal expansion area 31 is in 4E12-
6E12/cm3Between, the Doped ions in the body area 21 and the knot terminal expansion area 31 are boron ion, in other embodiments
In, Doped ions can also be other trivalent ions such as indium or gallium.More specifically, the body area 21 is extended with the knot terminal
Area 31 is both formed in the surface region of first semiconductor layer 1, the knot terminal expansion area 31 in first semiconductor
The doping thickness of layer 1, i.e., the junction depth of the described knot terminal expansion area 31 is can be on the body area 21 direction from the near to the remote
Be it is substantially constant be also possible to variation, if it is variation, the junction depth of the knot terminal expansion area 31 is apart from the body
It can be the non-uniform change that is also possible to of even variation on the direction of area 21 from the near to the remote.In some embodiments of the present invention
In, the junction depth of the knot terminal expansion area 31 be under the error that technique allows it is substantially constant, junction depth is micro- at 6 microns to 8
Between rice, the width of the knot terminal expansion area 31 is determined according to the resistance to pressure request of device, it is generally the case that the pressure resistance to device
It is required that higher, width is wider.
Further, the terminal structure 3 further includes cut-off ring 32, in some embodiments of the invention, the cut-off
Ring 32 be N-type heavy doping, Doped ions be phosphonium ion, in other embodiments, Doped ions can also be arsenic or antimony etc. its
His pentavalent ion.The cut-off ring 32 is formed in first semiconductor layer 1, and it is separate to be located at the knot terminal expansion area 31
The side in the body area 21 and with the knot terminal expansion area 31 keep a distance, this distance 100 microns to 400 microns it
Between, it preferably 200 microns, is oppositely arranged with the active area 2, for preventing the power device surface from transoid occurs and can
The contamination ion of collection semiconductor device surface, keeps device more stable.
Further, the super-junction structure 311 is formed in the surface region of the knot terminal expansion area 31, including multiple heavy
The doped column of doping contacts with each other between the doped column, and the multiple doped column includes at least one first conductive-type
First doped column a1 of type and the second doped column a2 of at least one the second conduction type, wherein in the super-junction structure 311
The doped column nearest and farthest apart from the body area 21 is the second doped column a2.In some embodiments of the invention, institute
State the first doped column a1 Doped ions be phosphonium ion, in other embodiments, Doped ions can also be arsenic or antimony etc. other
Pentavalent ion.In some embodiments of the invention, the Doped ions of the second doped column a2 are boron ion, in other implementations
In example, Doped ions can also be other trivalent ions such as indium or gallium.
Please refer to Fig. 1 and Fig. 3, wherein Fig. 3 is the regional area signal for the power device that further embodiment of this invention proposes
Figure；Further, in some embodiments of the invention, the doped column is such as Fig. 1 institute in the knot terminal expansion area 31
The continuous cyclic structure stated, in other embodiments of the invention, the doped column can also be as shown in Figure 3 intermittent
Discontinuous cyclic structure does not do excessive restriction herein, as long as the entire knot terminal expansion area 31 includes the described super of surface
Junction structure 311 can all exhaust.It should be noted that the super-junction structure 311 is intended merely to distinguish in name,
Actually a kind of semiconductor structure similar to super-junction structure 311, specific structure determine according to its actual structure,
It, which is named, does not do any restriction to the present invention.
Further, it is all exhausted to realize, in device reverse pressure-bearing, to enable the knot terminal expansion area 31
Higher backward voltage is undertaken, in some embodiments of the invention, the width of the doped column is with away from 21 distance of body area
Increase be gradually reduced.In the present embodiment, the width of the first doped column a1 and the second doped column a2 are micro- 4
Rice is between 6 microns, and junction depth is between 2 microns to 6 microns.
When further, in order to guarantee that device is reverse-biased, it may be implemented all to exhaust, each first doped column a1's mixes
Miscellaneous concentration is higher than each second doped column a2, i.e., the doping concentration of each first doped column a1 is higher than described
The doping concentration of second doped column a2, more specifically, the doping concentration of the first doped column a1 is in 2E14-3E14/cm3It
Between, the doping concentration of the second doped column a2 is in 1E14-2E14/cm3Between.
In some embodiments of the invention, the quantity of the doped column is 5, wherein the number of the first doped column a1
Amount is 3, and the quantity of the second doped column a2 is 2,5 doped columns on the body area 21 direction from the near to the remote
Put in order as the second doped column a2, the first doped column a1, the second doped column a2, the first doped column a1 and the second doped column
A2, wherein side and the knot terminal with the body area 21 apart from farthest the second doped column a2 far from the body area 21
Expansion area 31 is substantially overlapped far from the side in the body area 21.
Please herein refering to fig. 1 and Fig. 2, the embodiment of the invention provides a kind of production sides of the terminal structure 3 of power device
Method, which comprises
The first semiconductor layer 1 for being formed with the first conduction type of active area 2 is provided, the is formed in the active area 2
The body area 21 of two conduction types；Second conduction type adjacent with the body area 21 is formed in first semiconductor layer 1
Knot terminal expansion area 31；Super-junction structure 311 is formed on the surface of the knot terminal expansion area 31, the super-junction structure 311 includes
Multiple doped columns, the multiple doped column include at least one the first conduction type the first doped column a1 and at least one
Second doped column a2, the second doped column a2 and the first doped column a1 of two conduction types apart from the body area 21 by
Closely to being successively alternately arranged on remote direction.
It is appreciated that the present invention introduces the super-junction structure 311 by the surface in the knot terminal expansion area 31, in device
When part reverse pressure-bearing, the knot terminal expansion area 31 is enable to undertake higher backward voltage, such method can be effectively reduced
Termination environment surface field substantially reduces the size of 31 structure of conventional junction termination extension area, and then promotes device performance, reduces device
Cost.
Further, 31 domain of knot terminal expansion area and the super-junction structure 311 are expanded by first ion implanting again
Scattered technique is formed, and 31 domain of knot terminal expansion area and the super-junction structure 311 of certain junction depth and doping concentration are formed.
Further, power device described in the embodiment of the present invention includes power diode, IGBT (Insulated
Gate Bipolar Transistor, ambipolar isolated-gate field effect transistor (IGFET)), MOS (metal-oxide-
Semiconductor, field effect transistor), the devices such as SCR (thyristor, Silicon Controlled Rectifier).
Specifically, in some embodiments of the invention, the material of first semiconductor layer 1 is elemental silicon, can be with
The epitaxial layer in semi-conductive substrate is formed in by epitaxy technique for one, the epitaxial layer is N-type ion doping, Doped ions
Specially phosphonium ion, in other embodiments, Doped ions can also be other pentavalent ions such as arsenic or antimony.The epitaxial layer 2
Thickness and concentration and device pressure resistance it is closely related, usual resistivity is in 5-50ohm.cm, and thickness is between 5-10um.It is described
Epitaxial layer can be formed on the upper surface of the substrate using epitaxial growth method, and the epitaxial growth method is preferably chemical vapor
Deposition process (or vapor phase epitaxial growth), chemical vapor deposition method be it is a kind of with vapor reaction raw material in solid matrix table
The technique of solid thin layer or film is reacted and is deposited into face, is a kind of epitaxial growth method of the transistor of comparative maturity, this method
Silicon and doped chemical are sprayed in the substrate, uniformity is reproducible, and step coverage is excellent.In other implementations
In example, first semiconductor layer 1 can also be semiconductor substrate, and carrier of the substrate 1 as the device, material is same
Sample is silicon, and silicon is most common, cheap and stable performance semiconductor material.
Specifically, the terminal structure 3 is semiconductor around the periphery active area 2 for having active area 2 is set to
The region of active device is done on silicon wafer, different doping can form the active area 2 of N-type or p-type, it is understood that, power
The voltage endurance capability of device depends primarily on the reverse-biased breakdown voltage of specific PN junction in device architecture, in order to obtain certain electric current energy
Power is usually composed in parallel by many cellulars, in device reverse withstand voltage, since the transverse electric field between cellular and cellular is mutual
It offsets, because breakdown does not occur inside cellular generally, but outmost cellular can puncture since electric field is concentrated.
Therefore specific structure is just needed to reduce electric field to improve breakdown voltage, these special constructions are terminal structure 3.It is described to have
Source region 2 is adjacent to based on the PN junction that type is between the body area 21 of the terminal structure 3 and first semiconductor layer 1 and ties,
The main knot assumes responsibility for the most important breakdown voltage of power device, by increasing the terminal structure 3 to share breakdown voltage, with
Reduce the breakdown possibility of power device.
Further, in some embodiments of the invention, the body area 21 and the knot terminal expansion area 31 are p-type
Type is lightly doped, wherein the doping concentration of the knot terminal expansion area 31 is lower than the doping concentration in the body area 21, specifically, institute
The doping concentration in the area Shu Ti 21 is in 2E13-5E13/cm3Between, the doping concentration of the knot terminal expansion area 31 is in 4E12-
6E12/cm3Between, the Doped ions in the body area 21 and the knot terminal expansion area 31 are boron ion, in other embodiments
In, Doped ions can also be other trivalent ions such as indium or gallium.More specifically, the body area 21 is extended with the knot terminal
Area 31 is both formed in the surface region of first semiconductor layer 1, the knot terminal expansion area 31 in first semiconductor
The doping thickness of layer 1, i.e., the junction depth of the described knot terminal expansion area 31 is can be on the body area 21 direction from the near to the remote
Be it is substantially constant be also possible to variation, if it is variation, the junction depth of the knot terminal expansion area 31 is apart from the body
It can be the non-uniform change that is also possible to of even variation on the direction of area 21 from the near to the remote.In some embodiments of the present invention
In, the junction depth of the knot terminal expansion area 31 be under the error that technique allows it is substantially constant, junction depth is micro- at 6 microns to 8
Between rice, the width of the knot terminal expansion area 31 is determined according to the resistance to pressure request of device, it is generally the case that the pressure resistance to device
It is required that higher, width is wider.
Further, the terminal structure 3 further includes cut-off ring 32, in some embodiments of the invention, the cut-off
Ring 32 be N-type heavy doping, Doped ions be phosphonium ion, in other embodiments, Doped ions can also be arsenic or antimony etc. its
His pentavalent ion.In first semiconductor layer 1 described in the 32 type Cheng Yu of cut-off ring, and it is separate to be located at the knot terminal expansion area 31
The side in the body area 21 and with the knot terminal expansion area 31 keep a distance, this distance 100 microns to 400 microns it
Between, it preferably 200 microns, is oppositely arranged with the active area 2, for preventing the power device surface from transoid occurs and can
The contamination ion of collection semiconductor device surface, keeps device more stable.
Further, the super-junction structure 311 is formed in the surface region of the knot terminal expansion area 31, including multiple heavy
The doped column of doping contacts with each other between the doped column, and the multiple doped column includes at least one first conductive-type
First doped column a1 of type and the second doped column a2 of at least one the second conduction type, wherein in the super-junction structure 311
The doped column nearest and farthest apart from the body area 21 is the second doped column a2.In some embodiments of the invention, institute
State the first doped column a1 Doped ions be phosphonium ion, in other embodiments, Doped ions can also be arsenic or antimony etc. other
Pentavalent ion.In some embodiments of the invention, the Doped ions of the second doped column a2 are boron ion, in other implementations
In example, Doped ions can also be other trivalent ions such as indium or gallium.
Please refer to Fig. 1 and Fig. 3, wherein Fig. 3 is the regional area signal for the power device that further embodiment of this invention proposes
Figure；Further, in some embodiments of the invention, the doped column is such as Fig. 1 institute in the knot terminal expansion area 31
The continuous cyclic structure stated, in other embodiments of the invention, further, the doped column is extended in the knot terminal
It can be continuous cyclic structure in area 31, be also possible to intermittent discontinuous cyclic structure, do not do excessive restriction herein, only
It the knot terminal expansion area 31 to include entirely that the super-junction structure 311 on surface can all exhaust.It needs to illustrate
It is that the super-junction structure 311 is intended merely to distinguish in name, is actually a kind of partly leading similar to super-junction structure 311
Body structure, specific structure determine that name does not do 0 any restriction to the present invention according to its actual structure.
Further, it is all exhausted to realize, in device reverse pressure-bearing, to enable the knot terminal expansion area 31
Higher backward voltage is undertaken, in some embodiments of the invention, the width of the doped column is with away from 21 distance of body area
Increase be gradually reduced.In the present embodiment, the width of the first doped column a1 and the second doped column a2 are micro- 4
Rice is between 6 microns, and junction depth is between 2 microns to 6 microns.
When further, in order to guarantee that device is reverse-biased, it may be implemented all to exhaust, each first doped column a1's mixes
Miscellaneous concentration is higher than each second doped column a2, i.e., the doping concentration of each first doped column a1 is higher than described
The doping concentration of second doped column a2, more specifically, the doping concentration of the first doped column a1 is in 2E14-3E14/cm3It
Between, the doping concentration of the second doped column a2 is in 1E14-2E14/cm3Between.
In some embodiments of the invention, the quantity of the doped column is 5, wherein the number of the first doped column a1
Amount is 3, and the quantity of the second doped column a2 is 2,5 doped columns on the body area 21 direction from the near to the remote
Put in order as the second doped column a2, the first doped column a1, the second doped column a2, the first doped column a1 and the second doped column
A2, wherein side and the knot terminal with the body area 21 apart from farthest the second doped column a2 far from the body area 21
Expansion area 31 is substantially overlapped far from the side in the body area 21.
Although preferred embodiments of the present invention have been described, it is created once a person skilled in the art knows basic
Property concept, then additional changes and modifications may be made to these embodiments.So it includes excellent that the following claims are intended to be interpreted as
It selects embodiment and falls into all change and modification of the scope of the invention.
Obviously, various changes and modifications can be made to the invention without departing from essence of the invention by those skilled in the art
Mind and range.In this way, if these modifications and changes of the present invention belongs to the range of the claims in the present invention and its equivalent technologies
Within, then the present invention is also intended to include these modifications and variations.
Claims (10)
1. a kind of terminal structure of power device, which is characterized in that the power device includes the first the half of the first conduction type
Conductor layer is formed in the active area in the body area in first semiconductor layer with the second conduction type and is formed in described the
Terminal structure in semi-conductor layer, the terminal structure include that the knot terminal of second conduction type adjacent with the body area expands
Exhibition section, knot terminal expansion area surface are formed with super-junction structure, and the super-junction structure includes multiple doped columns, the multiple to mix
Miscellaneous column includes the first doped column of at least one the first conduction type and the second doped column of at least one the second conduction type,
Second doped column and first doped column are successively alternately arranged on body area direction from the near to the remote.
2. terminal structure according to claim 1, which is characterized in that in the super-junction structure body area described in distance recently and
Farthest doped column is second doped column.
3. terminal structure according to claim 1, which is characterized in that the doping concentration of each first doped column wants high
In the doping concentration of each second doped column.
4. terminal structure according to claim 1, which is characterized in that the width of the doped column with away from the body offset from
Increase be gradually reduced.
5. terminal structure according to claim 1, which is characterized in that the doping concentration in the body area is in 2E13-5E13/cm3
Between, the doping concentration of the knot terminal expansion area is in 4E12-6E12/cm3Between.
6. terminal structure according to claim 1, which is characterized in that the doping concentration of first doped column is in 2E14-
3E14/cm3Between, the doping concentration of second doped column is in 1E14-2E14/cm3Between.
7. a kind of production method of the terminal structure of power device, which is characterized in that the described method includes:
The first semiconductor layer for being formed with the first conduction type of active area is provided, is formed with the second conductive-type in the active area
The area Xing Ti；
The knot terminal expansion area of second conduction type adjacent with the body area is formed in first semiconductor layer；
Super-junction structure is formed on the surface of the knot terminal expansion area, the super-junction structure includes multiple doped columns, the multiple
Doped column includes the second doping of the first doped column and at least one the second conduction type of at least one the first conduction type
Column, second doped column and first doped column are successively alternately arranged on body area direction from the near to the remote.
8. the production method of terminal structure according to claim 7, in the super-junction structure body area described in distance recently and
Farthest doped column is second doped column.
9. the doping concentration of the production method of terminal structure according to claim 7, each first doped column is big
In each second doped column.
10. the production method of terminal structure according to claim 7, the width of the doped column with away from the body offset from
Increase be gradually reduced.
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| CN101510561A (en) * | 2009-03-30 | 2009-08-19 | 东南大学 | Ultra-junction longitudinal bilateral diffusion metal oxide semiconductor tube |
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