CN109063833A - A kind of prominent haptic configuration of the neural network based on memristor array - Google Patents
A kind of prominent haptic configuration of the neural network based on memristor array Download PDFInfo
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- CN109063833A CN109063833A CN201811272115.0A CN201811272115A CN109063833A CN 109063833 A CN109063833 A CN 109063833A CN 201811272115 A CN201811272115 A CN 201811272115A CN 109063833 A CN109063833 A CN 109063833A
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- G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
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Abstract
The present invention proposes a kind of neural network cynapse array circuit based on memristor, for preceding layer neuron in Connection Neural Network and later layer neuron；The circuit includes cynapse array, and cynapse array includes n*m synaptic structure, and each synaptic structure is connected in series by a Xiao Jite diode and a memory resistor；Input terminal of the anode of Xiao Jite diode as synaptic structure, the cathode of Xiao Jite diode are connected with the input terminal of memory resistor, output end of the output end of memory resistor as synaptic structure；Input terminal positioned at the m synaptic structure of same a line is connected, the input terminal as current row cynapse array；And the output end for being located at n synaptic structure of same row is connected, the output end as this column cynapse array；The cynapse array shares n input terminal and m output end.The present invention can prevent memristor circuit from multichannel leakage phenomenon occurring in information process；And it can be extended and change according to the scale and feature of real input signal.
Description
Technical field
The present invention relates to memristor technical field, especially a kind of neural network cynapse array circuit based on memristor.
Background technique
Memristor is presently mainly to be used as memory to be written and read and use, but handle operation information in memristor
Aspect remain the defect of application practice, such as: it is integrated it is difficult, yield rate is low, with high costs etc..Actually use
When memristor cross array structure (Cross-bar), there is the critical issue-leakage current that must be solved, leakage current is beneficial to electricity
The electric current that desirably path is not flowed in road, and with the further expansion of array scale, leakage current also will increase, thus
The scale of memristor is limited, though the 1T1M structure that existing memristor and CMOS are combined is able to solve current leakage, because
Its realize complex process, the industrially prepared time is long, this for research memristor processing information technology in terms of there is it is huge at
This consuming and time put into.
Summary of the invention
Goal of the invention: for the height of memristor array preparation cost in the prior art, difficulty is big, is not easy to extend, and exists and recall
The technical issues of hindering device leakage phenomenon, the present invention proposes a kind of neural network cynapse array circuit based on memristor.
Technical solution: in order to realize the above technical effect, technical solution proposed by the present invention are as follows:
A kind of neural network cynapse array circuit based on memristor, the circuit is for preceding layer in Connection Neural Network
Neuron and later layer neuron；The circuit includes cynapse array, and cynapse array includes n*m synaptic structure, wherein n is
The line number of cynapse array, m are the columns of cynapse array；Each synaptic structure is by a Xiao Jite diode and a memory resistor
It is connected in series；In the same synaptic structure, input terminal of the anode of Xiao Jite diode as synaptic structure, Xiao Jite diode
Cathode be connected with the input terminal of memory resistor, output end of the output end of memory resistor as synaptic structure；
Input terminal positioned at the m synaptic structure of same a line is connected, the input terminal as current row cynapse array；And it is located at same
The output end of n synaptic structure of one column is connected, the output end as this column cynapse array；It is a defeated that the cynapse array shares n
Enter end and m output end.
Further, the circuit further includes m operational amplifier, the input terminal of m operational amplifier respectively with cynapse
M output end of array is connected, and the output result of operational amplifier is the output result of respective column.
Further, the output signal of the cynapse array are as follows:
Vout=Vin* w
Wherein, VoutFor output signal matrix, Vout=[Vout1, Vout2..., VOUTm], VoutiFor cynapse array jth column
Output signal, j ∈ [1,2 ..., n]；VinFor the input signal matrix of cynapse array, Vin=[Vin1, Vin2..., Vinn], VinjFor
The input signal of the i-th row of cynapse array, i ∈ [1,2 ..., m]；W is the weight coefficient matrix of cynapse array, w=[wij]m×n, wij
Weight coefficient provided by j-th of synaptic structure for the i-th row in cynapse array,Wherein, RxFor jth column institute
The equivalent resistance of the operational amplifier of connection, RMijFor in j-th of synaptic structure of the i-th row in cynapse array memory resistor etc.
Imitate resistance.
The utility model has the advantages that compared with prior art, present invention has the advantage that
The present invention has built a kind of neural network cynapse array circuit based on memristor, and the circuit is based on traditional low journey
Memristor integrated packaging technology is spent, and is replaced in current common technology using Xiao Jite diode of good performance
SELECTOR device can prevent memristor circuit in information process, and multichannel leakage phenomenon occurs；The circuit can
It is extended and changes according to the scale of real input signal and feature, and can be used for field of neural networks.
Detailed description of the invention
Fig. 1 is the structure chart of the embodiment of the present invention.
Specific embodiment
Neural network cynapse array circuit proposed by the present invention based on memristor is for preceding layer in Connection Neural Network
Neuron and later layer neuron；The circuit includes cynapse array, and cynapse array includes n*m synaptic structure, wherein n is
The line number of cynapse array, m are the columns of cynapse array；Each synaptic structure is by a Xiao Jite diode and a memory resistor
It is connected in series；In the same synaptic structure, input terminal of the anode of Xiao Jite diode as synaptic structure, Xiao Jite diode
Cathode be connected with the input terminal of memory resistor, output end of the output end of memory resistor as synaptic structure；Positioned at same a line
M synaptic structure input terminal be connected, the input terminal as current row cynapse array；And it is located at n synaptic structure of same row
Output end be connected, the output end as this column cynapse array；The cynapse array shares n input terminal and m output end.
The present invention will be further explained in the following with reference to the drawings and specific embodiments.
Fig. 1 is the neural network cynapse array circuit based on memristor that the present invention is built, neural before simulating 8
The intermediate cynapse array that member is connect with neuron after 8, the cynapse array includes 32 cynapses altogether, forms 8 × 4 array junctions
The output end of structure, each column is also connected with operational amplifier.The input signal of the cynapse array takes FPGA in the design
Included LTC1660 is provided, and synaptic weight is realized by the synaptic structure of each position, if wijFor the i-th row in cynapse array
J-th of synaptic structure provided by weight coefficient,Wherein, RxThe operational amplifier connected is arranged by jth
Equivalent resistance, RMijFor the equivalent resistance of memory resistor in j-th of synaptic structure of the i-th row in cynapse array.In view of voltage
Problem of pressure drop and circuit shunting function, carry out dot-product operation by the way of inputting one by one in this scenario, it is described prominent
Touch the output signal of array are as follows:
Vout=Vin* w
Wherein, VoutFor output signal matrix, Vout=[Vout1, Vout2..., VOUTm], VoutiFor cynapse array jth column
Output signal, j ∈ [1,2 ..., n]；VinFor the input signal matrix of cynapse array, Vin=[Vin1, Vin2..., Vinn], VinjFor
The input signal of the i-th row of cynapse array, i ∈ [1,2 ..., m], w are the weight coefficient matrix of cynapse array, w=[wij]m×n。
The above is only a preferred embodiment of the present invention, it should be pointed out that: for the ordinary skill people of the art
For member, various improvements and modifications may be made without departing from the principle of the present invention, these improvements and modifications are also answered
It is considered as protection scope of the present invention.
Claims (3)
1. a kind of neural network cynapse array circuit based on memristor, which is characterized in that the circuit is for connecting nerve net
Preceding layer neuron and later layer neuron in network；The circuit includes cynapse array, and cynapse array includes n*m synaptic knob
Structure, wherein n is the line number of cynapse array, and m is the columns of cynapse array；Each synaptic structure by a Xiao Jite diode and
One memory resistor is connected in series；In the same synaptic structure, input terminal of the anode of Xiao Jite diode as synaptic structure,
The cathode of Xiao Jite diode is connected with the input terminal of memory resistor, output of the output end of memory resistor as synaptic structure
End；
Input terminal positioned at the m synaptic structure of same a line is connected, the input terminal as current row cynapse array；And it is located at same row
N synaptic structure output end be connected, the output end as this column cynapse array；The cynapse array shares n input terminal
With m output end.
2. a kind of neural network cynapse array circuit based on memristor according to claim 1, which is characterized in that described
Circuit further includes m operational amplifier, and the input terminal of m operational amplifier is connected with m output end of cynapse array respectively, fortune
The output result for calculating amplifier is the output result of respective column.
3. a kind of neural network cynapse array circuit based on memristor according to claim 2, which is characterized in that described
The output signal of cynapse array are as follows:
Vout=Vin*w
Wherein, VoutFor output signal matrix, Vout=[Vout1, Vout2..., VOUTm], VoutiFor the output letter of cynapse array jth column
Number, j ∈ [1,2 ..., n]；VinFor the input signal matrix of cynapse array, Vin=[Vin1, Vin2..., Vinn], VinjFor cynapse battle array
The input signal of the i-th row of column, i ∈ [1,2 ..., m]；W is the weight coefficient matrix of cynapse array, w=[wij]m×n, wijFor cynapse
Weight coefficient provided by j-th of synaptic structure of the i-th row in array,Wherein, RxIt is connected by jth column
The equivalent resistance of operational amplifier, RMijFor the equivalent resistance of memory resistor in j-th of synaptic structure of the i-th row in cynapse array.
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Cited By (7)
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| CN109800870A (en) * | 2019-01-10 | 2019-05-24 | 华中科技大学 | A kind of Neural Network Online learning system based on memristor |
| CN109977470A (en) * | 2019-02-20 | 2019-07-05 | 华中科技大学 | A kind of circuit and its operating method based on memristor Hopfield neural fusion sparse coding |
| CN110619908A (en) * | 2019-08-28 | 2019-12-27 | 中国科学院上海微系统与信息技术研究所 | Synapse module, synapse array and weight adjusting method based on synapse array |
| CN111755062A (en) * | 2019-03-26 | 2020-10-09 | 慧与发展有限责任合伙企业 | Self-repairing dot product engine |
| CN113675223A (en) * | 2021-05-17 | 2021-11-19 | 松山湖材料实验室 | Photoelectric synapse device and application thereof |
| US11294763B2 (en) | 2018-08-28 | 2022-04-05 | Hewlett Packard Enterprise Development Lp | Determining significance levels of error values in processes that include multiple layers |
| US11625588B2 (en) | 2019-11-18 | 2023-04-11 | Industrial Technology Research Institute | Neuron circuit and artificial neural network chip |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN109977470A (en) * | 2019-02-20 | 2019-07-05 | 华中科技大学 | A kind of circuit and its operating method based on memristor Hopfield neural fusion sparse coding |
| CN109977470B (en) * | 2019-02-20 | 2020-10-30 | 华中科技大学 | Circuit for sparse coding of memristive Hopfield neural network and operation method thereof |
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| CN110619908B (en) * | 2019-08-28 | 2021-05-25 | 中国科学院上海微系统与信息技术研究所 | Synapse module, synapse array and weight adjusting method based on synapse array |
| US11625588B2 (en) | 2019-11-18 | 2023-04-11 | Industrial Technology Research Institute | Neuron circuit and artificial neural network chip |
| CN113675223A (en) * | 2021-05-17 | 2021-11-19 | 松山湖材料实验室 | Photoelectric synapse device and application thereof |
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