CN109005373B - High dynamic range image sensor pixel structure - Google Patents

High dynamic range image sensor pixel structure Download PDF

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CN109005373B
CN109005373B CN201810986259.6A CN201810986259A CN109005373B CN 109005373 B CN109005373 B CN 109005373B CN 201810986259 A CN201810986259 A CN 201810986259A CN 109005373 B CN109005373 B CN 109005373B
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signal output
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CN109005373A (en
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曾夕
杨海玲
张远
严慧婕
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Shanghai IC R&D Center Co Ltd
Chengdu Light Collector Technology Co Ltd
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Shanghai IC R&D Center Co Ltd
Chengdu Light Collector Technology Co Ltd
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/50—Control of the SSIS exposure
    • H04N25/57—Control of the dynamic range

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  • Transforming Light Signals Into Electric Signals (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

The invention discloses a high dynamic range image sensor pixel structure, which comprises a signal conversion module, a signal judgment module and a signal output module, wherein the signal output module comprises a signal output channel I and a signal output channel II, and the signal output channel I and the signal output channel II comprise two input ports and an output port; the output port of the signal conversion module is simultaneously connected with the input port of the signal judgment module, the input port of the signal output channel I and the input port of the signal output channel II, and the two output ports of the signal judgment module are respectively connected with the input port of the signal output channel I and the input port of the signal output channel II. The invention provides a high dynamic range image sensor pixel structure, which comprises two signal output channels, wherein the corresponding signal output channels can be automatically selected for large signals and small signals output by a signal conversion module, so that the dynamic range of pixel output signals is improved.

Description

High dynamic range image sensor pixel structure
Technical Field
The invention relates to the field of image sensors, in particular to a high dynamic range image sensor pixel structure.
Background
With the continuous development of image sensor technology, CMOS image sensors have advantages of high integration level, low power consumption, and the like, and are increasingly widely applied in the fields of electronics, monitoring, navigation, traffic, and the like. However, as CMOS image sensor technology is continuously developed, the performance of the CMOS image sensor is more and more required.
The dynamic range of the pixels is an important index for measuring the performance of the image sensor, the larger the dynamic range of the image sensor is, the finer and truer the shooting scene can be reflected, and particularly when the scene with large brightness difference is shot, if the dynamic range is smaller, the scene details cannot be restored if either the dark scene is completely black or the bright scene is overexposed. There are many current high dynamic range processing methods, and pixel merging, segmented exposure or multi-frame exposure are common. However, the resolution is reduced due to pixel combination, the multi-frame exposure sacrifices the resolution or the frame rate, and the segmented exposure introduces an inflection point so that the sensitivity curve of the segmented exposure is not monotonous. The dynamic range of conventional high dynamic range exposure systems is limited by the operating threshold of the pixel readout circuitry.
Disclosure of Invention
The invention aims to provide a high dynamic range image sensor pixel structure which comprises two signal output paths, wherein the corresponding signal output paths can be automatically selected for large signals and small signals converted by a photodiode, so that the dynamic range of pixel output signals is improved.
In order to achieve the purpose, the invention adopts the following technical scheme: a high dynamic range image sensor pixel structure comprises a signal conversion module, a signal judgment module and a signal output module, wherein the signal output module comprises a signal output path I and a signal output path II, the signal output path I and the signal output path II both comprise two input ports and one output port, the signal judgment module comprises one input port and two output ports, and the two output ports are respectively an output port I for outputting a control signal Vctr1 and an output port II for outputting a control signal Vctr 2;
an optical signal is input into an input port of the signal conversion module, an output port of the signal conversion module is simultaneously connected with an input port of the signal judgment module, an input port of the signal output channel I and an input port of the signal output channel II, an output port I of the signal judgment module is connected with the input port of the signal output channel I, an output port II of the signal judgment module is connected with the input port of the signal output channel II, and output ports of the signal output channel I and the signal output channel II are both connected with the output port of the signal output module;
the signal conversion module converts an optical signal into an electric signal, the signal judgment module judges the size of the electric signal output by the signal conversion module, and controls the signal output channel I or the signal output channel II to output according to a judgment result.
Furthermore, the signal output path I comprises a first current source, a first switch and a first input PMOS tube; the first end of the first switch is connected with one end of a first current source, the second end of the first switch is simultaneously connected with the source electrode of the first input PMOS tube and the output port of the signal output channel I, the third end of the first switch is connected with the output port I of the judging module, the third end of the first switch is used for controlling whether the first switch is conducted or not, the other end of the first current source is connected with a power supply, and the drain electrode of the first input PMOS tube is grounded.
Furthermore, the signal output path II comprises a second current source, a second switch and a second input NMOS tube; the first end of the second switch is connected with one end of a second current source, the second end of the second switch is simultaneously connected with the source electrode of the second input NMOS tube and the output port of the signal output channel II, the third end of the second switch is connected with the output port II of the signal judging module, the third end of the second switch is used for controlling whether the second switch is conducted or not, the other end of the second current source is grounded, and the drain electrode of the second input NMOS tube is connected with the power supply.
Further, the electrical signal output by the signal conversion module is positively or negatively correlated with the optical signal received by the signal conversion module.
Further, the output port of the signal conversion module outputs an electrical signal VsigWherein, the VsigInversely correlating with the optical signal received by the signal conversion module; the signal judgment module judges the electrical signal VsigAnd a threshold value V of the electrical signalthMaking a comparison if Vsig<VthIf so, the output port i of the signal determination module outputs the control signal Vctr1, so that the signal output path i is turned on, and outputs a result; if Vsig≥VthIf so, the output port ii of the signal determination module outputs the control signal Vctr2, so that the signal output path ii is turned on, and outputs a result; the electrical signal threshold value VthIs any value in the overlapping area of the input voltage of the signal output path I and the input voltage of the signal output path II.
Further, the output port of the signal conversion module outputs an electrical signal VpixWherein, the VpixPositively correlated with the optical signal received by the signal conversion module; the signal judgment module judges the electrical signal VpixAnd a threshold value V of the electrical signalthMaking a comparison if Vpix<VthIf so, the output port i of the signal determination module outputs the control signal Vctr1, so that the signal output path i is turned on, and outputs a result; if Vpix≥VthIf so, the output port ii of the signal determination module outputs the control signal Vctr2, so that the signal output path ii is turned on, and outputs a result; the electrical signal threshold value VthIs any value in the overlapping area of the input voltage of the signal output path I and the input voltage of the signal output path II.
Further, the gains in the signal output path I and the signal output path II are equal.
Further, the signal conversion module includes a photodiode, a transmission MOS transistor, and a reset MOS transistor, the signal determination module includes an inverter INV and a buffer BUF connected in parallel, the signal output path i includes a first current source, a first switch and a first input PMOS transistor, the signal output path ii includes a second current source, a second switch and a second input NMOS transistor, and the specific connection relationship is:
one end of the photodiode is grounded, the other end of the photodiode is connected with a source electrode of the transmission MOS tube, a grid electrode of the transmission MOS tube is connected with a transmission signal, and a drain electrode of the transmission MOS tube is simultaneously connected with a source electrode of the reset MOS tube, an input end of the inverter INV, an input end of the buffer BUF, a grid electrode of the first input PMOS tube and a grid electrode of the second input NMOS tube; the drain electrode of the reset MOS tube is connected with a power supply, and the grid electrode of the reset MOS tube is connected with a reset signal; an output end of the inverter INV outputs a control signal Vctr 1; the output end of the buffer BUF outputs a control signal Vctr 2; the first end of the first switch is connected with one end of a first current source, the second end of the first switch is simultaneously connected with the source electrode of the first input PMOS tube and the output port of the signal output path I, the third end of the first switch is connected with the output port I of the judging module, and the third end of the first switch is used for controlling whether the first end and the second end of the first switch are conducted or not; the other end of the first current source is connected with a power supply, and the drain electrode of the first input PMOS tube is grounded; the first end of the second switch is connected with one end of a second current source, the second end of the second switch is simultaneously connected with the source electrode of the second input NMOS tube and the output port of the signal output channel II, the third end of the second switch is connected with the output port II of the signal judgment module, and the third end of the second switch is used for controlling whether the first end and the second end of the second switch are conducted or not; the other end of the second current source is grounded, and the drain electrode of the second input NMOS tube is connected with a power supply.
Furthermore, the transmission MOS tube is a PMOS tube or an NMOS tube; the reset MOS tube is a PMOS tube or an NMOS tube.
Further, the source electrode and the drain electrode of the transmission MOS tube and the reset MOS tube can be interchanged.
The invention has the beneficial effects that: the invention provides two different signal output paths aiming at a large signal with larger voltage and a small signal with smaller voltage, solves the problem that the small signal cannot be output due to the limitation of the input voltage range of the pixel output circuit at present, and improves the dynamic range of the pixel output signal. And this patent still provides the signal decision module of automatic selection large-signal and small-signal, carries out automatic judgement to the voltage that the signal conversion module output to select corresponding output path and export.
Drawings
FIG. 1 is a circuit diagram of a 4T pixel structure in the prior art
Fig. 2 is a schematic structural diagram of a pixel structure of a high dynamic range image sensor according to the present invention.
Fig. 3 is a circuit diagram of a pixel structure of an image sensor when the output voltage of the signal conversion module is positively correlated with the optical signal.
Fig. 4 is a circuit diagram of a pixel structure of an image sensor when the output voltage of the signal conversion module is negatively correlated with the optical signal.
Fig. 5 is a circuit diagram when the signal decision block is a comparator.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention are described in detail below with reference to the accompanying drawings.
The prior art sensor pixel structure adopts a conventional 4T structure, as shown in fig. 1, and only includes a signal conversion module 1 and a signal output module 3, wherein, the signal conversion module 1 includes that the signal conversion module 1 includes photodiode PD, transmission MOS transistor NM0, reset MOS transistor NM1, the signal output module includes current source In and input MOS transistor NM2, the one end ground connection of photodiode PD, the source of transmission MOS transistor NM0 is connected to the other end, transmission signal TX is connected to the gate of transmission MOS transistor NM0, the drain of transmission MOS transistor NM0 connects the source of reset MOS transistor NM1 and the gate of input MOS transistor NM2 simultaneously, reset signal RX is connected to the gate of reset MOS transistor NM1, the drain of reset MOS transistor NM1 is connected to the power supply, the drain of input MOS transistor NM2 is connected to the power supply, the source of input MOS transistor NM2 is connected to the output of signal output module and the current source, the other end ground connection of current source.
It can be seen that the conventional 4T structure signal output module has only one output path, and the voltage range that can be output by the 4T structure is limited by the input voltage range of the output path, and output with a higher dynamic range cannot be realized.
Referring to fig. 2, the high dynamic range image sensor pixel structure provided by the present invention includes a signal conversion module, a signal determination module and a signal output module, wherein the signal output module includes a signal output path i and a signal output path ii, the signal output path i and the signal output path ii both include two input ports and one output port, the signal determination module includes one input port and two output ports, and the two output ports are respectively an output port i for outputting a control signal Vctr1 and an output port ii for outputting a control signal Vctr 2. The concrete connection mode is as follows: the optical signal input signal conversion module comprises an input port, an output port and an output port, wherein the input port of the optical signal input signal conversion module, the input port of a signal judgment module, the input port of a signal output path I and the input port of a signal output path II are connected at the same time, the input port of the signal judgment module is connected with the input port of the signal output path I, the output port of the signal judgment module is connected with the input port of the signal output path II, and the output ports of the signal output path I and the signal output path II are connected with the output port of the signal output module. The signal conversion module converts the optical signal into an electric signal, the signal judgment module judges the size of the electric signal output by the signal conversion module and controls the signal output channel I or the signal output channel II to output the electric signal according to the judgment result.
In the invention, because the connection relationship between the two output ports of the signal judgment module and the two paths in the signal output path is arbitrary, the output port II of the signal judgment module can be connected with the input port of the signal output path I, and the output port I of the signal judgment module is connected with the input port of the signal output path II.
The signal output path I comprises a first current source, a first switch and a first input PMOS tube; the first end of the first switch is connected with one end of a first current source, the second end of the first switch is simultaneously connected with a source electrode of a first input PMOS tube and an output port of a signal output channel I, the third end of the first switch is connected with an output port I of the judging module, the third end of the first switch is used for controlling whether the first switch is conducted or not, the other end of the first current source is connected with a power supply, and a drain electrode of the first input PMOS tube is grounded. The signal output path II comprises a second current source, a second switch and a second input NMOS tube; the first end of the second switch is connected with one end of a second current source, the second end of the second switch is simultaneously connected with the source electrode of the second input NMOS tube and the output port of the signal output channel II, the third end of the second switch is connected with the output port II of the signal judgment module, the third end of the second switch is used for controlling whether the second switch is conducted or not, the other end of the second current source is grounded, and the drain electrode of the second input NMOS tube is connected with the power supply. Because the first input PMOS tube is adopted in the signal output path I, and the grid electrode of the PMOS tube is conducted under low voltage, the signal output path I can only be used for outputting an electric signal with a relatively low voltage signal; similarly, the second input NMOS transistor is used as the signal output path ii, and the gate of the NMOS transistor is turned on under high voltage, so the signal output path ii can only be used to output an electrical signal with a relatively high voltage signal.
Referring to fig. 3 and 4, the signal conversion module converts the received optical signal NphConverting into electric signal, and recording the voltage at output end of signal conversion module as Vsig. It is worth to be noted that, due to the different structures of the signal conversion modules, the output end of the signal conversion module outputs the voltage VsigThe light signal received by the optical sensor can be in positive correlation or negative correlation.
In the present invention, it can be determined that the optical signal NphIs determined by its corresponding electrical signal VpixSize of (1), NphThe larger the VpixThe larger the corresponding electrical signal VpixAnd has no definite relation with the output voltage of the output port of the signal conversion module. No matter how the signal conversion module converts the electric signal of the photodiode, the signal judgment module only judges the electric signal output by the signal conversion module, namely the signal judgment module always compares the output electric signal of the output port of the signal conversion module with the electric signal threshold value, regardless of the relation between the output electric signal and the optical signal. The determination mode of the electric signal threshold of the signal judgment module is as follows: what is needed isThreshold value V of the electric signalthIs any value in the overlapping area of the input voltage of the signal output path I and the input voltage of the signal output path II. The specific principle is as follows: for the pixel structure of a single output path, the output path has a specific input range, only the input voltage in the input range can be normally output, and the input voltage not in the input range cannot be normally output. The dual-output-path full-swing-range input circuit adopts two output paths, namely an NMOS output path and a PMOS output path, and the two output paths are complementary to each other and can realize the full-swing-range input of a larger range even from 0 to VDD. However, two paths cannot be conducted at the same time at each moment, and if the two paths are conducted at the same time, output voltage conflict occurs to cause output voltage abnormity. To achieve that only one output channel is active at a time, a selection has to be made. To ensure V no matter how largepixCan be normally output after being selectively controlled, the threshold value of the electric signal must be in the common range of the two output paths, otherwise V existspixAnd the normal output can not be realized. For example, if the input voltage range of the signal output path I is V1～V2The input voltage range of the signal output path II is V3～V4Then V must be satisfied3≤Vth≤V2In which V is3≤V2When the output range of the signal output path I is V1～VthDoes not contain VthThe output range of the signal output path II is Vth～V4Comprising Vth。
The circuit of the signal determination module in the present invention may adopt any determination circuit in the prior art, and is described below by two specific circuits, but is not limited to the following examples. As shown in fig. 3 and 4, the signal determination module 2 of the present invention includes an inverter INV and a buffer BUF connected in parallel, wherein input ends of the inverter INV and the buffer BUF are both connected to an output port of the signal conversion module, an output end of the inverter INV is connected to one output end of the signal determination module, and an output end of the buffer BUF is connected to the other output end of the signal determination module.
As shown in fig. 5, the signal determining module of the present invention may also be a comparator, two input terminals of the comparator respectively input the output voltage of the signal converting module and the threshold of the electrical signal, and after the comparison operation of the comparator, an output terminal thereof respectively outputs two control signals.
The invention is further illustrated by the following two examples.
Example 1
As shown in fig. 3, the signal conversion module includes a photodiode PD, a transmission MOS transistor M0, and a reset MOS transistor M1, one end of the photodiode PD is grounded, the other end of the photodiode PD is connected to the source of the transmission MOS transistor M0, the gate of the transmission MOS transistor M0 is connected to the transmission signal TX, and the drain of the transmission MOS transistor is connected to the source of the reset MOS transistor M1; the drain electrode of the reset MOS tube is connected with a power supply, and the grid electrode of the reset MOS tube is connected with a reset signal RX. When the TX signal is conducted and the RX signal is conducted, the photodiode PD is in a reset state, charges converted from photons received by the photodiode are absorbed to a power supply, the photodiode does not generate effective charges, and the voltage output by the signal conversion module is reset voltage VrstApproximately equal to the supply voltage. When the TX signal is not turned on, the photodiode PD is in an active state, and charges converted from photons received by the photodiode are stored at the photodiode PD. When the TX signal is on and the RX signal is off, the photodiode PD is in a signal transfer state, and the charge converted by the photodiode is transferred to point a via M0, where it is converted to a voltage. The charge generated by PD reaches point A to reduce the voltage at point A to VsigThen N isphVoltage magnitude V obtained by conversionpix＝Vrst-VsigI.e. Vsig＝Vrst-Vpix. In this case the output voltage of the signal conversion module is inversely related to the optical signal received by the photodiode.
Referring to fig. 3, a circuit connection relationship of a pixel structure of a high dynamic range image sensor is as follows: the signal conversion module 1 comprises a photodiode PD, a transmission MOS tube M0 and a reset MOS tube M1, the signal judgment module comprises an inverter INV and a buffer BUF which are connected in parallel, and the signal output module 3 comprises a signal output path I and a signal output path II; the signal output path I comprises a first current source Ip, a first switch SW1 and a first input PMOS tube PM1, the signal output path II comprises a second current source In, a second switch SW2 and a second input NMOS tube NM2, and the specific connection relationship is as follows: one end of the photodiode PD is grounded, the other end of the photodiode PD is connected with the source electrode of a transmission MOS tube M0, the gate electrode of the transmission MOS tube M0 is connected with a transmission signal TX, and the drain electrode of the transmission MOS tube M0 is simultaneously connected with the source electrode of the reset MOS tube M1, the input end of the inverter INV, the input end of the buffer BUF, the gate electrode of the first input PMOS tube PM1 and the gate electrode of the second input NMOS tube NM 2; the drain electrode of the reset MOS tube M1 is connected with a power supply, and the gate electrode of the reset MOS tube M1 is connected with a reset signal RX; the output end of the inverter INV outputs a control signal Vctr 1; the output end of the buffer BUF outputs a control signal Vctr 2; a first end of the first switch SW1 is connected with one end of the first current source Ip, a second end of the first switch SW1 is simultaneously connected with a source electrode of the first input PMOS transistor PM1 and an output port of the signal output path i, a third end of the first switch is connected with the output port i of the judging module, and the third end of the first switch controls whether the first end and the second end of the first switch are conducted or not according to the control signal Vctr 1; the other end of the first current source Ip is connected with a power supply, and the drain electrode of the first input PMOS pipe PM1 is grounded; a first end of the second switch SW2 is connected with one end of a second current source, a second end of the second switch SW2 is simultaneously connected with a source of the second input NMOS transistor and an output port of the signal output path ii, a third end of the second switch SW2 is connected with an output port ii of the signal determination module, and a third end of the second switch SW2 controls whether the first end and the second end of the second switch are conducted or not according to the control signal Vctr 2; the other end of the second current source In is connected to ground, and the drain of the second input NMOS transistor NM2 is connected to the power supply.
In the configuration shown in FIG. 3, the signal determination module will output an electrical signal VsigAnd a threshold value V of the electrical signalthMaking a comparison if Vsig<VthThen the control signal Vctr1 makes the first switch conductive; if Vsig≥VthThen the control signal Vctr2 causes the second switch to conduct.
Example 2
As shown in fig. 4, the signal conversion moduleThe block comprises an RPD transistor M3, a photodiode PD, a transmission MOS transistor M0, a reset MOS transistor M1, a capacitor CAP and an RC transistor M4. When the RX signal, the TX signal and the RPD signal are conducted, the PC signal is turned off, at the moment, the photodiode and the capacitor are reset, namely, the voltages of the point B, the point C and the point D are equal, and V isD＝VB＝VC＝VDD，
Subsequently, the TX signal and the RPD signal are turned off, and the PD performs exposure to generate charges, so that the voltage at the D-point decreases.
The TX signal is turned on again, so that the charge generated by the PD reaches one end of the capacitor CAP, and the voltage at the point B is reduced.
The TX signal is turned off again, the voltage at the point B is stable, and the stable voltage is VB＝VDD-VpixIn which V ispixThe charge generated for PD exposure.
RX signal is turned off, and the voltage at point C is kept at VC＝VDD。
The RC signal is conducted, and the voltage at the point B is from VDD to VpixReduced to 0, the voltage difference reduced at point B is VDD-Vpix. Due to the charge induction effect at two ends of the capacitor, the voltage difference between the point C and the point B is reduced by the same voltage difference, and the point C voltage is also reduced by VDD-VpixThen the final voltage at point C is VC＝VDD-(VDD-Vpix)＝VpixNamely, the voltage stabilized at the point C at this time is the voltage of the electrical signal converted by the photodiode.
Finally, the RC signal is turned off, and the voltage at the point C is kept constant, namely VC＝Vpix. In this case, the output voltage of the signal conversion module is positively correlated with the optical signal received by the photodiode.
The connection manner of the signal determination module 2 and the signal output module 3 in this embodiment is the same as that in embodiment 1, and will not be described in detail here.
The output voltage of the output end of the signal conversion module is recorded as VpixThe signal judging module judges the voltage VpixAnd a threshold value V of the electrical signalthMaking a comparison if Vpix<VthIf so, the output port I of the signal judgment module outputs a control signal Vctr1, so that the signal output channel I is conducted, and a result is output; if Vpixg≥VthThen the output port ii of the signal determination module outputs the control signal Vctr2, so that the signal output path ii is turned on, and outputs the result.
The two embodiments described above describe two conversion output modes of the signal conversion module in detail, and note that the voltage converted from the optical signal received by the photodiode is VpixThe output voltage of the signal conversion module is recorded as VsigWhen V ispixAnd VsigWhen the signals are positively correlated, the signal output path I outputs VpixA relatively small voltage. When V ispixAnd VsigWhen the negative correlation is carried out, the signal output path I outputs VpixA relatively large voltage. The gain of signal output path i is Av1 and the gain of signal output path ii is Av2, the following equation must be satisfied: vth*Av1＝VthAv2, so that it is guaranteed that the input and output are always continuous and not at VthA trip point occurs.
Preferably, the transmission MOS transistor and the reset MOS transistor in the invention may be NMOS transistors or PMOS transistors, and the source and drain of the transmission MOS transistor and the reset MOS transistor in the circuit diagram of the invention may be interchanged.
The above description is only a preferred embodiment of the present invention, and the embodiment is not intended to limit the scope of the present invention, so that all equivalent structural changes made by using the contents of the specification and the drawings of the present invention should be included in the scope of the appended claims.

Claims (10)

1. A high dynamic range image sensor pixel structure is characterized by comprising a signal conversion module, a signal judgment module and a signal output module, wherein the signal output module comprises a signal output path I and a signal output path II, the signal output path I and the signal output path II both comprise two input ports and one output port, the signal judgment module comprises one input port and two output ports, and the two output ports are respectively an output port I for outputting a control signal Vctr1 and an output port II for outputting a control signal Vctr 2;
an optical signal is input into an input port of the signal conversion module, an output port of the signal conversion module is simultaneously connected with an input port of the signal judgment module, an input port of the signal output channel I and an input port of the signal output channel II, an output port I of the signal judgment module is connected with the input port of the signal output channel I, an output port II of the signal judgment module is connected with the input port of the signal output channel II, and output ports of the signal output channel I and the signal output channel II are both connected with the output port of the signal output module;
the signal conversion module converts an optical signal into an electric signal, the signal judgment module judges the size of the electric signal output by the signal conversion module, and controls the signal output channel I or the signal output channel II to output according to a judgment result.
2. The pixel structure of claim 1, wherein the signal output path I comprises a first current source, a first switch and a first input PMOS transistor; the first end of the first switch is connected with one end of a first current source, the second end of the first switch is simultaneously connected with the source electrode of the first input PMOS tube and the output port of the signal output channel I, the third end of the first switch is connected with the output port I of the judging module, the third end of the first switch is used for controlling whether the first switch is conducted or not, the other end of the first current source is connected with a power supply, and the drain electrode of the first input PMOS tube is grounded.
3. The pixel structure of claim 2, wherein the signal output path ii comprises a second current source, a second switch and a second input NMOS transistor; the first end of the second switch is connected with one end of a second current source, the second end of the second switch is simultaneously connected with the source electrode of the second input NMOS tube and the output port of the signal output channel II, the third end of the second switch is connected with the output port II of the signal judging module, the third end of the second switch is used for controlling whether the second switch is conducted or not, the other end of the second current source is grounded, and the drain electrode of the second input NMOS tube is connected with the power supply.
4. The pixel structure of claim 3, wherein the electrical signal output by the signal conversion module is positively or negatively correlated to the received optical signal.
5. The pixel structure of claim 4, wherein the signal conversion module converts the received optical signal into a voltage VpixAnd outputs an electrical signal V at an output port of the signal conversion modulesigWherein, the VsigInversely correlating with the optical signal received by the signal conversion module; the signal judgment module judges the electrical signal VsigAnd a threshold value V of the electrical signalthMaking a comparison if Vsig<VthIf so, the output port i of the signal determination module outputs the control signal Vctr1, so that the signal output path i is turned on, and outputs a result; if Vsig≥VthIf so, the output port ii of the signal determination module outputs the control signal Vctr2, so that the signal output path ii is turned on, and outputs a result; the electrical signal threshold value VthIs any value in the overlapping area of the input voltage of the signal output path I and the input voltage of the signal output path II.
6. The pixel structure of claim 4, wherein the signal conversion module converts the received optical signal into a voltage VpixAnd outputs an electrical signal V at an output port of the signal conversion modulepixWherein, the VpixPositively correlated with the optical signal received by the signal conversion module; the signal judgment module judges the electrical signal VpixAnd a threshold value V of the electrical signalthMaking a comparison if Vpix<VthIf so, the output port i of the signal determination module outputs the control signal Vctr1, so that the signal output path i is turned on, and outputs a result; if Vpix≥VthIf so, the output port ii of the signal determination module outputs the control signal Vctr2, so that the signal output path ii is turned on, and outputs a result; the electrical signal threshold value VthIs any value in the overlapping area of the input voltage of the signal output path I and the input voltage of the signal output path II.
7. A high dynamic range image sensor pixel structure as claimed in claim 1, wherein the gains in signal output path i and signal output path ii are equal.
8. The pixel structure of a high dynamic range image sensor according to any one of claims 1-7, wherein the signal conversion module comprises a photodiode, a transfer MOS transistor, and a reset MOS transistor, the signal determination module comprises an inverter INV and a buffer BUF connected in parallel, the signal output path i comprises a first current source, a first switch, and a first input PMOS transistor, the signal output path ii comprises a second current source, a second switch, and a second input NMOS transistor, and the specific connection relationship is:
one end of the photodiode is grounded, the other end of the photodiode is connected with a source electrode of the transmission MOS tube, a grid electrode of the transmission MOS tube is connected with a transmission signal, and a drain electrode of the transmission MOS tube is simultaneously connected with a source electrode of the reset MOS tube, an input end of the inverter INV, an input end of the buffer BUF, a grid electrode of the first input PMOS tube and a grid electrode of the second input NMOS tube; the drain electrode of the reset MOS tube is connected with a power supply, and the grid electrode of the reset MOS tube is connected with a reset signal; an output end of the inverter INV outputs a control signal Vctr 1; the output end of the buffer BUF outputs a control signal Vctr 2; the first end of the first switch is connected with one end of a first current source, the second end of the first switch is simultaneously connected with the source electrode of the first input PMOS tube and the output port of the signal output channel I, the third end of the first switch is connected with the output port I of the judging module, and the third end of the first switch is used for controlling whether the first switch is conducted or not; the other end of the first current source is connected with a power supply, and the drain electrode of the first input PMOS tube is grounded; the first end of the second switch is connected with one end of a second current source, the second end of the second switch is simultaneously connected with the source electrode of the second input NMOS tube and the output port of the signal output channel II, the third end of the second switch is connected with the output port II of the signal judgment module, and the third end of the second switch is used for controlling whether the second switch is conducted or not; the other end of the second current source is grounded, and the drain electrode of the second input NMOS tube is connected with a power supply.
9. The pixel structure of claim 8, wherein the transfer MOS transistor is a PMOS transistor or an NMOS transistor; the reset MOS tube is a PMOS tube or an NMOS tube.
10. The pixel structure of claim 8, wherein the source and drain electrodes of the transfer MOS transistor and the reset MOS transistor are interchangeable.
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