CN109005004B - Gold code multiphase parallel generation method - Google Patents

Gold code multiphase parallel generation method Download PDF

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CN109005004B
CN109005004B CN201810965156.1A CN201810965156A CN109005004B CN 109005004 B CN109005004 B CN 109005004B CN 201810965156 A CN201810965156 A CN 201810965156A CN 109005004 B CN109005004 B CN 109005004B
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gold code
gold
state transition
transition matrix
phase delay
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CN109005004A (en
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聂少军
勾潇薇
吉欣
张展
骞尧
解宁
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Xian Institute of Space Radio Technology
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J13/00—Code division multiplex systems
    • H04J13/0007—Code type
    • H04J13/0022—PN, e.g. Kronecker
    • H04J13/0029—Gold
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J13/00—Code division multiplex systems
    • H04J13/10—Code generation

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Abstract

The invention discloses a Gold code multiphase parallel generation method, which comprises the steps of firstly determining the phase delay of each path relative to the initial time according to the code length of a Gold code and the number N of paths to be generated in parallel, and firstly determining a one-step state transition matrix of two shift registers of the Gold code at the initial time in each path; then, according to the phase delay i, determining the nth row vector of the i-step state transition matrix of two shift registers of the Gold code; multiplying the nth row vector by the content of the initial moment of the shift register to obtain the phase output of the shift register, and further obtaining the Gold code after the phase delay i. The invention can simultaneously output a plurality of paths of phases with different delays in parallel, so that the signal synchronization circuit can carry out segmented parallel search on the Gold code phase, thereby greatly shortening the search time of the Gold code phase.

Description

Gold code multiphase parallel generation method
Technical Field
The invention relates to a spread spectrum code synchronization technology, in particular to a Gold code multiphase parallel generation method.
Background
The Gold code as a pseudo-random code has the characteristics of low correlation, large quantity, good balance and the like, is widely applied to the fields of mobile communication and satellite communication, and provides good spread spectrum gain and multiple access characteristics for wireless signals.
Currently, Gold codes are generally generated serially, and in spread spectrum signal synchronization using Gold codes, a signal synchronization circuit performs serial search on Gold code phases. When the Gold code length is longer, the code phase search time increases. For example, the code length of C/a code of GPS satellite is 1023, and 1023 searches are needed to find the correct code phase in the worst case, which inevitably requires a long search time.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: the method can simultaneously output a plurality of paths of phases with different delays in parallel, so that a signal synchronization circuit can perform segmented parallel search on the Gold code phase, and the search time of the Gold code phase is greatly shortened.
The technical solution of the invention is as follows: a Gold code multiphase parallel generation method comprises the following steps:
(1) determining the phase delay of each path relative to the initial time according to the Gold code length and the number N of paths to be generated in parallel;
(2) and each path generates Gold codes after phase delay according to the following method, so that the parallel generation of N paths of Gold codes with different phases is realized, and the generation method comprises the following steps:
(2.1) determining A, B a one-step state transition matrix of the Gold code at the initial moment of two shift registers according to two generating polynomials of the Gold code;
(2.2) determining I-step state transition matrix A of two shift registers of Gold code according to the phase delay ii、BiAnd further obtain AiN row vector CiAnd BiN row vector DiWherein n is the shift register length;
(2.3) according to the row vector Ci、DiAnd the content X of the initial time of two shift registers of Gold code0、Y0Obtaining the phase output x of two shift registers of Gold coden i、yn i；
(2.4) according to xn i、yn iAnd obtaining the Gold code after the phase delay i.
In the step (2.1), two generating polynomials of Gold code are set as G1(x)、G2(y), then the one-step state transition matrix A, B is as follows:
Figure GDA0002354155560000021
elements of the one-step state transition matrix A
Figure GDA0002354155560000022
Elements of one-step state transition matrix B
Figure GDA0002354155560000023
In the step (2.2) AiN row vector CiAnd BiN row vector DiIs composed of
Ci＝[Ai n1，Ai n2，…，Ai nn]＝[c1 i，c2 i，…，cn i]
Di＝[Bi n1，Bi n2，…，Bi nn]＝[d1 i，d2 i，…，dn i]
Wherein A isi njFor i-step state transition matrix AiN row and j column elements of, Bi njFor i-step state transition matrix BiRow n and column j.
In the step (2.3), xn i＝CiX0，yn i＝DiY0。
In the step (2.4), Gold code g after phase delay ii＝xn i⊕yn i。
In the step (1), when the phase delay of each path relative to the initial time is determined, it is ensured that the phase delays of two adjacent paths are the same or similar.
Compared with the prior art, the invention has the following beneficial effects:
according to the invention, the Gold code after phase delay i is obtained by determining the i-step state transition matrix of the Gold code shift register and multiplying the initial value of the register and the last row vector of the i-step state transition matrix, so that parallel generation of N paths of Gold codes with different phases is realized, a signal synchronization circuit can perform segmented parallel search on the Gold code phase, and the search time of the Gold code phase is greatly shortened.
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FIG. 1 is a flow chart of a Gold code multiphase parallel generation method according to the present invention;
fig. 2 is a specific circuit diagram of an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
According to the Gold code generating polynomial and the required phase delay, the corresponding state transition matrix is determined, the obtained specific state transition matrix is multiplied by the initial value of the Gold code shift register, namely, the Gold code with any phase delay is generated by linearly combining the initial time value of the shift register. The invention realizes the function of parallelly outputting multi-path different-phase delay Gold codes.
As shown in FIG. 1, the Gold code multiphase parallel generation method of the present invention comprises the following steps:
(1) determining the phase delay of each path relative to the initial time according to the Gold code length and the number N of paths to be generated in parallel;
(2) and each path generates Gold codes after phase delay according to the following method, so that the parallel generation of N paths of Gold codes with different phases is realized, and the generation method comprises the following steps:
s110, respectively determining two m-sequence shift registers G according to the generating polynomial of two m-sequences of Gold code1And G2A one-step state transition matrix at an initial time.
In particular, let the generator polynomial G of two m-sequences of Gold codes1(x)、G2(y) are each independently
G1(x)＝1+a1x1+a2x2+…+anxn
G2(y)＝1+b1y1+b2y2+…+bnyn
Where n is the m sequence shift register length.
Then Gold code m-sequence shift register G1The one-step state transition matrix A is
Figure GDA0002354155560000041
I.e. elements of A
Figure GDA0002354155560000042
Gold code m sequence shift register G2The one-step state transition matrix B is
Figure GDA0002354155560000043
I.e. elements of B
Figure GDA0002354155560000044
S120, determining i-step state transition matrix A of two shift registers of Gold code according to phase delay ii、BiAnd further obtain AiN row vector CiAnd BiN row vector Di；
Ci＝[Ai n1，Ai n2，…，Ai nn]＝[c1 i，c2 i，…，cn i]
Di＝[Bi n1，Bi n2，…，Bi nn]＝[d1 i，d2 i，…，dn i]
Wherein A isi njFor i-step state transition matrix AiN row and j column elements of, Bi njFor i-step state transition matrix BiRow n and column j.
S130, according to the i-step state transition matrix Ai、BiLast row column vector Ci、DiAnd the content X of the initial moment of the Gold code shift register0、Y0Obtaining the phase output x of two shift registers of Gold coden i、yn i；
Specifically, let the content X of the initial time of two shift registers of Gold code0＝[x1 0，x2 0，…， xn 0]，Y0＝[y1 0，y2 0，…，yn 0]. After a phase delay i, the register content is Xi＝[x1 i， x2 i，…，xn i]＝AiX0，Yi＝[y1 i，y2 i，…，yn i]＝BiY0。
xn i＝CiX0，yn i＝DiY0。
S140, according to xn i、yn iObtaining Gold code g after phase delay ii
gi＝xn i⊕yn i＝CiX0⊕DiY0
Example (b):
let the Gold code be the C/A code of the GPS signal, and the code length n be 1023. In the spread spectrum signal synchronization process, in order to accelerate the C/a code phase search speed, the C/a code generator may output 8 phases in parallel, and on the premise of ensuring that the phase delays of two adjacent paths are the same or close (i.e., ensuring that each search interval is uniformly distributed), the length of each search interval is determined to be 128 phases (128 equals 1024/8), i.e., the phase delay of two adjacent paths is 128. Therefore, the phase delay of each of the 8 paths of the C/a code output in parallel with respect to the initial time is 0, 128, 256, 384, 512, 640, 768, 896, respectively.
The generating polynomials of two m sequences of Gold code are respectively G1(x)＝1+x3+x10， G2(y)＝1+y2+y3+y6+y8+y9+y10. Thus two shift registers G1And G2The corresponding one-step state transition matrices are respectively
Figure GDA0002354155560000051
For each path of phase delay, obtain Ai、Bi(i-0, 128, 256, 384, 512, 640, 768, 896), and C is obtainedi、Di. Thereby generating 8-way phase-delayed Gold codes in parallel.
A specific circuit diagram of an embodiment of the invention is shown in fig. 2. Shift register G1Composed of ten memories and several XOR devices, and a shift register G2Composed of ten memories and several XOR devices, G1Output eight phases, G2And outputting eight paths of phases, and obtaining eight paths of Gold codes with different phase delays after corresponding XOR.
The invention obtains the Gold code with any specified phase delay by linear combination of the Gold code register vectors, realizes the purpose of Gold code multiphase parallel output, has simple algorithm structure and is convenient for hardware realization.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims (2)

1. A Gold code multiphase parallel generation method is characterized by comprising the following steps:
(1) determining the phase delay of each path relative to the initial time according to the Gold code length and the number N of paths to be generated in parallel;
(2) and each path generates Gold codes after phase delay according to the following method, so that the parallel generation of N paths of Gold codes with different phases is realized, and the generation method comprises the following steps:
s110, generating two m sequences according to Gold codePolynomial to determine two m-sequence shift registers G1And G2A one-step state transition matrix at an initial moment;
in particular, let the generator polynomial G of two m-sequences of Gold codes1(x)、G2(y) are each independently
G1(x)＝1+a1x1+a2x2+…+anxn
G2(y)＝1+b1y1+b2y2+…+bnyn
Wherein n is the length of the m-sequence shift register;
then Gold code m-sequence shift register G1The one-step state transition matrix A is
Figure FDA0002354155550000011
I.e. elements of A
Figure FDA0002354155550000012
Gold code m sequence shift register G2The one-step state transition matrix B is
Figure FDA0002354155550000013
I.e. elements of B
Figure FDA0002354155550000014
k＝1,2,…n,j＝1,2,…n；
S120, determining i-step state transition matrix A of two shift registers of Gold code according to phase delay ii、BiAnd further obtain AiN row vector CiAnd BiN row vector Di；
Ci＝[Ai n1，Ai n2，…，Ai nn]＝[c1 i，c2 i，…，cn i]
Di＝[Bi n1，Bi n2，…，Bi nn]＝[d1 i，d2 i，…，dn i]
Wherein A isi njFor i-step state transition matrix AiN row and j column elements of, Bi njFor i-step state transition matrix BiRow n and column j of (1);
s130, according to the i-step state transition matrix Ai、BiLast row column vector Ci、DiAnd the content X of the initial moment of the Gold code shift register0、Y0Obtaining the phase output x of two shift registers of Gold coden i、yn i；
Specifically, let the content X of the initial time of two shift registers of Gold code0＝[x1 0，x2 0，…，xn 0]，Y0＝[y1 0，y2 0，…，yn 0]. After a phase delay i, the register content is Xi＝[x1 i，x2 i，…，xn i]＝AiX0，Yi＝[y1 i，y2 i，…，yn i]＝BiY0；
xn i＝CiX0，yn i＝DiY0；
S140, according to xn i、yn iObtaining Gold code g after phase delay ii
Figure FDA0002354155550000021
2. The Gold code multiphase parallel generation method of claim 1, wherein: in the step (1), when the phase delay of each path relative to the initial time is determined, it is ensured that the phase delays of two adjacent paths are the same or similar.
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