CN109001609A - Calculate the charge pump method that stress in Nanometer CMOS Devices causes interface state density variable quantity - Google Patents

Calculate the charge pump method that stress in Nanometer CMOS Devices causes interface state density variable quantity Download PDF

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CN109001609A
CN109001609A CN201810783631.3A CN201810783631A CN109001609A CN 109001609 A CN109001609 A CN 109001609A CN 201810783631 A CN201810783631 A CN 201810783631A CN 109001609 A CN109001609 A CN 109001609A
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stress
charge pump
current
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interface state
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CN109001609B (en
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马丽娟
鲁明亮
王旭
吴建宁
朱增力
马先良
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26Testing of individual semiconductor devices
    • G01R31/2601Apparatus or methods therefor
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26Testing of individual semiconductor devices
    • G01R31/2642Testing semiconductor operation lifetime or reliability, e.g. by accelerated life tests

Abstract

The present invention discloses a kind of charge pump method for calculating stress in Nanometer CMOS Devices and causing interface state density variable quantity, the substrate current under the original state and stress state of nanometer small size device is measured on the basis of traditional CP method, therefrom extracts true charge pump current ICP, calculate the interface defect density of stress generation.This technology is suitable for the very big nanometer small size cmos device of leakage current, and measurement process keep frequency is fixed, and measurement result accuracy is high.The present invention enables to cause the research of defect characterizing method to be further developed for Nanometer CMOS Devices stress, may advantageously facilitate a nanometer development for small size cmos device reliability consideration.

Description

Calculate the charge pump method that stress in Nanometer CMOS Devices causes interface state density variable quantity
Technical field
The invention belongs to the technologies that CMOS component stress generates interface state density, and in particular to a kind of calculating nanometer CMOS Stress causes the charge pump method of interface state density variable quantity in device.
Background technique
With the continuous development of integrated circuit technique, integrated circuit technique node gradually decreases to nanoscale, semiconductor device The integrity problem of part seriously restricts the service life of device.The stress condition for influencing cmos device specifically includes that minus gate voltage temperature Unstability (Negative Bias Temperature Instability, NBTI), hot carrier injection effect (Hot Carrier Injection, HCI) and gate oxide time breakdown (Time-dependence dielectric Breakdown, TDDB) etc..When applying these stress in cmos device, in Si/SiO2Interfacial state is generated in interface and oxide layer Or oxidation layer defects, these defects are constantly accumulated with the increase of stress time, cause threshold voltage, the migration of device Rate, the parameters such as mutual conductance change, and drain current is caused to reduce the degeneration with device.As cmos device narrows down to nanoscale, Influence of this degeneration to device performance is more serious, and it is particularly important that the defect that can be generated to stress carries out quantitative description.
In in the past few decades, it is done unremitting effort, has investigated a large amount of technology to characterize HCI The interface state density of generation.In cmos device, most widely used is charge pump (Charge pumping, CP) measurement skill Art.However, oxidated layer thickness constantly reduces with the reduction of device size, CP technology becomes more and more challenging.Because Traditional CP method is in measurement small size device current course, grid leakage current (ILeakage) very big, or even cover electricity Lotus pumps electric current (ICP), cause data collection and analysis difficult, traditional CP method is completely infeasible.
The nearly more than ten years, there has been proposed some new measuring techniques, the improved method including CP technology.Steve S.Chung gives an IFCP (Incremental Frequency Charge on the basis of traditional CP method Pumping) method, this method passes through the difference of charge pump current under two different frequencies of measurement, in biggish grid leakage current In extract true charge pump current, to calculate interface state density.Ryan J.T. proposes a FMCP (frequency-modulated Charge Pumping) method overcomes the leakage current that charge pump measures in small size device Problem, in the gadget with high leakage current, effectively measuring interface state density.
The above both methods requires the charge pump current of measurement different frequency, and is subtracted each other and remove leakage current (ILeakage), to extract true ICP.But this method, in implementation process, leakage current occurs with measurement frequency difference Variation, finally affects the accuracy of measurement result.
Summary of the invention
Goal of the invention: it is an object of the invention to solve the deficiencies in the prior art, a kind of calculating nanometer is provided Stress causes the charge pump method of interface state density variable quantity in cmos device, and the present invention optimizes CP measuring technique, and utilizes this skill Charge pump current of the art by measurement cmos device under original state and stress state, can calculate the interface of stress generation Defect concentration, the present invention measure under fixed frequency and obtain charge pump current, and true I is extracted under different stress conditionsCP Electric current, without the concern for leakage current with the variation of measurement frequency, measurement result accuracy is high.
Technical solution: traditional CP is carried out to a cmos device and is tested, source electrode, drain electrode and substrate are grounded simultaneously, grid Connect a voltage impulse generator.When grid connects positive pulse, device is in strong inversion, and electronics is constantly flowed to from source electrode and drain electrode Channel, a portion can be captured by interfacial state;When grid impulse becomes negative pulse, device becomes accumulated state, channel Interior electronics flows back to source electrode and drain electrode, and has not had time enough to be transmitted back to conduction band by the electronics that interfacial state is captured, at this time The hole of substrate flows to channel, and a portion and the electronics that interfacial state is captured are compound, interfacial state trapped hole.Gate voltage from When negative pulse becomes positive pulse again, the hole in channel flows to substrate, and the hole of interfacial state capture has little time to be transmitted back to valence Band is simultaneously compound with the electronics that flows into from source-drain electrode, interfacial state trapped electron again.
From the point of view of above-mentioned whole cycle, substrate has net direct current hole current to be drawn into interfacial state.This direct current hole Electric current is referred to as charge pump current ICP
Stress causes the charge pump method of interface state density variable quantity in a kind of calculating Nanometer CMOS Devices of the invention, successively The following steps are included:
(1) in a cmos device, its source electrode, drain electrode and substrate are grounded simultaneously, grid connects amplitude and frequency-invariant Voltage pulse carry out tentering scanning, measure substrate current ISUBWith basic voltage VBaseChange curve;
(2) corresponding degenerative conditions are added to cmos device, applied under most serious degenerative conditions in nanometer small size device After corresponding stress, Si/SiO2Interface generates interfacial state, and most serious degenerative conditions refer to V hereinDS=VGS(i.e. when Vs=0V, VD and The voltage of VG);
(3) device in step (2) after degenerating is applied into charge pump experiment, source electrode, drain electrode and the substrate of device again It is grounded simultaneously, grid adds the voltage pulse of amplitude and frequency-invariant to carry out tentering scanning, measures substrate current ISUBWith basic voltage VBaseChange curve;
(4) substrate current I is measured after the above-mentioned stress of calculating device application and under original stateSUBAnd ISUBDifference, obtain electricity The difference △ I of lotus pump electric currentCPWith basic voltage VBaseChange curve, find out △ ICPPeak value;
(5) the interface state density variable quantity △ N that above-mentioned stress generates is calculatedit
In the above process, substrate current I is measured by connecing ammeter in device substrateSUB
Further, the electric current I of substrate is measured in the step (1) in the substrate setting ammeter of cmos deviceSUB, Substrate current ISUBFor charge pump current ICPWith grid leakage current ILeakageThe sum of, it may be assumed that ISUB=ICP+ILeakage
Wherein, ICP=qAfNit, q is the quantity of electric charge, and A is that device area refers to that grid length L is tested multiplied by grid width W, f for CP Pulse frequency, q, A and f are fixed value during the experiment;NitFor interface state density.
Further, ammeter is set in the substrate of cmos device in the step (3) to measure substrate current ISUB, electricity Flow ISUBFor charge pump current ICPWith grid leakage current ILeakageThe sum of, it may be assumed that ISUB=ICP+ILeakage
Wherein, ICP=qAfNit, q is the quantity of electric charge, and A is that device area refers to that grid length L is tested multiplied by grid width W, f for CP Pulse frequency, NitFor the interface state density after variation.
Further, in the step (4), △ ICP=qAf △ Nit
The interface state density variable quantity that HCI stress generates is then are as follows: △ Nit=△ ICP/ qAf, △ ICP=| ICP-ICP|。
Further, it carries out being that tentering uses together when scanning using voltage impulse generator in the step (1) and (3) One frequency f.
Further, degenerative conditions used in the step (2) are any one in HCI, NBTI and TDDB.
The utility model has the advantages that the present invention measures the original state and stress of nanometer small size device on the basis of traditional CP method Substrate current under state therefrom extracts true charge pump current ICP, calculate the interface defect density of stress generation.This Technology is suitable for the very big nanometer small size cmos device of leakage current, and measurement process keep frequency is fixed, measurement result accuracy It is high.The present invention enables to cause the research of defect characterizing method to be further developed for Nanometer CMOS Devices stress, favorably In the development for promoting the cmos device reliability consideration of nanometer small size.
In brief, measurement accuracy of the present invention is high;Stress in nano-device can be calculated and cause interface state density variable quantity Charge pump method;And measurement method is simple, easy to operate.
Detailed description of the invention
Fig. 1 is flow chart of the invention;
Fig. 2 is the basic experiment schematic device of charge pumping technique in embodiment;
Fig. 3 is the impulse waveform schematic diagram of fixed pulse amplitude scan in embodiment;
Fig. 4 is the relativity of grid leakage current ILeakage and charge pump current ICP in embodiment;
Fig. 5 be in embodiment under device original state substrate current ISUB with reference voltage VBase change curve;
Fig. 6 is hot carrier in jection (HCI) effect schematic diagram in embodiment in cmos device;
Fig. 7 is that device charge pump current ICP after applying HCI stress is bent with the variation of reference voltage VBase in embodiment Line;
Fig. 8 is the variation delta ICP of charge pump current caused by HCI stress with the change curve of VBase.
Wherein, the relativity of grid leakage current ILeakage and charge pump current ICP when Fig. 4 (a) is thick gate device; The relativity of grid leakage current ILeakage and charge pump current ICP when Fig. 4 (b) is thin gate device.
Specific embodiment
Technical solution of the present invention is described in detail below, but protection scope of the present invention is not limited to the implementation Example.
As shown in Figure 1, stress causes the charge of interface state density variable quantity in a kind of calculating Nanometer CMOS Devices of the invention Pumping method, successively the following steps are included:
(1) in a cmos device, its source electrode, drain electrode and substrate are grounded simultaneously, grid connects amplitude and frequency-invariant Voltage pulse carry out tentering scanning, measure substrate current ISUBWith basic voltage VBaseChange curve;The step (1) In in the substrate setting ammeter of cmos device measure substrate current ISUB, electric current ISUBFor charge pump current ICPAnd electric leakage of the grid Flow ILeakageThe sum of, it may be assumed that ISUB=ICP+ILeakage
Wherein, ICP=qAfNit, q is the quantity of electric charge, and A is that device area refers to that grid length L is tested multiplied by grid width W, f for CP Pulse frequency, q, A and f are fixed value during the experiment;NitFor interface state density;
(2) corresponding degenerative conditions are added to cmos device, applies most serious degenerative conditions (V in nanometer small size deviceDS= VGS) under stress after, Si/SiO2Interface generates interfacial state;The degenerative conditions are any one in HCI, NBTI and TDDB, such as HCI;
(3) device in step (2) after degenerating is applied into conventional charge pump experiment again, the source electrode of device, drain electrode and Substrate is grounded simultaneously, and grid adds the voltage pulse of amplitude and frequency-invariant to carry out tentering scanning, measures substrate current ISUBWith substrate Voltage VBaseChange curve;Ammeter is set to measure substrate current I in the substrate of cmos device in the step (3)SUB, Electric current ISUBFor charge pump current ICPWith grid leakage current ILeakageThe sum of, it may be assumed that ISUB=ICP+ILeakage
(4) calculating device applies the substrate current I measured after above-mentioned stress and under original stateSUBAnd ISUBDifference, Obtain the difference △ I of charge pump currentCPWith basic voltage VBaseChange curve, find out △ ICPPeak value;
(5) the interface state density variable quantity △ N that above-mentioned stress generates is calculatedit
Wherein, △ ICP=qAf △ Nit;So HCI stress generate interface state density variable quantity then are as follows: △ Nit=△ ICP/ qAf。
Also, it carries out being that tentering uses same frequency f when scanning using voltage impulse generator in step (1) and (3).
Embodiment 1:
In the present embodiment, cmos device parameter used is that L (channel length) is 45nm, W (channel width)=10 μm, TOX (oxidated layer thickness)=2.6nm, NA(channel doping)=1E20/cm3.By shown in Fig. 1 flow chart, the calculating nanometer of the present embodiment Stress causes the specific charge pump method of interface state density variable quantity as follows in cmos device:
1, in a cmos device, substrate current I is measuredSUB(ICP+ILeakage) with basic voltage VBaseVariation it is bent Line.Fig. 2 gives the basic experiment device of the charge pump measuring technology of this implementation, for a cmos device, source electrode, drain electrode and Substrate ground, while substrate connects an ammeter, for measure grid to substrate electric current ISUB, grid connects a voltage pulse Generator.Grid making alive pulse carry out tentering scanning, keep the amplitude (1V) of pulse and frequency (1MHz) constant, rising and under The drop time is 10ns, and scanning process is as shown in figure 3, pulse reference voltage reference voltage (VBase) from -1V increase to 0V, every variation 10mV measures a substrate current ISUB
In thick gate device, it is considered that ISUB=ICP.With the diminution of device size and oxidated layer thickness, electric leakage of the grid It flows increasing.Fig. 4 gives the influence of grid leakage current in charge pump experiment, for the thick gate device in Fig. 4 (a), grid Leakage current is far below ICP, therefore can be ignored.However in Fig. 4 (b), the relatively thin device of oxide layer, grid leakage current It is larger, or even covered ICP, cannot ignore.Fig. 5 gives what a 2.6nm gate cmos device measurement obtained ISUBWith reference voltage VBaseVariation relation, ISUBIt is different from the result measured in thick gate device, there is not peak value, explanation ISUBIt is influenced by grid leakage current, cannot directly be considered as ICP
2, apply hot carrier in jection (HCI) stress on cmos device, generate interface state defects.Apply most on device Serious HCI degenerative conditions VD=1.1V, VG=1.1V, VS=0V, stress time 1000s, as shown in Figure 6.In the small of 45nm After applying HCI stress in scale device, Electron Electron scattering, Si/SiO occur in the region close to grid2Interface goes out current bound Face state, changes threshold voltage, the mobility of device, and the parameters such as mutual conductance cause the degeneration of device so that drain current reduces.
3, in the cmos device after HCI degeneration, substrate current I is measuredSUBˊ(ICPˊ+ILeakage) with basic voltage VBase Change curve.Device after degenerating to HCI applies charge pump shown in Fig. 2 and tests, device source electrode, drain electrode and Substrate ground, Substrate connects an ammeter simultaneously, for measuring ISUBˊ, grid connect a voltage impulse generator.Grid making alive pulse carries out Tentering scanning, keeps the amplitude (1V) of pulse and frequency (1MHz) constant, and rising and falling time 10ns, scanning process is as schemed Shown in 3, VBase0V is increased to from -1V, every variation 10mV measures a substrate current ISUBˊ.Fig. 7 gives after HCI degenerates and measures Obtain ISUBˊ is with reference voltage VBaseVariation relation, ISUBˊ is with VBaseThe increase of absolute value and increase, there is not peak value, say Bright ISUBˊ is influenced by grid leakage current, cannot directly be considered as charge pump current.
4, the variation of HCI stress front and back charge pump current is calculated.According to formula ISUB=ICP+ILeakage, calculating device application Substrate current I is measured after HCI stress and under original stateSUBˊ and ISUBDifference, obtain difference (the Δ I of charge pump currentCP) and base Bottom voltage VBaseChange curve, as shown in figure 8, Δ ICPWith VBaseVariation there is peak value, work as VBaseWhen for -0.7V, Δ ICPIt is up to 1.73 μ A.
5, the interface state density that HCI stress generates is calculated.Take q=1.6E-19C, A=L*W=0.45 μm2, f=1MHz, ΔICP=1.73nA, according to formula △ Nit=△ ICPThe interface state density changes delta N of HCI stress generation is calculated in/qAfit For 2.4E12cm-2

Claims (6)

1. a kind of charge pump method for calculating stress in Nanometer CMOS Devices and causing interface state density variable quantity, it is characterised in that: according to It is secondary the following steps are included:
(1) in a cmos device, its source electrode, drain electrode and substrate are grounded simultaneously, grid connects the electricity of amplitude and frequency-invariant Pulse is pressed to carry out tentering scanning, measures substrate current ISUBWith basic voltage VBaseChange curve;
(2) corresponding degenerative conditions are added to cmos device, applied in nanometer small size device corresponding under most serious degenerative conditions After stress, Si/SiO2Interface generates interfacial state, and most serious degenerative conditions refer to V hereinDS=VGS
(3) device in step (2) after degenerating is applied into charge pump experiment again, source electrode, drain electrode and the substrate of device are simultaneously Ground connection, grid add the voltage pulse of amplitude and frequency-invariant to carry out tentering scanning, measure substrate current ISUBWith basic voltage VBase Change curve;
(4) calculating device applies after above-mentioned stress and the grid that measures under original state is to substrate current ISUBAnd ISUBIt Difference obtains the difference △ I of charge pump currentCPWith basic voltage VBaseChange curve, find out △ ICPPeak value;
(5) the interface state density variable quantity △ N that above-mentioned stress generates is calculatedit
2. the charge pump method according to claim 1 for calculating stress in Nanometer CMOS Devices and causing interface state density variable quantity, It is characterized in that: ammeter being set to measure substrate current I in the substrate of cmos device in the step (1)SUB, substrate current ISUB For charge pump current ICPWith grid leakage current ILeakageThe sum of, it may be assumed that ISUB=ICP+ILeakage
Wherein, ICP=qAfNit, q is the quantity of electric charge, and A is the pulse that device area refers to that grid length L is tested multiplied by grid width W, f for CP Frequency, q, A and f are fixed value during the experiment;NitFor interface state density.
3. the charge pump method according to claim 1 for calculating stress in Nanometer CMOS Devices and causing interface state density variable quantity, It is characterized in that: ammeter being set to measure substrate current I in the substrate of cmos device in the step (3)SUB, electric current ISUBFor electricity Lotus pumps electric current ICPWith grid leakage current ILeakageThe sum of, it may be assumed that ISUB=ICP+ILeakage
Wherein, ICP=qAfNit, q is the quantity of electric charge, and A is the pulse that device area refers to that grid length L is tested multiplied by grid width W, f for CP Frequency, NitFor the interface state density after variation.
4. the charge pump side according to claim 1 for calculating stress in Nanometer CMOS Devices and causing interface state density variable quantity Method, it is characterised in that: in the step (4), △ ICP=qAf △ Nit
The interface state density variable quantity that HCI stress generates is then are as follows: △ Nit=△ ICP/qAf;
Wherein, △ ICP=| ICP-ICP|。
5. the charge pump side according to claim 1 for calculating stress in Nanometer CMOS Devices and causing interface state density variable quantity Method, it is characterised in that: in the step (1) and (3) using voltage impulse generator carry out be used when tentering scans it is same Frequency f.
6. the charge pump side according to claim 1 for calculating stress in Nanometer CMOS Devices and causing interface state density variable quantity Method, it is characterised in that: degenerative conditions used in the step (2) are any one in HCI, NBTI and TDDB.
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