CN108987497A - A kind of preparation method of the novel light trapping structure of monocrystaline silicon solar cell - Google Patents

A kind of preparation method of the novel light trapping structure of monocrystaline silicon solar cell Download PDF

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Publication number
CN108987497A
CN108987497A CN201810809963.4A CN201810809963A CN108987497A CN 108987497 A CN108987497 A CN 108987497A CN 201810809963 A CN201810809963 A CN 201810809963A CN 108987497 A CN108987497 A CN 108987497A
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silicon
spin coating
silicon dioxide
etching
solar cell
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马晓波
陈焕铭
杨利利
曹志杰
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Ningxia University
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Ningxia University
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0236Special surface textures
    • H01L31/02366Special surface textures of the substrate or of a layer on the substrate, e.g. textured ITO/glass substrate or superstrate, textured polymer layer on glass substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/547Monocrystalline silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Photovoltaic Devices (AREA)
  • Weting (AREA)

Abstract

The invention discloses a kind of monocrystaline silicon solar cell preparation methods of novel light trapping structure.After the cleaning of silicon wafer RCA method, then heat growth silicon dioxide, as photo etched mask, progress spin coating, photoetching, development, etching obtain micro-nano column aperture texture.Crystal silicon solar batteries surface micronano texture prepared by the present invention does not introduce rare precious metal ion, it is low in cost, the compound reduction battery conversion efficiency of battery surface will not be caused, and micro-nano texture structure is uniform, process repeatability controllability is good, is suitable for industrialized production.

Description

A kind of preparation method of the novel light trapping structure of monocrystaline silicon solar cell
Technical field
The present invention relates to photovoltaic solar cell fields, and being more particularly to one kind can be improved monocrystaline silicon solar cell light A kind of novel light trapping structure preparation method absorbed.
Background technique
Photovoltaic solar cell is a kind of device that can convert light energy into electric energy, therefore improves solar cell module Absorptivity and light utilization efficiency are one of the key factors for improving battery efficiency.Surface system during solar battery preparation Suede is an important process procedure.The light reflectivity of planar silicon is up to 35~45%, seriously limits the conversion of silicon based cells Efficiency.Caustic corrosion monocrystalline silicon, acid corrosion polysilicon acquisition Surface Texture are generallyd use, and prepares SiO in battery surfacex, TiOx Or SixNyEqual antireflective coatings are in the hope of increase light absorption.However, this mode reduces crystal silicon surface reflectivity by incident light spectrum The limitation of many factors such as hot mispairing, adhesive force and the stability of range and special incident angle and film layer makes anti- Penetrate that rate is minimum to be down to 8%~10% or so.
Micro-nano sunken light texture is to be less than lambda1-wavelength based on its structure size, to can inhibit luxuriant and rich with fragrance in depth direction Nie Er reflection law, and the stability of the structure is higher than double-layer reflection reducing coating.Existing research shows: when micro-nano texture layer Optical thickness can effectively reduce reflection loss when reaching 0.4 times of wavelength, it might even be possible to adjust micro-nano texture size Achieve zero reflection.
Up to now, there are many preparations that micro-nano texture may be implemented in method, such as dry etching, nano print light Quarter, reactive ion etching etc., most commonly seen is using certain density HF etching silicon wafer, Ag+Or Au2+Ion induction etching Silicon wafer forms micro-nano texture, then removes the metal layer on surface again.Although this method simple process, using rare precious metal at This is higher, and residual metal ions easily cause that battery ions are compound and PID phenomenon, so that battery efficiency and use be effectively reduced Service life.
Summary of the invention
In view of this, technical problem to be solved by the invention is to provide a kind of preparation method of the novel sunken light texture of silicon, This method has simple controllable, low in cost, easy to industrialized production feature.This method comprises the following steps:
(1) heat growth silicon dioxide generates silicon dioxide layer;
(2) spin coating operation is carried out to silicon dioxide layer, obtains spin coating silica;
(3) to spin coating silica front baking;
(4) it exposes, develop;
(5) sizing is dried afterwards;
(6) etching silicon dioxide;
(7) photoresist, cleaning silicon chip are removed;
(8) silicon micro-nano aperture texture is etched.
Further, in the step (1) using after RCA technique cleaning silicon chip, 750 DEG C~1000 DEG C thermally grown 50~ The silicon dioxide layer of 200nm thickness;Typical RCA cleaning is the following steps are included: SPM removes organic matter, it is mainly with sulfuric acid Strong oxidizing property destroys the C-H bond in organic matter, usually impregnates sample to be tested in 130 ° or so the ratios with 4:1.Organic matter It is often removed in oxidation/buffering environment, typical solution is the volume ratio of ammonium hydroxide, hydrogen peroxide and water by 1:1:5 Mixed APM solution, 70~80 ° at a temperature of, their chemical reaction ability is strong, can not only remove and be stained on template and substrate The organic compound of dye, moreover it is possible to dissolve the metallic element of IB and Group IIB in some periodic table of elements, and reduce the coarse of surface Degree.And the HPM solution that hydrochloric acid, hydrogen peroxide and water mix in certain proportion can incite somebody to action in 75~80 ° of environment Quartz or the heavy basic ion on silicon wafer and cation removal.
Further, the revolving speed that spin coating initially controls silicon dioxide layer in the step (2) is 800-1500r/min (practical On should be the revolving speed for controlling slide holder, to reach the control speed to silicon wafer), spin coating time is 5~25s, then controls two The revolving speed of silicon oxide layer is 3000~5000r/min, and spin coating time is 200~900s;
Further, in the step (3) after spin coating in shading environment control temperature range be maintained at 60 DEG C~160 DEG C into 10~60min of row front baking;
Further, it is exposed processing under ultraviolet light after being directed at silicon wafer with mask plate in the step (4), exposes Control is in 40s~240s between light time, and develop 30s~200s;
Further, in the step (5) by silicon temperature control at 40 DEG C~200 DEG C, after progress dry sizing 10~ 60min;
Further, the step (6) prepares the silicon dioxide etching liquid that the mass ratio of HF and NH4F is 1:10~3:5, rotten The erosion time is 0.5min~8min;
Further, the step (7) cleans up photoresist in acetone soln and deionization;
Further, the step (8) prepares 10%~55% THMA (tetramethylammonium hydroxide) solution, and water bath with thermostatic control adds Heat is to 60 DEG C~120 DEG C, 10~500min of etching silicon wafer;
Further, the preparation method of the novel light trapping structure of a kind of crystal silicon battery, in defined etching solution concentration And it is 0.2~5.0 μm that etching period, which obtains micro-nano aperture texture depth, diameter is 5 μm~500 μm.
Method of the invention has following advantageous effects:
1. the pattern by novel sunken light texture prepared after the process such as spin coating, front baking, rear baking sizing, etching is close It is seemingly cylindricality aperture, shape is uniform;
2. the technique does not introduce metal ion, influence of the metal ion compound action to battery conversion efficiency is avoided;
3. this kind of preparation process is simple, process controllability is good, and stability is high, simplifies production technology for industrial production, Production cost is reduced without using rare precious metal, is suitble to large-scale production;
4. novel light trapping structure prepared by is by adjusting pore size and depth, it can be achieved that the reflectivity average out to light 4%~5% is lower than anisotropy making herbs into wool, greatly improves to light absorption income.
Detailed description of the invention:
Fig. 1 is the process flow chart of novel light trapping structure preparation method provided by the invention.
Symbol description in figure:
1, heat growth silicon dioxide generates silicon dioxide layer;2, spin coating operation is carried out to silicon dioxide layer, obtains spin coating two Silica;3, to spin coating silica front baking;4, exposure development;5, rear to dry sizing;6, etching silicon dioxide;7, photoresist is removed, Cleaning silicon chip;8, silicon micro-nano aperture texture is etched.
Specific embodiment:
Below by way of some specific embodiments, the present invention is further illustrated, it is therefore an objective to which help understands of the invention Content and not limit the scope of the invention.
1. heat growth silicon dioxide.After RCA technique cleaning silicon chip, in 750 DEG C~1000 DEG C thermally grown 50~200nm Thick SiO2Layer, does photo etched mask;
2. spin coating.Spin coating initial speed selects 800r/min~1500r/min, and the time is 5s~25s, and high revolving speed is 3000r/min~5000r/min, time are 200s~900s, guarantee that photoresist is uniform, are completely covering silicon chip surface;
3. front baking.In 60 DEG C~160 DEG C progress front baking 10min~60min after spin coating;
4. exposure, development.Processing is exposed after silicon wafer is aligned with mask plate under ultraviolet light, the time for exposure sets It is set to 40s~240s, develop 30s~200s;
5. sizing is dried after.By silicon wafer at 40 DEG C~200 DEG C, drying 10min~60min is carried out to be formed;
6. etching SiO2.Prepare certain density SiO2Etchant solution, HF and NH4The mass ratio of F is 1:10~3:5's SiO2Corrosive liquid;
7. removing photoresist, cleaning silicon chip.Photoresist is cleaned up in acetone soln and deionized water;
8. etching silicon micro-nano texture.Prepare 10%~55% THMA (tetramethylammonium hydroxide) solution, water bath with thermostatic control It is heated to 60 DEG C~120 DEG C, etching silicon wafer 10min~500min, 0.2 μm~5.0 μm of micro-nano aperture texture depth, 5 μ of diameter M~500 μm;
Embodiment
Technical solution in the embodiment of the present invention is subjected to clear, complete description below, it is clear that described implementation Example is only a part of the embodiment of the present invention, rather than whole embodiments.Based on the embodiments of the present invention, the technology of this field Personnel's every other embodiment obtained under the premise of not making inventive improvements belongs to the model that the present invention protects It encloses.
Embodiment 1
Silicon wafer is cleaned using RCA technique, is dried.In the SiO of 750 DEG C of thermally grown 80nm thickness2Layer, does photoetching and covers Film;Spin coating initial speed selects 800r/min, time 5s, and high revolving speed is 3000r/min, time 400s;It again will be after spin coating Silicon wafer after 80 DEG C of front baking 30min, be exposed, development treatment, the time for exposure is set as 90s, developing time 50s;It connects By the silicon wafer after development 120 DEG C carry out after dry sizing 10min to be formed;Prepare HF:NH4The mass ratio of F is the molten of 3:10 Liquid removes SiO2, corrode 1.5min, then photoresist is removed in acetone soln.By concentration be 10% THMA solution in water bath with thermostatic control Under conditions of 80 DEG C, etching silicon wafer 60min obtains micro-nano texture.
Embodiment 2
Silicon wafer is cleaned using RCA technique, is dried.In the SiO of 800 DEG C of thermally grown 120nm thickness2Layer, does photoetching and covers Film;Spin coating initial speed selects 900r/min, time 8s, and high revolving speed is 3500r/min, time 300s;It again will be after spin coating Silicon wafer after 90 DEG C of front baking 25min, be exposed, development treatment, the time for exposure is set as 95s, developing time 70s;It connects By the silicon wafer after development 125 DEG C carry out after dry 15min to be formed;Prepare HF:NH4The mass ratio of F is that the solution of 2:5 is gone SiO2, corrode 2.5min, then photoresist is removed in acetone soln.By concentration be 15% THMA solution at 85 DEG C of water bath with thermostatic control Under conditions of, etching silicon wafer 80min obtains micro-nano aperture texture.
Embodiment 3
Silicon wafer is cleaned using RCA technique, is dried.In the SiO of 850 DEG C of thermally grown 160nm thickness2Layer, does photoetching and covers Film;Spin coating initial speed selects 1000r/min, time 12s, and high revolving speed is 4500r/min, time 240s;Again by spin coating Silicon wafer afterwards is exposed, development treatment after 100 DEG C of front baking 15min, and the time for exposure is set as 100s, and developing time is 60s;Then 20min is dried after the silicon wafer after development being carried out at 110 DEG C to be formed;Prepare HF:NH4The mass ratio of F is the molten of 1:2 Liquid removes SiO2, corrode 4min, then photoresist is removed in acetone soln.By concentration be 20% THMA solution in water bath with thermostatic control 75 Under conditions of DEG C, etching silicon wafer 120min obtains micro-nano texture.
Embodiment 4
Silicon wafer is cleaned using RCA technique, is dried.In the SiO of 900 DEG C of thermally grown 200nm thickness2Layer, does photoetching and covers Film;Spin coating initial speed selects 1200r/min, time 15s, and high revolving speed is 5000r/min, time 200s;Again by spin coating Silicon wafer afterwards is exposed, development treatment after 110 DEG C of front baking 10min, and the time for exposure is set as 110s, and developing time is 40s;Then 18min is dried after the silicon wafer after development being carried out at 105 DEG C to be formed;Prepare HF:NH4The mass ratio of F is the molten of 3:5 Liquid removes SiO2, corrode 5min, then photoresist is removed in acetone soln.By concentration be 35% THMA solution in water bath with thermostatic control 70 Under conditions of DEG C, etching silicon wafer 180min obtains micro-nano texture.
Above-described specific embodiment has carried out further the purpose of the present invention, technical scheme and beneficial effects It is described in detail, it should be understood that being not intended to limit the present invention the foregoing is merely a specific embodiment of the invention Protection scope, all within the spirits and principles of the present invention, any modification, equivalent substitution, improvement and etc. done should all include Within protection scope of the present invention.

Claims (3)

1. a kind of monocrystaline silicon solar cell preparation method of novel light trapping structure, which comprises the steps of:
(1) heat growth silicon dioxide generates silicon dioxide layer;
(2) spin coating operation is carried out to silicon dioxide layer, obtains spin coating silica;
(3) to spin coating silica front baking;
(4) it exposes, develop;
(5) sizing is dried afterwards;
(6) etching silicon dioxide;
(7) photoresist, cleaning silicon chip are removed;
(8) silicon micro-nano aperture texture is etched.
2. a kind of preparation method of the novel light trapping structure of monocrystaline silicon solar cell as described in claim 1, feature exist In including the following steps:
(1) after using RCA technique cleaning silicon chip, in the silicon dioxide layer of 750 DEG C~1000 DEG C thermally grown 50~200nm thickness;
(2) it (actually should be to control turning for slide holder that it is 800-1500r/min that spin coating, which initially controls the revolving speed of silicon dioxide layer, Speed, to reach the control speed to silicon wafer), spin coating time be 5~25s, then control silicon dioxide layer revolving speed be 3000~ 5000r/min, spin coating time are 200~900s;
(3) temperature range is controlled after spin coating in shading environment and is maintained at 60 DEG C~160 DEG C 10~60min of progress front baking;
(4) be exposed processing after being directed at silicon wafer with mask plate under ultraviolet light, time for exposure control 40s~ 240s, develop 30s~200s;
(5) silicon temperature is controlled at 40 DEG C~200 DEG C, 10~60min of sizing is dried after progress;
(6) HF and NH is prepared4The mass ratio of F is the silicon dioxide etching liquid of 1:10~3:5, and etching time is 0.5min~8min;
(7) photoresist is cleaned up in acetone soln and deionization;
(8) 10%~55% THMA (tetramethylammonium hydroxide) solution is prepared, water bath with thermostatic control is heated to 60 DEG C~120 DEG C, carves Lose 10~500min of silicon wafer.
3. a kind of preparation method of the novel light trapping structure of monocrystaline silicon solar cell as described in claim 1, feature exist In obtaining micro-nano aperture texture depth in defined etching solution concentration and etching period is 0.2~5.0 μm, diameter 5 μm~500 μm.
CN201810809963.4A 2018-07-23 2018-07-23 A kind of preparation method of the novel light trapping structure of monocrystaline silicon solar cell Pending CN108987497A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114988349A (en) * 2022-01-12 2022-09-02 长春理工大学 Anti-reflection micro-nano structure surface with protective structure and preparation method thereof

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US20110180132A1 (en) * 2010-01-28 2011-07-28 Curtis Dove Texturing and damage etch of silicon single crystal (100) substrates
CN102208486A (en) * 2011-04-18 2011-10-05 晶澳(扬州)太阳能科技有限公司 Preparation method of MWT (Metal Wrap Through) solar cell
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* Cited by examiner, † Cited by third party
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