CN108964810A - A kind of DCI0 judgment method, device and computer readable storage medium - Google Patents
A kind of DCI0 judgment method, device and computer readable storage medium Download PDFInfo
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- CN108964810A CN108964810A CN201710768450.9A CN201710768450A CN108964810A CN 108964810 A CN108964810 A CN 108964810A CN 201710768450 A CN201710768450 A CN 201710768450A CN 108964810 A CN108964810 A CN 108964810A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B17/00—Monitoring; Testing
- H04B17/30—Monitoring; Testing of propagation channels
- H04B17/309—Measuring or estimating channel quality parameters
- H04B17/336—Signal-to-interference ratio [SIR] or carrier-to-interference ratio [CIR]
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0061—Error detection codes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W24/00—Supervisory, monitoring or testing arrangements
- H04W24/02—Arrangements for optimising operational condition
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Abstract
The present invention relates to a kind of DCI0 judgment methods.The DCI0 judgment method includes: to judge whether current DCI0 loses according to current PUSCH SINR result and CRC result.The present invention also provides a kind of DCI0 judgment means and computer readable storage medium, DCI0 judgment method, device and computer readable storage medium provided by the invention can significantly improve accuracy and the communication system performance of DCI0 judgement.
Description
[technical field]
The present invention relates to fields of communication technology, more specifically to 0 (Downlink of descending control information format
Control Information Format 0, DCI0) judgment method, device and computer readable storage medium.
[background technique]
Down control channel (Physical Downlink Control Channel, PDCCH), is Long Term Evolution
One of (Long Term Evolution, LTE) most important channel.PDCCH is used to send Downlink Control Information for downlink
The information of format 0 (Downlink Control Information Format 0, DCI0), transmission includes common control channel
Breath and user-specific information.The carrying of the resource allocation of uplink and downlink resource distribution carrying be all notified by PDCCH to
User equipment (UserEquipment, UE).PDCCH is the signaling channel of LTE, is mainly occupied in the time domain several before time slot
A symbol.
Due to down channel time-varying, UE may not receive DCI0, this when UE would not to send physical uplink shared
Channel (Physical Uplink Shared Channel, PUSCH) data.In base station receiving end, this when UE reception
Power will be very low.Base station needs to judge UE either with or without transmission DCI0.Common judgment mode is to be added to make an uproar with interference according to signal
Acoustic ratio (signal-to-interference-plus-noiseratio, SINR) is judged, but this judgment method
Accuracy it is not high, influence the performance of communication system.
[summary of the invention]
In view of this, the present invention provides a kind of DCI0 judgment method, the DCI0 judgment method includes:
According to the Signal to Interference plus Noise Ratio SINR result of present physical Uplink Shared Channel PUSCH and cyclic redundancy school
It tests CRC result and judges whether current downlink control information format 0DCI0 loses.
Optionally, the SINR result and CRC result of the current PUSCH of the basis judges whether current DCI0 loses and includes:
Judge whether the current SINR is lower than preset threshold, judge whether the current CRC solves pair, when described current
SINR is lower than preset threshold, and the current CRC solution is staggered the time, and judges that the current DCI0 loses
Optionally, the SINR result and CRC result of the current PUSCH of the basis judges whether current DCI0 loses and also wraps
It includes:
When the current SINR is higher than preset threshold, judge that the current DCI0 does not lose；And
When the current SINR is lower than the preset threshold and the current CRC solves clock synchronization, the current DCI0 is judged
Do not lose.
Optionally, the SINR result and CRC result of the current PUSCH of the basis judges that current downlink controls information format
After whether 0DCI0 loses, the method also includes:
The current DCI0 judging result whether lost is repaired according to history SINR result and history CRC result
Just.
Optionally, described that the current DCI0 judging result is repaired according to history SINR result and history CRC result
Just include:
Judge whether last time SINR is lower than the preset threshold, whether last time CRC solves pair, as the last time SINR
Lower than the preset threshold and last time CRC solves clock synchronization, the current DCI0 judging result lost is modified to described current
DCI0 does not lose.
Optionally, the DCI0 judgment method includes:
The current DCI0 judging result whether lost is reported to medium access control (Media Access
Control, MAC) layer handled.
The present invention also provides a kind of DCI0 judgment means, the DCI0 judgment means include:
Judgment module, for SINR result and cyclic redundancy check (the Cyclic Redundancy according to current PUSCH
Check, CRC) result judges whether current DCI0 loses.
Optionally, the judgment module, is also used to judge whether the current SINR is lower than preset threshold, works as described in judgement
Whether preceding CRC solves pair, and when the current SINR is lower than preset threshold, and the current CRC solution is staggered the time, and is judged described current
DCI0 loses.
Optionally, the judgment module is also used to when the current SINR is higher than preset threshold, is judged described current
DCI0 does not lose, and when the current SINR is lower than the preset threshold and the current CRC solves clock synchronization, judges described work as
Preceding DCI0 does not lose.
Optionally, the DCI0 judgment means further include:
Correction module, for being sentenced according to history SINR result and history CRC result to what whether the current DCI0 lost
Disconnected result is modified.
Optionally, the correction module, is also used to judge whether last SINR is lower than the preset threshold, last time
Whether CRC solves pair, when the last time SINR is lower than the preset threshold and last time CRC solution clock synchronization, by the current DCI0
The judging result of loss is modified to the current DCI0 and does not lose.
Optionally, the DCI0 judgment means further include:
Reporting module, the judging result for whether losing the current DCI0 are reported to MAC layer and handle.
The present invention also provides a kind of computer readable storage medium, the computer-readable recording medium storage has DCI0
Determining program, the DCI0 determining program can be executed by least one processor, so that at least one described processor executes
The step of DCI0 judgment method stated.
DCI0 judgment method, device and computer readable storage medium provided by the invention, according to current SINR result,
CRC result judges whether DCI0 loses, the judgement whether lost according to history SINR result, CRC result to the DCI0 judged
As a result it is modified, can significantly improve the accuracy of DCI0 judgement, and then improve communication system performance.
[Detailed description of the invention]
Fig. 1 is the flow chart of one DCI0 judgment method of the embodiment of the present invention；
Fig. 2 is the flow chart of two DCI0 judgment method of the embodiment of the present invention；
Fig. 3 is the flow chart of three DCI0 judgment method of the embodiment of the present invention；
Fig. 4 is the flow chart of four DCI0 judgment method of the embodiment of the present invention；
Fig. 5 is the structure chart of five DCI0 judgment means of the embodiment of the present invention；
Fig. 6 is the structure chart of six DCI0 judgment means of the embodiment of the present invention；
Fig. 7 is the structure chart of seven DCI0 judgment means of the embodiment of the present invention.
[specific embodiment]
In order to make the objectives, technical solutions, and advantages of the present invention clearer, with reference to the accompanying drawings and embodiments, right
The present invention is further elaborated.It should be appreciated that described herein, specific examples are only used to explain the present invention, not
For limiting the present invention.
Referring to Fig. 1, Fig. 1 is the flow chart of one DCI0 judgment method of the embodiment of the present invention.This method is carried out below detailed
It describes in detail bright.
In step s101, judge whether current DCI0 loses according to the SINR result of current PUSCH and CRC result.
In the present embodiment, judge that whether current DCI0 lost sentences according to the SINR result of current PUSCH and CRC result
Disconnected result includes that DCI0 loss and DCI0 do not lose two kinds of results.
Referring to Fig.2, Fig. 2 is the flow chart of two DCI0 judgment method of the embodiment of the present invention.This method is carried out below detailed
Explanation.
In step s 201, judge that current downlink control is believed according to the signal of current PUSCH and SINR result and CRC result
Whether breath format 0DCI0 loses.
Optionally, in the present embodiment, step S201 the following steps are included:
Judge whether the current SINR is lower than preset threshold, judge whether the current CRC solves pair, when described current
SINR is lower than preset threshold, and the current CRC solution is staggered the time, and judges that the current DCI0 loses.
Specifically, if preset threshold is 0dB, when current SINR is -3dB, -3dB < 0dB, and current CRC solution is staggered the time,
Judge that current DCI0 loses.
Optionally, in the present embodiment, step S201 is further comprising the steps of:
When the current SINR is higher than preset threshold, judge that the current DCI0 does not lose；And
When the current SINR is lower than the preset threshold and the current CRC solves clock synchronization, the current DCI0 is judged
Do not lose.
Specifically, when current SINR is higher than preset threshold, judge that current DCI0 does not lose, wherein default threshold
Value can be configured according to demand, such as preset threshold is set as 0dB, for example, current SINR be 3dB when, due to 3dB >
0dB judges that current DCI0 does not lose.If preset threshold is 0dB, when current SINR is -3dB, -3dB < 0dB, and it is current
CRC solves clock synchronization, judges that current DCI0 does not lose.
In step S203, current DCI0 judging result is modified according to history SINR result and history CRC result,
Specifically, if current judging result is DCI0 loss, judge whether last SINR is lower than preset threshold, last time
Whether CRC solves pair.For example, judging that last SINR is 0dB, 2dB > 0dB, and last time CRC is solved if preset threshold is 2dB
Current DCI0 loss is modified to DCI0 and not lost by clock synchronization.
In step S205, the judging result of current DCI0 is reported to MAC layer and is handled.
It is the flow chart of three DCI0 judgment method of the embodiment of the present invention refering to Fig. 3, Fig. 3.This method is carried out below detailed
Explanation.
In step S301, judge whether the current SINR is lower than preset threshold, judges whether the current CRC solves
Right, when the current SINR is lower than preset threshold, and the current CRC solution is staggered the time, and judges that the current DCI0 loses.
For example, current SINR is -3dB and CRC solution is staggered the time if preset threshold is 0dB, due to -3dB < 0dB, judge
Current DCI0 loses.
In step S303, whether current DCI0 is lost according to history SINR result and history CRC result judgement knot
Fruit is modified.
Specifically, whether can be lower than preset threshold by judging last time SINR, whether last time CRC solves to sentencing
Disconnected result is modified current DCI0 judging result.
For example, if preset threshold be 0dB, judge last SINR be -2dB, -2dB < 0dB, and last time CRC solve pair
When, the current DCI0 judging result lost is modified to current DCI0 and is not lost.
In step S305, the current DCI0 judging result that do not lose is reported to MAC layer and is handled.
It is the flow chart of four DCI0 judgment method of the embodiment of the present invention refering to Fig. 4, Fig. 4.This method is carried out below detailed
Explanation.
In step S401, judge whether the current SINR is lower than preset threshold, judges whether the current CRC solves
Right, when the current SINR is lower than preset threshold, and the current CRC solution is staggered the time, and judges that the current DCI0 loses.
For example, if preset threshold is set as 0dB, current SINR is -3dB and CRC solution is staggered the time, due to -3dB < 0dB
And CRC solution is wrong, judges that current DCI0 loses.
In step S403, judge whether last SINR is lower than the preset threshold, whether last time CRC solves pair, when
The last time SINR is lower than the preset threshold and last time CRC solves clock synchronization, the judging result that the current DCI0 is lost
The current DCI0 is modified to not lose.
For example, if preset threshold is 2dB, judge that last SINR is 0dB, 2dB > 0dB, and last time CRC is solved
Current DCI0 loss is modified to DCI0 and not lost by clock synchronization.
In step S405, the judging result of current DCI0 is reported to MAC layer and is handled.
DCI0 judgment method provided by the invention judges whether DCI0 loses according to current SINR result, CRC result, root
The DCI0 judged the judging result whether lost is modified according to history SINR result, CRC result, can significantly be mentioned
The accuracy of high DCI0 judgement, and then improve communication system performance.
It is the functional block diagram of five DCI0 judgment means of the embodiment of the present invention refering to Fig. 5, Fig. 5.DCI0 judgement shown in fig. 5
Device 10 includes judgment module 101.Each functional module is described in detail below.
Judgment module 101 judges whether current DCI0 loses according to the SINR result and CRC result of current PUSCH channel.
In the present embodiment, judge that whether current DCI0 lost sentences according to the SINR result of current PUSCH and CRC result
Disconnected result includes that DCI0 loss and DCI0 do not lose two kinds of results.
Specifically, judgment module 101 judges current DCI0 according to the SINR result and CRC result of current PUSCH channel
Whether loss specifically includes following aspect: judgment module 101 judges whether SINR is lower than preset threshold, judges whether CRC solves pair,
When current SINR is lower than preset threshold, and current CRC solution is staggered the time, and judges that current DCI0 loses, when current SINR be higher than it is default
When threshold value, judge that current DCI0 does not lose, when current SINR is lower than preset threshold and current CRC solves clock synchronization, judges to work as
Preceding DCI0 does not lose.
Referring to Fig. 6, Fig. 6 is the functional block diagram of six DCI0 judgment means of the embodiment of the present invention.DCI0 shown in fig. 6 sentences
Disconnected device 10 includes judgment module 101, correction module 103, reporting module 105.Judgment module 101 is connected with correction module 103,
Correction module 103 is connected with reporting module 105.Each functional module is described in detail below.
Judgment module 101 judges whether current DCI0 loses according to the SINR result and CRC result of current PUSCH channel.
In the present embodiment, judge that whether current DCI0 lost sentences according to the SINR result of current PUSCH and CRC result
Disconnected result includes that DCI0 loss and DCI0 do not lose two kinds of results.
Specifically, judgment module 101 judges current DCI0 according to the SINR result and CRC result of current PUSCH channel
Whether loss specifically includes following aspect: judgment module 101 judges whether SINR is lower than preset threshold, judges whether CRC solves pair,
When current SINR is lower than preset threshold, and current CRC solution is staggered the time, and judges that current DCI0 loses, when current SINR be higher than it is default
When threshold value, judge that current DCI0 does not lose, when current SINR is lower than preset threshold and current CRC solves clock synchronization, judges to work as
Preceding DCI0 does not lose.
Correction module 103, for what is whether lost according to history SINR result and history CRC result to the current DCI0
Judging result is modified.
Specifically, whether judgment module 101 judges current DCI0 according to the SINR result and CRC result of current PUSCH
It loses, current SINR is lower than preset threshold and CRC solution is staggered the time, and judges that current DCI0 loses, the judgement of correction module 103 upper one
Whether secondary SINR is lower than preset threshold, whether last time CRC solves pair, when last SINR is lower than preset threshold and last time CRC
Clock synchronization is solved, the current DCI0 judging result lost is modified to current DCI0 and is not lost.Reporting module 105 does not have current DCI0
There is the judging result of loss to be reported to MAC layer to be handled.
It further remarks additionally, judgment module 101 is worked as according to the judgement of the SINR result and CRC result of current PUSCH
Whether preceding DCI0 loses, and when current SINR is lower than preset threshold and CRC solution is staggered the time, judges that current DCI0 loses, corrects mould
Block 103 judges whether last SINR is lower than preset threshold, whether last time CRC solves pair, when last SINR is lower than default threshold
Value and last time CRC solution is staggered the time does not correct the judging result that current DCI0 loses.Reporting module 105 loses current DCI0
Judging result is reported to MAC layer and is handled.
DCI0 judgment means 10 can be realized each process in the embodiment of the method for Fig. 1 to Fig. 4, to avoid repeating, this
In repeat no more.
It is the structure chart that the present invention implements the DCI0 judgment means provided referring to Fig. 7, Fig. 7, as shown in fig. 7, DCI0 judges
Device 700 includes: at least one processor 701, memory 702, at least one user interface 703 and network interface 704.DCI0
Various components in judgment means 700 are coupled by bus system 705.It is understood that bus system 705 is for realizing this
Connection communication between a little components.Bus system 705 except include data/address bus in addition to, further include power bus, control bus and
Status signal bus in addition.But for the sake of clear explanation, various buses are all designated as bus system 705 in Fig. 7, wherein use
Family interface 703 may include display, keyboard or pointing device (for example, mouse, trace ball (trackball), touch-sensitive plate or
Person's touch screen etc..
It is appreciated that the memory 702 in the embodiment of the present invention can be volatile memory or nonvolatile memory,
It or may include both volatile and non-volatile memories.Wherein, nonvolatile memory can be read-only memory (Read-
Only Memory, ROM), programmable read only memory (Programmable ROM, PROM), the read-only storage of erasable programmable
Device (Erasable PROM, EPROM), electrically erasable programmable read-only memory (Electrically EPROM, EEPROM) or
Flash memory.Volatile memory can be random access memory (Random Access Memory, RAM), be used as external high
Speed caching.By exemplary but be not restricted explanation, the RAM of many forms is available, such as static random access memory
(Static RAM, SRAM), dynamic random access memory (Dynamic RAM, DRAM), Synchronous Dynamic Random Access Memory
(Synchronous DRAM, SDRAM), double data speed synchronous dynamic RAM (Double Data Rate
SDRAM, DDRSDRAM), enhanced Synchronous Dynamic Random Access Memory (Enhanced SDRAM, ESDRAM), synchronized links
Dynamic random access memory (Synchlink DRAM, SLDRAM) and direct rambus random access memory (Direct
Rambus RAM, DRRAM).The memory 702 of system and method described herein is intended to include but is not limited to these and arbitrarily its
It is suitble to the memory of type.
In some embodiments, memory 702 stores following element, executable modules or data structures, or
Their subset of person or their superset: operating system 7021 and application program 7022.
Wherein, operating system 7021 include various system programs, such as ccf layer, core library layer, driving layer etc., are used for
Realize various basic businesses and the hardware based task of processing.Application program 7022 includes various application programs, such as media
Player (Media Player), browser (Browser) etc., for realizing various applied business.Realize the embodiment of the present invention
The program of method may be embodied in application program 7022.
In embodiments of the present invention, by the program or instruction of calling memory 702 to store, specifically, can be application
The program or instruction stored in program 7022, processor 701 are used for:
According to the Signal to Interference plus Noise Ratio SINR result of present physical Uplink Shared Channel PUSCH and cyclic redundancy school
It tests CRC result and judges whether current downlink control information format 0DCI0 loses.
The method that the embodiments of the present invention disclose can be applied in processor 701, or be realized by processor 701.
Processor 701 may be a kind of IC chip, the processing capacity with signal.During realization, the above method it is each
Step can be completed by the integrated logic circuit of the hardware in processor 701 or the instruction of software form.Above-mentioned processing
Device 701 can be general processor, digital signal processor (Digital Signal Processor, DSP), dedicated integrated electricity
Road (Application Specific Integrated Circuit, ASIC), ready-made programmable gate array (Field
Programmable Gate Array, FPGA) either other programmable logic device, discrete gate or transistor logic,
Discrete hardware components.It may be implemented or execute disclosed each method, step and the logic diagram in the embodiment of the present invention.It is general
Processor can be microprocessor or the processor is also possible to any conventional processor etc..In conjunction with institute of the embodiment of the present invention
The step of disclosed method, can be embodied directly in hardware decoding processor and execute completion, or with the hardware in decoding processor
And software module combination executes completion.Software module can be located at random access memory, and flash memory, read-only memory may be programmed read-only
In the storage medium of this fields such as memory or electrically erasable programmable memory, register maturation.The storage medium is located at
The step of memory 702, processor 701 reads the information in memory 702, completes the above method in conjunction with its hardware.
It is understood that embodiments described herein can with hardware, software, firmware, middleware, microcode or its
Combination is to realize.For hardware realization, processing unit be may be implemented in one or more specific integrated circuit (Application
Specific Integrated Circuits, ASIC), digital signal processor (Digital Signal Processing,
DSP), digital signal processing appts (DSP Device, DSPD), programmable logic device (Programmable Logic
Device, PLD), field programmable gate array (Field-Programmable Gate Array, FPGA), general processor,
In controller, microcontroller, microprocessor, other electronic units for executing herein described function or combinations thereof.
For software implementations, it can be realized herein by executing the module (such as process, function etc.) of function described herein
The technology.Software code is storable in memory and is executed by processor.Memory can in the processor or
It is realized outside processor.
Optionally, the processor 701 executes the SINR result of the current PUSCH of the basis and CRC result judges currently
The step of whether descending control information format 0DCI0 loses include:
Judge whether the current SINR is lower than preset threshold, judge whether the current CRC solves pair, when described current
SINR is lower than preset threshold, and the current CRC solution is staggered the time, and judges that the current DCI0 loses.
Optionally, the processor 701 executes the SINR result and cyclic redundancy check (CRC) of the current PUSCH of the basis
As a result the step of whether current downlink control information format 0DCI0 loses judged further include:
When the current SINR is higher than preset threshold, judge that the current DCI0 does not lose；And
When the current SINR is lower than the preset threshold and the current CRC solves clock synchronization, the current DCI0 is judged
Do not lose.
Optionally, the processor 701 is also used to:
The current DCI0 judging result whether lost is repaired according to history SINR result and history CRC result
Just.
Optionally, the processor 701 execute it is described according to history SINR result and history CRC result to described current
The step of DCI0 judging result is modified include:
Judge whether last time SINR is lower than the preset threshold, whether last time CRC solves pair, as the last time SINR
Lower than the preset threshold and last time CRC solves clock synchronization, the current DCI0 judging result lost is modified to described current
DCI0 does not lose.
Optionally, the processor 701 is also used to:
The current DCI0 judging result whether lost is reported to medium access control MAC layer to handle.
DCI0 judgment means 700 can be realized each process that DCI0 judgment means are realized in previous embodiment, to avoid
It repeats, which is not described herein again.
DCI0 judgment means provided by the invention judge whether DCI0 loses according to current SINR result, CRC result, root
The DCI0 judged the judging result whether lost is modified according to history SINR result, CRC result, can significantly be mentioned
The accuracy of high DCI0 judgement, and then improve communication system performance.
Those of ordinary skill in the art may be aware that list described in conjunction with the examples disclosed in the embodiments of the present disclosure
Member and algorithm steps can be realized with the combination of electronic hardware or computer software and electronic hardware.These functions are actually
It is implemented in hardware or software, the specific application and design constraint depending on technical solution.Professional technician
Each specific application can be used different methods to achieve the described function, but this realization is it is not considered that exceed
The scope of the present invention.
It is apparent to those skilled in the art that for convenience and simplicity of description, the system of foregoing description,
The specific work process of device and unit, can refer to corresponding processes in the foregoing method embodiment, and details are not described herein.
In embodiment provided herein, it should be understood that disclosed device and method can pass through others
Mode is realized.For example, the apparatus embodiments described above are merely exemplary, for example, the division of the unit, only
A kind of logical function partition, there may be another division manner in actual implementation, for example, multiple units or components can combine or
Person is desirably integrated into another system, or some features can be ignored or not executed.Another point, shown or discussed is mutual
Between coupling, direct-coupling or communication connection can be through some interfaces, the INDIRECT COUPLING or communication link of device or unit
It connects, can be electrical property, mechanical or other forms.
The unit as illustrated by the separation member may or may not be physically separated, aobvious as unit
The component shown may or may not be physical unit, it can and it is in one place, or may be distributed over multiple
In network unit.Some or all of unit therein can be selected to realize the embodiment of the present invention according to the actual needs
Purpose.
It, can also be in addition, the functional units in various embodiments of the present invention may be integrated into one processing unit
It is that each unit physically exists alone, can also be integrated in one unit with two or more units.
It, can be with if the function is realized in the form of SFU software functional unit and when sold or used as an independent product
It is stored in a computer readable storage medium.Based on this understanding, technical solution of the present invention is substantially in other words
The part of the part that contributes to existing technology or the technical solution can be embodied in the form of software products, the meter
Calculation machine software product is stored in a storage medium, including some instructions are used so that a computer equipment (can be a
People's computer, server or network equipment etc.) it performs all or part of the steps of the method described in the various embodiments of the present invention.
And storage medium above-mentioned includes: that USB flash disk, mobile hard disk, ROM, RAM, magnetic or disk etc. are various can store program code
Medium.
The above description is merely a specific embodiment, but scope of protection of the present invention is not limited thereto, any
Those familiar with the art in the technical scope disclosed by the present invention, can easily think of the change or the replacement, and should all contain
Lid is within protection scope of the present invention.Therefore, protection scope of the present invention should be subject to the protection scope in claims.
Claims (13)
1. a kind of 0 judgment method of descending control information format characterized by comprising
According to the Signal to Interference plus Noise Ratio SINR result and cyclic redundancy check of present physical Uplink Shared Channel PUSCH
CRC result judges whether current downlink control information format 0DCI0 loses.
2. DCI0 judgment method as described in claim 1, which is characterized in that the SINR result of the current PUSCH of basis and
CRC result judges whether current DCI0 loses
Judge whether the current SINR is lower than preset threshold, judges whether the current CRC solves pair, when the current SINR is low
In preset threshold, and the current CRC solution is staggered the time, and judges that the current DCI0 loses.
3. DCI0 judgment method as claimed in claim 2, which is characterized in that the SINR result of the current PUSCH of basis and
CRC result judges whether current DCI0 loses further include:
When the current SINR is higher than preset threshold, judge that the current DCI0 does not lose；And
When the current SINR is lower than the preset threshold and the current CRC solves clock synchronization, judge that the current DCI0 does not have
It loses.
4. DCI0 judgment method as claimed in claim 2, which is characterized in that the SINR result of the current PUSCH of basis and
After CRC result judges whether current DCI0 loses, the method also includes:
The current DCI0 judging result whether lost is modified according to history SINR result and history CRC result.
5. DCI0 judgment method as claimed in claim 4, which is characterized in that described according to history SINR result and history CRC
As a result the current DCI0 judging result is modified and includes:
Judge whether last time SINR is lower than the preset threshold, whether last time CRC solves pair, when the last time SINR is lower than
The current DCI0 judging result lost is modified to the current DCI0 by the preset threshold and last time CRC solution clock synchronization
Do not lose.
6. the DCI0 judgment method as described in claim 1-5 any one, which is characterized in that further include:
The current DCI0 judging result whether lost is reported to medium access control MAC layer to handle.
7. a kind of DCI0 judgment means characterized by comprising
Judgment module, for judging whether current DCI0 loses according to the SINR result and CRC result of current PUSCH.
8. DCI0 judgment means as claimed in claim 7, which is characterized in that the judgment module is also used to judge described work as
Whether preceding SINR is lower than preset threshold, judges whether the current CRC solves pair, when the current SINR is lower than preset threshold, and
The current CRC solution is staggered the time, and judges that the current DCI0 loses.
9. DCI0 judgment means as claimed in claim 8, which is characterized in that the judgment module is also used to when described current
SINR be higher than preset threshold when, judge that the current DCI0 does not lose, when the current SINR lower than the preset threshold,
And the current CRC solves clock synchronization, judges that the current DCI0 does not lose.
10. DCI0 judgment means as claimed in claim 8, which is characterized in that further include:
Correction module, the judgement knot for whether being lost according to history SINR result and history CRC result to the current DCI0
Fruit is modified.
11. DCI0 judgment means as claimed in claim 10, which is characterized in that the correction module is also used to judge upper one
Whether secondary SINR is lower than the preset threshold, whether last time CRC solves pair, when the last time SINR is lower than the preset threshold
And last time CRC solves clock synchronization, and the current DCI0 judging result lost is modified to the current DCI0 and is not lost.
12. the DCI0 judgment means as described in claim 7-11 any one, which is characterized in that further include:
Reporting module, the judging result for whether losing the current DCI0 are reported to MAC layer and handle.
13. a kind of computer readable storage medium, the computer-readable recording medium storage has DCI0 determining program, described
DCI0 determining program can be executed by least one processor, so that at least one described processor is executed as in claim 1-6
Described in any one the step of DCI0 judgment method.
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