CN108933521B - Control circuit and control method - Google Patents
Control circuit and control method Download PDFInfo
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- CN108933521B CN108933521B CN201710373061.6A CN201710373061A CN108933521B CN 108933521 B CN108933521 B CN 108933521B CN 201710373061 A CN201710373061 A CN 201710373061A CN 108933521 B CN108933521 B CN 108933521B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
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Abstract
The present application provides a control circuit and a control method for controlling a switching power supply, a switching element of the switching power supply converting a first voltage generated by rectifying an input alternating-current voltage into a second voltage by being turned on and off, the second voltage being a direct-current voltage, the control circuit including: a current detection circuit that detects a current flowing through the switching element and outputs a first control signal for controlling an on time of the switching element; a shielding circuit that outputs a second control signal for shielding the first control signal for a predetermined period of time when the switching element is turned on; and a differential comparator that detects a difference between the first voltage and the second voltage and outputs a third control signal corresponding to a detection result of the difference, wherein the shield circuit outputs the second control signal based on the third control signal. According to the present application, it is possible to prevent the switching element from being damaged due to an excessive peak current.
Description
Technical Field
The invention relates to the technical field of power supplies, in particular to a control circuit and a control method for controlling a switching power supply.
Background
Conventionally, in order to improve the utilization efficiency of a Power supply, a Power Factor Corrector (PFC) is often added to a switching Power supply to form a switching Power supply device, as described in patent document 1(JP 2016-63703A).
In the prior art, when a switching power supply device having a power factor correction circuit is operated, the on-frequency of a switching element in the switching power supply is not changed when a load is small or an input voltage is high. For example, when the input voltage is equal to or higher than a predetermined voltage, or when the dimming signal corresponding to the load current is equal to or lower than a threshold value, one offset current may be superimposed on the current detected by the switching current detection unit, and the on time of the switching element may be controlled based on the detection result generated based on the current on which the offset current is superimposed.
It should be noted that the above background description is only for the convenience of clear and complete description of the technical solutions of the present application and for the understanding of those skilled in the art. Such solutions are not considered to be known to the person skilled in the art merely because they have been set forth in the background section of the present application.
Disclosure of Invention
The inventors of the present application have found that, in the switching power supply device, a shielding circuit for shielding a detection result of the switching current detection section for a shielding time period may be further provided, thereby enabling further control of on and off of the switching element. The masking circuit may be, for example, a Leading Edge Blanking (LEB) circuit.
In the case where the shield circuit is present, the on time of the switching element is affected at least by both the detection result of the switching current detection section and the shield time. Since the detection result of the switching current detection unit is masked during the masking time and cannot be used for controlling the switching element, even if an offset current is superimposed on the current detected by the switching current detection unit, the detection result cannot further reduce the on-time of the switching element. That is, the minimum on-time of the switching element is limited by the masking time.
However, the inventors of the present application have further found that if the peak voltage of the input voltage is close to the output voltage, the peak current flowing through the switching element increases when the switching power supply is restored again after interruption due to the presence of the minimum on time of the switching element, and thus the instantaneous heat of the switching element increases and the switching element is easily damaged.
The present application provides a control circuit and a control method for controlling a switching power supply, wherein a masking time of a masking circuit is set based on a detection result of a difference between an input voltage and an output voltage, so that when the input voltage and the output voltage are close to each other, a minimum on time of a switching element of the switching power supply can be shortened, and the switching element is prevented from being damaged due to an excessive peak current.
According to an aspect of an embodiment of the present application, there is provided a control circuit for controlling a switching power supply whose switching element converts a first voltage generated by rectifying an input alternating-current voltage into a second voltage by turning on and off, the second voltage being a direct-current voltage, the control circuit including:
a current detection circuit that detects a current flowing through the switching element and outputs a first control signal for controlling an on time of the switching element;
a shielding circuit that outputs a second control signal for shielding the first control signal for a predetermined period of time when the switching element is turned on; and
and a differential comparator that detects a difference between the first voltage and the second voltage and outputs a third control signal corresponding to a detection result of the difference, wherein the shield circuit outputs the second control signal based on the third control signal.
In accordance with another aspect of the present application implementation, wherein the masking circuit adjusts the length of the predetermined time period in accordance with the third control signal.
According to another aspect of the present application, in a case where the detection result of the difference is smaller than a predetermined threshold, the length of the predetermined period is shortened.
According to another aspect of the present application, the differential comparator comprises:
a subtractor that subtracts a Voltage (VAC) related to the first voltage from a Voltage (VFB) related to the second voltage, and outputs a differential voltage; and
a comparator (CP3) that compares the differential voltage with a predetermined voltage value, generating the third control signal.
According to another aspect of the present application, the differential comparator comprises:
a comparator (CP4) that compares a magnitude of a Voltage (VFB) associated with the second voltage and a magnitude of a Voltage (VAC) associated with the first voltage, and generates the third control signal.
According to another aspect of the present application, the shielding circuit has a charging capacitor and a charging circuit for charging the charging capacitor, and the predetermined time period is set according to a speed of charging the charging capacitor by the charging circuit.
According to another aspect of the present application, there is provided a control method for controlling a switching power supply whose switching element converts a first voltage generated by rectifying an input alternating-current voltage into a second voltage by turning on and off, the second voltage being a direct-current voltage, the control method including:
detecting a current flowing through the switching element and generating a first control signal for controlling a turn-on time of the switching element;
detecting a difference between the first voltage and the second voltage, and outputting a third control signal corresponding to a detection result of the difference; and
when the switching element is turned on, a second control signal for shielding the first control signal for a predetermined period of time is generated based on the third control signal.
According to another aspect of this application implementation, wherein in the step of generating the second control signal, the length of the predetermined time period is adjusted according to the third control signal.
According to another aspect of the present application implementation, in the step of generating the second control signal, the length of the predetermined period is shortened when the detection result of the difference is smaller than a predetermined threshold.
The invention has the beneficial effects that: since the shielding time of the shielding circuit is set based on the detection result of the difference between the input voltage and the output voltage, when the input voltage and the output voltage are close to each other, the minimum on time of the switching element of the switching power supply can be shortened, and the switching element can be prevented from being damaged due to an excessive peak current.
Specific embodiments of the present invention are disclosed in detail with reference to the following description and drawings, indicating the manner in which the principles of the invention may be employed. It should be understood that the embodiments of the invention are not so limited in scope. The embodiments of the invention include many variations, modifications and equivalents within the spirit and scope of the appended claims.
Features that are described and/or illustrated with respect to one embodiment may be used in the same way or in a similar way in one or more other embodiments, in combination with or instead of the features of the other embodiments.
It should be emphasized that the term "comprises/comprising" when used herein, is taken to specify the presence of stated features, integers, steps or components but does not preclude the presence or addition of one or more other features, integers, steps or components.
Drawings
The accompanying drawings, which are included to provide a further understanding of the embodiments of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention. It is obvious that the drawings in the following description are only some embodiments of the invention, and that for a person skilled in the art, other drawings can be derived from them without inventive effort. In the drawings:
fig. 1 is a circuit configuration diagram of a switching power supply device of embodiment 1;
FIG. 2 is a schematic view of a shield circuit of embodiment 1;
FIG. 3 is a schematic diagram of a subtractor of embodiment 1;
FIG. 4 is a schematic diagram of a differential comparator of embodiment 1;
FIG. 5 is another schematic diagram of the differential comparator of embodiment 1;
fig. 6 is a flowchart of a control method of embodiment 2.
Detailed Description
The foregoing and other features of the invention will become apparent from the following description taken in conjunction with the accompanying drawings. In the description and drawings, particular embodiments of the invention have been disclosed in detail as being indicative of some of the embodiments in which the principles of the invention may be employed, it being understood that the invention is not limited to the embodiments described, but, on the contrary, is intended to cover all modifications, variations, and equivalents falling within the scope of the appended claims.
Example 1
Fig. 1 is a circuit configuration diagram of the switching power supply device of the present embodiment 1. As shown in fig. 1, the control circuit 20 is used to control the switching power supply 10.
As shown in fig. 1, the switching power supply 10 may have a switching element Q1, and the switching element Q1 converts a first voltage Vin, which is generated by rectifying an input alternating-current voltage, into a second voltage Vout, which may be a direct-current voltage, by being turned on and off.
As shown in fig. 1, the control circuit 20 may include a current detection circuit 201, a shielding circuit 202, and a differential comparator 203.
In the present embodiment, the current detection circuit 201 is capable of detecting the current flowing through the switching element Q1, and outputting the first control signal S1 for controlling the on time of the switching element Q1; the shielding circuit 202 can output the second control signal S2 for shielding the first control signal S1 for a predetermined period of time when the switching element Q1 is turned on; the differential comparator 203 can detect a difference between the first voltage Vin and the second voltage Vout and output a third control signal S3 corresponding to the detection result of the difference.
In the present embodiment, the shielding circuit 202 can output the second control signal S2 based on the third control signal S3.
In the present embodiment, the first voltage is a voltage obtained by rectifying the input ac voltage, and therefore, the amplitude of the input ac voltage can be reflected.
According to the present embodiment, since the masking time of the masking circuit is set based on the detection result of the difference between the first voltage and the output voltage corresponding to the voltage input to the switching power supply, when the input voltage and the output voltage are close to each other, the minimum on time of the switching element of the switching power supply can be shortened, and the switching element can be prevented from being damaged due to an excessive peak current.
Next, the configuration of the switching power supply 10 will be briefly described with reference to fig. 1.
As shown in fig. 1, the switching power supply 10 may further include:
a rectifying unit D3, the rectifying unit D3 may rectify the input ac voltage to generate the first voltage Vin, the rectifying unit D3 may be, for example, a bridge rectifier composed of a plurality of rectifying diodes, the present embodiment is not limited thereto, and the rectifying unit D3 may have other structures;
an inductor L1, an inductor L1 may be connected to the rectifying unit D3, and an inductor L1 may be connected in series with the switching element Q1, and when the switching element Q1 is turned on, a current path via the inductor L1 is formed between the switching element Q1 and the rectifying unit D3;
a diode D1, the diode D1 may be connected to the inductor L1, a current path via a diode D1 may be formed between the inductor L1 and the output capacitor C1 when the switching element Q1 is turned off, and the second voltage Vout may be generated across the output capacitor C1.
As shown in fig. 1, the switching power supply 10 may further have a second error amplifier 101, a multiplier 102, and a first error amplifier 103. Wherein the second error amplifier 101 may include an amplifier a2 and a capacitor C4 connected to an output terminal of the amplifier a2, and the amplifier a2 may compare a voltage dividing the second voltage Vout with a reference voltage Vref1 and charge or discharge the capacitor C4 based on the comparison result; the multiplier 102 may multiply the voltage dividing the first voltage Vin by the output voltage of the amplifier a 2; the first error amplifier 103 may include an amplifier a1 and a capacitor C5 connected to an output terminal of the amplifier a1, and the amplifier a1 may compare a voltage corresponding to a current flowing through the switching element Q1 with a voltage output from the multiplier 102 and charge or discharge the capacitor C5 based on the comparison result.
As shown in fig. 1, the switching power supply 10 may further include a switching control circuit 104, and the switching control circuit 104 may be a Pulse Width Modulation (PWM) circuit, for example. In the present embodiment, the switch control circuit 104 may include, for example, a comparator CP1, a current source 1041, a capacitor C2, a switch element Q3, an or gate (or gate)1042, and an and gate (and gate) 1043. The current source 1041 is configured to charge the capacitor C2, the comparator CP1 compares the voltage of the capacitor C2 with the output voltage of the first error amplifier 103, and outputs the comparison result to one input terminal of the or gate 1042, the output terminal of the or gate 1042 is connected to one input terminal of the and gate 1043, and the other input terminal of the and gate 1043 is capable of inverting the signal for input; when turned on, the switching element Q3 discharges the capacitor C2.
As shown in fig. 1, the switching power supply 10 may further have a flip-flop FF, a clock generation circuit 105, and a gate drive circuit 106. The Reset (R) terminal of the flip-flop FF may be connected to the output terminal of the and gate 1043, and the output terminal Q of the flip-flop FF may be connected to the gate driving circuit 106; the gate drive circuit 106 generates a gate voltage Vgate for driving the gate of the switching element Q1; the clock generation circuit 105 is configured to generate a periodic clock signal clk, which may be sent to a set (set, S) terminal of the flip-flop FF and a gate of the switching element Q3.
In the present embodiment, as shown in fig. 1, the switching element Q1 can convert the first voltage Vin into the second voltage Vout by being turned on and off.
It should be noted that fig. 1 shows only one example of the configuration of the switching power supply 10, and the switching power supply 10 may have another configuration.
Next, the structure and the operation principle of the control circuit 20 will be explained.
In the present embodiment, the current detection circuit 201 is capable of detecting the current flowing through the switching element Q1, and outputting the first control signal S1 for controlling the on time of the switching element Q1. In this embodiment, when the current flowing through the switching element Q1 is too large, the first control signal S1 may turn off the switching element Q1, so as to control power factor correction (pfc) of the switching power supply, thereby avoiding the current on the Q1 from being too large.
In the present embodiment, the current detection circuit 201 may have a comparator CP2, a "-" terminal of the comparator CP2 may be connected to the voltage V2, and a "+" terminal of the comparator CP2 may be connected to a connection terminal of the resistor R1 and the switching element Q1. The resistor R1 may be connected in series between the ground terminal and the source of the switching element Q1. When the switching element Q1 is turned on, the voltage across the resistor R1 is correlated with the current flowing through the switching element Q1, and therefore the comparator CP2 can detect the current flowing through the switching element Q1 by comparing the voltage across the resistor R1 with the voltage V2.
In the present embodiment, the comparator CP2 may output the first control signal S1, and the first control signal S1 may be input to the other input terminal of the or gate 1042 of the switch control circuit 104, so that, in the case where the voltage across the resistor R1 is higher than the voltage V2, the first control signal S1 is high, so that the or gate 1042 outputs a high level signal, and, in the case where the signal input to the other input terminal of the and gate 1043 is low, the output terminal of the and gate 1043 outputs a high level signal, which is input to the R terminal of the flip-flop FF, which is reset to output a low level signal from the Q terminal, thereby turning off the switching element Q1.
In addition, in the present embodiment, the current detection circuit 201 may have another structure.
In the present embodiment, the shielding circuit 202 may output the second control signal S2 in a case where the switching element Q1 is turned on, and the second control signal S2 may be used to shield the first control signal S1 for a predetermined period of time. In the present embodiment, in the case where the first control signal S1 is masked, the first control signal S1 cannot turn off the switching element Q1, and therefore, the switching element Q1 remains on even if the first control signal S1 is a low-level signal for a predetermined period of time in which the first control signal S1 is masked.
In the present embodiment, the second control signal S2 output by the shielding circuit 202 may be input to the other input terminal of the and gate 1043 of the switch control circuit 104, so that, when the second control signal S2 is at a high level, the output terminal of the and gate 1043 outputs a low level signal, and thus the first control signal S1 is shielded, and thus, the flip-flop FF is reset, and the switching element Q1 may remain turned on. In the present embodiment, the period in which the second control signal S2 is maintained at the high level corresponds to a predetermined period in which the first control signal S1 is masked; in the case where the second control signal S2 is at a low level, the first control signal S1 is not masked, i.e., the first control signal S1 may control the on-time of the switching element Q1.
In the present embodiment, the masking circuit 202 may adjust the length of the predetermined period of time for which the first control signal S1 is masked, for example, the masking circuit 202 may adjust the length of the predetermined period of time according to the third control signal S3; specifically, the shielding circuit 202 may adjust the length of the period in which the second control signal S2 maintains the high level according to the third control signal S3, thereby adjusting the length of the predetermined period.
In one embodiment, the shielding circuit 202 may shorten the length of the predetermined time period when the third control signal S3 corresponds to a case where the first voltage and the second voltage are very close, for example, in a case where a detection result of a difference between the first voltage and the second voltage is less than a predetermined threshold, the shielding circuit 202 may shorten the length of the predetermined time period according to the third control signal S3 in this case.
In the present embodiment, the masking circuit 202 may be a Leading Edge Blanking (LEB) circuit, and a Blanking time of the Leading Edge Blanking circuit may correspond to a predetermined time period for which the first control signal S1 is masked; in addition, the leading edge blanking circuit may switch the blanking time.
In the present embodiment, the shielding circuit 202 may have a structure capable of adjusting the length of the predetermined period of time, for example, the shielding circuit 202 may have a charging capacitor (not shown in fig. 1) and a charging circuit (not shown in fig. 1) for charging the charging capacitor, and the predetermined period of time may be set based on the speed at which the charging circuit charges the charging capacitor, wherein the speed at which the charging circuit charges the charging capacitor may be switched based on the third control signal. Further, the present embodiment is not limited thereto, and the shield circuit 202 may have other structures capable of adjusting the length of the predetermined period of time.
In the present embodiment, as shown in fig. 1, the shielding circuit 202 may receive another output terminal of the flip-flop FF in addition to the third control signal S3
And a clock signal clk generated by the clock generation circuit 105. In addition, the present embodiment is not limited thereto, and the shielding circuit 102 may also receive other signals.
Fig. 2 is a schematic diagram of the shield circuit of the present embodiment. As shown in fig. 2, the switch K21 of the shielding circuit 202 may be turned on or off under the control of the clock signal clk, and the power Vcc may charge the capacitor C21 when the switch K21 is turned on; the switch K22 of the shielding circuit 202 may be at the output terminal
Is turned on or off, and the output terminal is turned off when the switching element Q1 is turned off
Is high, the switch K22 is turned on, the capacitor C21 is discharged, and the switching element Q1 is turned on, the output terminal is turned on
The signal of (1) is low, the switch K22 is turned off, and the capacitor C21 is charged; the comparator CP21 of the mask circuit 202 compares the voltage of the capacitor C21 with a reference voltage Vref21, and outputs a second control signal S2, where S2 is high when the voltage of C21 is less than Vref21, and S2 is low when C21 is charged to a voltage greater than Vref 21.
As shown in fig. 2, in the present embodiment, the voltage of C21 is charged from 0 to a time period equal to Vref21, S2 remains at a high level, and the control signal S1 is masked. It can be seen that the faster C21 is charged to Vref21, the shorter the predetermined period of time that the control signal S1 is masked.
As shown in fig. 2, in the present embodiment, the source of the switching element Q21 of the shield circuit 202 is connected in series with the resistor R22, and the resistor R21 is connected in parallel with the series circuit of the switching element Q21 and the resistor R22. The gate of the switching element Q21 receives the control signal S3. In the process of charging the capacitor C21, if the signal S3 is low level, Q21 is turned off, and C21 is charged only through R21, so that the charging current is small, the charging speed is slow, and the predetermined time period during which the control signal S1 is masked is long; if the signal S3 is high, Q21 is turned on, and C21 is charged through the parallel circuit of R21 and R22, so that the charging current is large, the charging speed is fast, and the predetermined period of time for which the control signal S1 is masked is short.
In this embodiment, when the difference between the first voltage Vin and the second voltage Vout is large, the signal S3 is at a low level, so that the predetermined time period during which the control signal S1 is masked is long; the signal S3 may be set to high level when the first voltage Vin and the second voltage Vout are closer to each other, so that the predetermined time period during which the control signal S1 is masked is shorter, thereby enabling the shortest on-time of the switching element Q1 to be shortened under the control of the first signal S1, and preventing the switching element Q1 from being damaged due to the current peak caused by the closer proximity of the first voltage Vin and the second voltage Vout.
In this embodiment, the structure of the shielding circuit 202 shown in fig. 2 is merely an example, and the embodiment is not limited thereto, and the shielding circuit 202 may have other structures.
In the present embodiment, the differential comparator 203 can detect the difference between the first voltage Vin and the second voltage Vout and output the third control signal S3 corresponding to the detection result of the difference.
In the present embodiment, as shown in fig. 1, the differential comparator 203 may include a subtractor 2031 and a comparator CP 3. Wherein the subtractor 2031 may subtract the voltage VAC associated with the first voltage Vin from the voltage VFB associated with the second voltage Vout, and output a differential voltage; the comparator CP3 may compare the differential voltage with a predetermined voltage value V1, and generate the third control signal S3.
In the present embodiment, by comparing the differential voltage with the predetermined voltage value V1, it can be determined whether the detection result of the differential is smaller than a predetermined threshold value.
In the present embodiment, the "-" terminal of the comparator CP3 may input the differential voltage output by the subtractor 2031, and the voltage value of the "+" terminal of the comparator CP3 may be the predetermined voltage value V1, whereby, in the case where the differential voltage is greater than the voltage V1, that is, the second voltage Vout is significantly greater than the first voltage Vin, the third control signal S3 output by the comparator CP3 is at a low level, whereby the predetermined period of time for which the control signal S1 is masked can be made longer; in the case where the differential voltage is less than the voltage V1, that is, the second voltage Vout is close to the first voltage Vin, the third control signal S3 output by the comparator CP3 is at a high level, whereby the predetermined period of time for which the control signal S1 is masked can be made short.
In the present embodiment, as shown in fig. 1, resistors R5 and R6 may be connected in series between the first voltage Vin and the ground terminal, and the voltage VAC may be a voltage at a connection point of the resistors R5 and R6; resistors R3 and R4 may be connected in series between the second voltage Vout and the ground terminal, and the voltage VFB may be a voltage at a connection point of the resistors R3 and R4. Thus, voltage VAC corresponds to first voltage Vin, and voltage VFB corresponds to second voltage Vout. In the present embodiment, the ratio of the resistors R5 and R6 may be equal to the ratio of the resistors R3 and R4.
Fig. 3 is a schematic diagram of the subtractor 2031 of the present embodiment. As shown in fig. 3, the voltage VFB is input to the "+" terminal of the operational amplifier OP3 via the buffer (buffer) B and the resistor R7, the voltage VAC is input to the "-" terminal of the operational amplifier OP3 via the buffer (buffer) B and the resistor R8, the resistor R9 is connected between the "+" terminal of the operational amplifier OP3 and the ground terminal, and the resistor R10 is connected between the "-" terminal of the operational amplifier OP3 and the output terminal.
In the present embodiment, the output terminal of the operational amplifier OP3 can be caused to output the voltage value of VFB-VAC, which is input to the "-" terminal of the comparator CP3 of fig. 1, by adjusting the resistance values of the resistors R7, R8, R9, R10.
The subtractor 2031 shown in fig. 3 is only one embodiment, and the present embodiment is not limited to this, and the subtractor 2031 may have another configuration.
The differential comparator 203 shown in fig. 1 is only one embodiment, and the present embodiment is not limited thereto, and the differential comparator 203 may have another configuration.
For example, in one variation of the present embodiment, the differential comparator may have a comparator that may compare the magnitudes of the voltage VFB associated with the second voltage Vout and the voltage VAC associated with the first voltage Vin and generate the third control signal S3.
Fig. 4 is a schematic diagram of the differential comparator of the present embodiment.
As shown in fig. 4, the differential comparator 203 may have a comparator CP 4. The voltage VFB is input to the "-" terminal of the comparator CP4 via the buffer B, the voltage VAC is input to the "+" terminal of the comparator CP4 via the buffer B, and the output terminal of the comparator CP4 outputs the third control signal S3 as a comparison result.
In fig. 4, the voltages VFB and VAC have the same meanings as those in fig. 3. In fig. 4, the resistances of the resistor R6 and the resistor R4 are equal, the ratio of the resistor R3 to the resistor R5 may be α, and the value range of α may be 0.9-1.
The comparator CP4 of fig. 4 may be a comparator having a hysteresis effect, thereby enabling the output signal to be stabilized.
In the present embodiment, the differential comparator of fig. 4 can complete detection of the difference between the first voltage Vin and the second voltage Vout with a simple circuit.
Fig. 5 is another schematic diagram of a differential comparator according to a modification of the present embodiment.
As shown in fig. 5, the differential comparator 203 may have a comparator CP 4. The voltage VFB is input to the "-" terminal of the comparator CP4 via the buffer B. The connection point of the resistors R5 and R6 is connected to the "+" terminal of the comparator CP4 via the resistor R20 and the buffer B. The output terminal of the comparator CP4 outputs a third control signal S3 as a comparison result.
In fig. 5, the differential comparator 203 may further include a current source CC2, and the current source CC2 may flow a constant current through resistors R20 and R6, thereby inputting the voltage VAC to the buffer B.
In fig. 5, the voltage VFB has the same meaning as fig. 3.
In fig. 5, the ratio of the resistors R4 and R6 may be β, the ratio of the resistor R3 and the resistor R5 may also be β, and β may be a predetermined value.
In fig. 5, the resistance R6 may be much smaller than the resistance R20, for example, the ratio of the resistance R6 to the resistance R20 may be greater than 1: 10.
The comparator CP4 of fig. 5 may be a comparator having a hysteresis effect, thereby enabling the output signal to be stabilized.
In the present embodiment, the differential comparator of fig. 5 can complete detection of the difference between the first voltage Vin and the second voltage Vout with a simple circuit.
According to the present embodiment, since the masking time of the masking circuit is set based on the detection result of the difference between the first voltage and the output voltage corresponding to the voltage input to the switching power supply, when the input voltage and the output voltage are close to each other, the minimum on time of the switching element of the switching power supply can be shortened, and the switching element can be prevented from being damaged due to an excessive peak current.
Example 2
Fig. 6 is a schematic flow chart of the control method of embodiment 2, and as shown in fig. 6, the method includes:
step 603 is to generate a second control signal for masking the first control signal for a predetermined period of time based on the third control signal when the switching element is turned on.
In step 603 of this embodiment, the length of the predetermined period of time may be adjusted according to a third control signal, for example, the length of the predetermined period of time is shortened in the case where the detection result of the difference is smaller than a predetermined threshold value.
According to the control method of the present embodiment, since the masking time of the masking circuit is set based on the detection result of the difference between the first voltage corresponding to the voltage input to the switching power supply and the output voltage, when the input voltage and the output voltage are close to each other, the minimum on time of the switching element of the switching power supply can be shortened, and the switching element can be prevented from being damaged due to an excessive peak current.
The present application has been described in conjunction with specific embodiments, but it should be understood by those skilled in the art that these descriptions are intended to be illustrative, and not limiting. Various modifications and adaptations of the present application may occur to those skilled in the art based on the spirit and principles of the application and are within the scope of the application.
Claims (4)
1. A control circuit for controlling a switching power supply whose switching element converts a first voltage generated by rectifying an input AC voltage into a second voltage by turning on and off, the second voltage being a DC voltage,
the control circuit is characterized in that the control circuit comprises:
a current detection circuit that detects a current flowing through the switching element and outputs a first control signal for controlling an on time of the switching element;
a shielding circuit that outputs a second control signal for shielding the first control signal for a predetermined period of time when the switching element is turned on; and
a differential comparator that detects a difference between the first voltage and the second voltage and outputs a third control signal corresponding to a detection result of the difference,
the masking circuit outputs the second control signal based on the third control signal,
wherein the content of the first and second substances,
the masking circuit adjusts the length of the predetermined time period according to the third control signal,
in a case where the detection result of the difference is smaller than a predetermined threshold value, the length of the predetermined period of time is shortened;
wherein the differential comparator has:
a subtractor that subtracts a Voltage (VAC) related to the first voltage from a Voltage (VFB) related to the second voltage to output a differential voltage; and
a comparator (CP3) that compares the differential voltage with a predetermined voltage value, generating the third control signal.
2. A control circuit for controlling a switching power supply whose switching element converts a first voltage generated by rectifying an input AC voltage into a second voltage by turning on and off, the second voltage being a DC voltage,
the control circuit is characterized in that the control circuit comprises:
a current detection circuit that detects a current flowing through the switching element and outputs a first control signal for controlling an on time of the switching element;
a shielding circuit that outputs a second control signal for shielding the first control signal for a predetermined period of time when the switching element is turned on; and
a differential comparator that detects a difference between the first voltage and the second voltage and outputs a third control signal corresponding to a detection result of the difference,
the masking circuit outputs the second control signal based on the third control signal,
wherein the content of the first and second substances,
the masking circuit adjusts the length of the predetermined time period according to the third control signal,
in a case where the detection result of the difference is smaller than a predetermined threshold value, the length of the predetermined period of time is shortened;
wherein the content of the first and second substances,
the shielding circuit has a charging capacitor and a charging circuit for charging the charging capacitor,
the predetermined time period is set according to the speed of the charging circuit for charging the charging capacitor.
3. The control circuit of claim 2, wherein the differential comparator has:
a comparator (CP4) that compares a magnitude of a Voltage (VFB) associated with the second voltage and a magnitude of a Voltage (VAC) associated with the first voltage, and generates the third control signal.
4. A control method for controlling a switching power supply whose switching element converts a first voltage generated by rectifying an input alternating-current voltage into a second voltage by turning on and off, the second voltage being a direct-current voltage,
the control method is characterized by comprising:
detecting a current flowing through the switching element and generating a first control signal for controlling a turn-on time of the switching element;
detecting a difference between the first voltage and the second voltage, wherein a Voltage (VAC) related to the first voltage is subtracted from a Voltage (VFB) related to the second voltage to output a differential voltage, and the differential voltage is compared with a predetermined voltage value to output a third control signal; and
generating a second control signal for masking the first control signal for a predetermined period of time based on the third control signal when the switching element is turned on,
wherein, in the step of generating the second control signal,
adjusting a length of the predetermined period of time according to the third control signal, wherein the length of the predetermined period of time is shortened if the detection result of the difference is less than a predetermined threshold.
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