CN108932388A - A kind of mould 2 based on quantum superposition statenSubtracter design method - Google Patents
A kind of mould 2 based on quantum superposition statenSubtracter design method Download PDFInfo
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Abstract
A kind of mould 2 based on quantum superposition statenSubtracter design method, the method realizes the design method of quantum half-subtracter and restorer, quantum full subtracter and restorer using the controlled door of basic quantum, and constitutes n quantum moulds 2 by quantum half-subtracter, quantum full subtracter and restorernThe design method of subtracter；Finally utilize designed mould 2nSubtracter realizes the mould 2 based on quantum superposition statenSubtraction.The present invention solves the quantum mould 2 of quantum superposition statenSubtraction problem devises the quantum mould 2 based on quantum superposition statenSubtracter.The present invention embodies quantum information processing in the high efficiency of signal processing: 14n-13 basic operation only being needed to achieve that 2mA n integer mould 2nSubtraction, and realize that corresponding add operation needs O (n2 with classic computerm) basic operation.The quantum mould 2 of Figure of abstract n quantum bit of the present inventionnThe quantum wire figure of subtracter.
Description
Technical field
The present invention relates to a kind of moulds 2 based on quantum superposition statenSubtracter design method belongs to quantum wire designing technique neck
Domain.
Background technique
Mould 2nSubtraction is expressed as
MS (b-a)=sign (b-a) × [(b-a) mod 2n] (1)
Wherein a, b are n positive integers.As b < a, sign (b-a)=- 1, as b >=a, sign (b-a)=1.(b-
a)mod 2nIt is (b-a) to 2nModulus operation is carried out, operation rule is as follows
In quantum calculation, information unit is indicated with quantum bit, and there are two basic quantum states for it | 0 > with | 1 >, fundamental quantity
Sub- state is referred to as ground state.One quantum bit can be the linear combination of two ground state, be commonly referred to as superposition state, be represented by | ψ
>=a | 0 >+b | 1 >, wherein a and b is two plural numbers.
Tensor product is to be combined small vector space, constitutes a kind of method of bigger vector space, uses symbolTable
Show.For two ground state | u > with | v >, their tensor productCommon dummy suffix notation | uv >, | u > | v > or | u, v > table
Show, such as ground state | 0 > with | 1 >, their tensor product may be expressed as:
For the n times tensor product of matrix UIt can write a Chinese character in simplified form intoFor quantum state | u > n times tensor productIt can also write a Chinese character in simplified form into
Quantum wire can be made of the quantum bit door of a sequence, in the expression figure of quantum wire, every line all tables
Show the line of quantum wire, the execution sequence of quantum wire is from left to right.What quantum bit door can be convenient uses matrix form
It indicates X (NOT gate), V, V+It is three common single quantum bit doors with unit door, their matrix expression is respectively as follows:
Wherein i is imaginary unit.
Most important muliti-qubit door be it is U controlled, by control quantum bit and target quantum bit, when control bit is
It when 1, is indicated with stain, when control bit is 0, is shown by white dots.Work as U=X, V, V+, at this time controlled U be referred to as it is controlled non-
Door, V controlled, controlled V+Door, their symbol indicate as shown in Figure 1.
Can be indicated with n quantum bit one less than 2nInteger: | bn-1bn-2...b0>, wherein bh∈ { 0,1 }, h=
0,...,n-1。
Further, n+m quantum bit state
Can store a size is 2mColumn vector:
Wherein b (j) is a n integers, j=0 ..., 2m- 1, n and m are positive integers.
The performance indicator of quantum wire is the complexity of route.The complexity of route refers to controlled not-gate in route, controlled V
Door, controlled V+Total quantity of door.
Summary of the invention
The object of the present invention is to which the quantum subtraction in order to solve the problems, such as quantum superposition state, proposes a kind of based on quantum
The mould 2 of superposition statenSubtracter design method.
The technical solution that the present invention realizes is as follows, a kind of mould 2 based on quantum superposition statenSubtracter design method, it is described
Method realizes the design method of quantum half-subtracter and restorer, quantum full subtracter and restorer using the controlled door of basic quantum, with
And n quantum moulds 2 are constituted by quantum half-subtracter, quantum full subtracter and restorernThe design method of subtracter；Finally utilize design
Good mould 2nSubtracter realizes the mould 2 based on quantum superposition statenSubtraction.The controlled door of basic quantum include controlled not-gate,
Controlled V and controlled quantum full adder V+Door.
The design method of the quantum half-subtracter and restorer is as follows:
Quantum half-subtracter designed lines are realized using four controlled doors, are indicated with symbol Q；Four controlled doors include one by
Control NOT gate, two controlled V and a controlled V+Door；The order of connection of this four controlled doors are as follows: controlled V+Door, it is V controlled, by
Control NOT gate, V controlled.
Quantum half-subtracter is applied to quantum state | ci>|bi>|ai>, it obtains:
WhereinIt is xor operation, ci,bi,ai∈ { 0,1 },When | ci0 > when of >=|, from the above equation, we can see that quantum
Half-subtracter realizes subtraction (bi-ai), wherein first quantum bit exportedStore subtraction (bi-ai) borrow information, it is defeated
Second quantum bit outWhat is stored is the difference of subtraction；
In order to which the ancillary qubit after subtraction is reset to original state, the restorer of quantum half-subtracter is designed, by 5
A controlled door composition, with symbol QoIt indicates；Five controlled doors include two controlled not-gates, two controlled V and a controlled V+
Door；The order of connection of this five controlled doors are as follows: controlled V+Door, V controlled, controlled not-gate, V controlled, controlled not-gate.
The restorer of half device of quantum is applied to quantum stateIt obtains:
WhereinIt is xor operation, ci,bi,ai∈ { 0,1 },By formula Q (| ci>|bi>|ai>) know quantum half
The restorer for subtracting device willIt is reset to | ci>；
The complexity of the quantum half-subtracter is 4, and corresponding restorer is 5.
The design method of the quantum full subtracter and restorer is as follows:
Quantum full subtracter designed lines are designed using six controlled doors, quantum full subtracter is indicated with symbol S；Six controlled doors
Including two controlled not-gates, three controlled V and a controlled V+Door；The order of connection of this six controlled doors are as follows: V controlled,
Controlled not-gate, V controlled, controlled not-gate, controlled V+Door, it is V controlled.
Quantum full subtracter is applied to quantum state | ci>|bi>|ai>|ci-1>, it obtains:
WhereinIt is xor operation, ci,bi,ai,ci-1∈ { 0,1 },When | ci0 > when of >=|, from the above equation, we can see that quantum
Full subtracter realizes subtraction (bi-ai-ci-1), wherein first quantum bit exported
Store subtraction (bi-ai-ci-1) borrow information, second quantum bit of outputStorage is subtraction
Difference；
In order to which the ancillary qubit after subtraction is reset to original state, the restorer of quantum full subtracter, by eight
Controlled door composition, with symbol S1It indicates；Eight controlled doors include four controlled not-gates, three controlled V and a controlled V+Door；
The order of connection of this eight controlled doors are as follows: V controlled, controlled not-gate, V controlled, controlled not-gate, controlled V+Door, it is V controlled,
Controlled not-gate, controlled not-gate.
The restorer of quantum full subtracter is applied to quantum state
It obtains:
WhereinIt is xor operation, ci,bi,ai,ci-1∈ { 0,1 },The quantum full subtracter known to formula (6)
Restorer willIt is reset to | ci>；
The complexity of the quantum full subtracter is 6, and corresponding restorer is 8.
The quantum mould 2 of the n quantum bitnThe design method of subtracter is as follows:
Utilize the mould 2 of quantum half-subtracter, quantum full subtracter and corresponding restorer design n quantum bitnThe line of subtracter
Road, the mould 2 of n quantum bitnSubtracter symbol MUIt indicates；
The mould 2 of n quantum bitnSubtracter is by (n-1) a quantum full subtracter, the restorer of (n-2) a quantum full subtracter, 1
The restorer of a quantum half-subtracter and 1 quantum half-subtracter composition, it realizes the mould 2 of two n integersnSubtraction；
Assuming that n integers a and b are stored in the ground state of following two n quantum bits:
Wherein, an-1an-2…a0And bn-1bn-2…b0It is the binary representation of integer a and b, a respectivelyh,bh∈ { 0,1 }, h=
0,...,n-1；
Add the quantum ground state of n quantum bitThe service bit of subtraction the most, and put in order to obtain | 0bn- 1an-10bn-2an-2…0b0a0> as input；By mould 2nSubtracter is applied to | 0bn-1an-10bn-2an-2…0b0a0>, it obtains:
MU|0bn-1an-10bn-2an-2…0b0a0>=| dndn-1an-10dn-2an-2…0d0a0>；
Wherein dnIndicate sign bit, dn=0 indicates positive number, dn=1 indicates negative, dn-1dn-2...d0It is integer [(b-a)
mod 2n] binary representation, dh∈ { 0,1 }, h=0 ..., n-1.
From the above equation, we can see that mould 2nSubtracter realizes following mould 2nSubtraction:
Realize the quantum mould 2 of a n integersnThe complexity of subtraction is 6 (n-1)+8 (n-2)+4+5=14n-13,
n≥2。
The mould 2 based on quantum superposition statenSubtracter operation implementation method is as follows:
2mThe column vector of a elementIt is stored in the quantum superposition state of following (n+m) quantum bit
Wherein b (j) is a n integers, j=0 ..., 2m- 1, n and m are positive integers；
By mould 2nSubtracter MUWithTensor operation obtains new quantum operationWherein symbolFor tensor
Oeprator.It willFollowing formula is applied to,
It obtains:
Wherein an-1an-2...a0、b(j)n-1b(j)n-2...b(j)0With d (j)n-1d(j)n-2...d(j)0Be respectively integer a,
The binary representation of b (j) and d (j)；D (j)=(b (j)-a) mod 2n；ah,b(j)h,d(j)h∈{0,1}；H=0,1 ...,
N-1, n, m are integer；d(j)nIndicate d (j)-a sign bit；d(j)n=0 indicates positive number；d(j)n=1 indicates negative；
From the above equation, we can see thatRealize following mould 2nSubtraction:
Wherein,Realize following subtraction:
The mould 2nSubtraction, by the quantum mould 2 of a n quantum bitnThe line of subtracter and m quantum bit is constituted.
The mould 2nSubtraction, the n-1 quantum bit ground state for auxiliary operationWith mould 2nSubtraction stores operation
Quantum state | ψ(a-b)> | a > will not tied up in knots, therefore in mould 2nIt is removable after subtraction.
The mould 2nSubtraction network complexity is 14n-13, can Parallel Implementation 2mA n integer mould 2nSubtraction.
The invention has the advantages that the present invention solves " the quantum mould 2 of quantum superposition statenSubtraction " problem, if
The quantum mould 2 based on quantum superposition state is countednSubtracter.The present invention embodies quantum information processing in the height of signal processing
Effect property: 14n-13 basic operation is only needed to achieve that 2mA n integer mould 2nSubtraction, and phase is realized with classic computer
The add operation answered needs O (n2m) basic operation.Another advantage of the invention is to devise restorer, so that participating in fortune
The auxiliary quantity subbase state and preservation add operation result quantum state of calculation will not tied up in knots.
Detailed description of the invention
Fig. 1 is the title and symbol table diagram of quantum bit door of the present invention；
Fig. 2 is that the quantum of quantum half-subtracter of the present invention realizes line map；
Fig. 3 is that the quantum of quantum half-subtracter of the present invention realizes the schematic diagram of route；
Fig. 4 is that the quantum of the restorer of quantum half-subtracter of the present invention realizes line map；
Fig. 5 is that the quantum of the restorer of quantum half-subtracter of the present invention realizes schematic circuit diagram；
Fig. 6 is that the quantum of quantum full subtracter of the present invention realizes line map；
Fig. 7 is that the quantum of quantum full subtracter of the present invention realizes schematic circuit diagram；
Fig. 8 is that the quantum of the restorer of quantum full subtracter of the present invention realizes line map；
Fig. 9 is that the quantum of the restorer of quantum full subtracter of the present invention realizes schematic circuit diagram；
Figure 10 is the quantum mould 2 of n quantum bit of the present inventionnThe quantum wire figure of subtracter；
Figure 11 is the quantum mould 2 of n quantum bit of the present inventionnThe quantum wire schematic diagram of subtracter；
Figure 12 is that the present invention is based on the moulds 2 of quantum superposition statenThe quantum wire figure of subtraction；
Figure 13 is a mould 2 based on quantum superposition state of the inventionnThe quantum of subtraction example realizes line map.
Specific embodiment
A specific embodiment of the invention is as follows:
A kind of mould 2 based on quantum superposition state of the present embodimentnSubtracter design method, the method using basic quantum by
The design method that door realizes quantum half-subtracter and restorer, quantum full subtracter and restorer is controlled, and by quantum half-subtracter, quantum
Full subtracter and restorer constitute n quantum moulds 2nThe design method of subtracter；Finally utilize designed mould 2nSubtracter realizes base
In the mould 2 of quantum superposition statenSubtraction.
1, the design method of the present embodiment quantum half-subtracter and restorer
The present embodiment realizes quantum half-subtracter designed lines as shown in Figure 2, its schematic diagram such as Fig. 3 using four controlled doors
It is shown, it is indicated with symbol Q.Four controlled doors include a controlled not-gate, two controlled V and a controlled V+Door.
Quantum half-subtracter is applied to quantum state | ci>|bi>|ai>, it obtains
WhereinIt is xor operation, ci,bi,ai∈ { 0,1 },When | ci0 > when of >=|, the amount known to formula (3)
Sub- half-subtracter realizes subtraction (bi-ai), wherein first quantum bit exportedStore subtraction (bi-ai) borrow information,
Second quantum bit of outputWhat is stored is the difference of subtraction.
In order to which the ancillary qubit after subtraction is reset to original state, the design such as quantum half-subtracter of Fig. 4 is answered
Position device, it is made of 5 controlled doors, including two controlled not-gates, two controlled V and V+ controlled, a schematic diagram such as Fig. 5
It is shown, it is indicated with symbol Qo.
The restorer of half device of quantum is applied to quantum stateIt obtains
WhereinIt is xor operation, ci,bi,ai∈ { 0,1 },Quantum half-subtracter answers known to formula (3)
Position device willIt is reset to | ci>。
Quantum wire in analysis chart 2 and Fig. 4, the complexity that quantum half-subtracter can be obtained is 4, and corresponding restorer is 5.
2, the design method of the present embodiment quantum full subtracter and restorer
The present embodiment realizes quantum full subtracter designed lines as shown in FIG. 6, its schematic diagram such as Fig. 7 using six controlled doors
It is shown, it is indicated with symbol S.Six controlled doors include two controlled not-gates, three controlled V and a controlled V+Door.
Quantum full subtracter is applied to quantum state | ci>|bi>|ai>|ci-1>, it obtains
WhereinIt is xor operation, ci,bi,ai,ci-1∈ { 0,1 },When | ci0 > when of >=|, by formula (5)
Know that quantum full subtracter realizes subtraction (bi-ai-ci-1),
First quantum bit wherein exportedStore subtraction
(bi-ai-ci-1) borrow information, second quantum bit of outputWhat is stored is the difference of subtraction.
In order to which the ancillary qubit after subtraction is reset to original state, the design such as quantum full subtracter of Fig. 8 is answered
Position device, it is made of 8 controlled doors, including four controlled not-gates, three controlled V and a controlled V+Door, schematic diagram such as Fig. 9
It is shown, with symbol S1It indicates.
The restorer of quantum full subtracter is applied to quantum state
It obtains
WhereinIt is xor operation, ci,bi,ai,ci-1∈ { 0,1 },The quantum full subtracter known to formula (6)
Restorer willIt is reset to | ci>。
Quantum wire in analysis chart 6 and Fig. 8, the complexity that quantum full subtracter can be obtained is 6, and corresponding restorer is 8.
3, the quantum mould 2 of the present embodiment n quantum bitnThe design method of subtracter
The present embodiment realizes n quantum as shown in Figure 10 using quantum half-subtracter, quantum full subtracter and corresponding restorer
The mould 2 of bitnThe designed lines of subtracter, use symbol MUIt indicates.The mould 2 of n quantum bitnSubtracter is subtracted entirely by (n-1) a quantum
Device, the restorer of (n-2) a quantum full subtracter, 1 quantum half-subtracter and 1 quantum half-subtracter restorer composition, it is realized
The mould 2 of two n integersnSubtraction.
Assuming that n integers a and b are stored in the ground state of following two n quantum bits:
Wherein an-1an-2…a0And bn-1bn-2…b0It is the binary representation of integer a and b, a respectivelyh,bh∈ { 0,1 }, h=
0 ..., n-1.
Add the quantum ground state of n quantum bitThe service bit of subtraction the most, and put in order to obtain | 0bn- 1an-10bn-2an-2...0b0a0> as input.By mould 2nSubtracter is applied to | 0bn-1an-10bn-2an-2...0b0a0>, it obtains:
MU|0bn-1an-10bn-2an-2...0b0a0>=| dndn-1an-10dn-2an-2...0d0a0> (8)
Wherein dnIndicate sign bit, dn=0 indicates positive number, dn=1 indicates negative, dn-1dn-2...d0It is integer [(b-a)
mod 2n] binary representation, dh∈ { 0,1 }, h=0 ..., n-1, [(b-a) mod 2n] meaning such as formula (1) it is described.
By formula (8) it is found that mould 2nSubtracter realizes following mould 2nSubtraction:
Therefore mould 2nThe schematic diagram of subtracter can be indicated with the symbol of Figure 11.
Quantum wire in analysis chart 10 can obtain the quantum mould 2 for realizing a n integersnThe complexity of subtraction
For 6 (n-1)+8 (n-2)+4+5=14n-13, n >=2.
4, mould 2 of the present embodiment based on quantum superposition statenSubtracter operation is realized
By formula (2) it is found that 2mThe column vector of a elementIt can store following (n+m) quantum bit
In quantum superposition state:
Wherein b (j) is a n integers, j=0 ..., 2m- 1, n and m are positive integers.
By mould 2nSubtracter MUWithTensor operation obtains new quantum operationWherein symbolFor tensor
Oeprator.
It willIt is applied to
It obtains
Wherein an-1an-2…a0、b(j)n-1b(j)n-2...b(j)0With d (j)n-1d(j)n-2...d(j)0It is integer a, b respectively
(j) and the binary representation of d (j), d (j)=(b (j)-a) mod 2n,ah,b(j)h,d(j)h∈ { 0,1 }, h=0,1 ..., n-
1, n, m are integer, d (j)nIndicate d (j)-a sign bit, d (j)n=0 indicates positive number, d (j)n=1 indicates negative.
By formula (10) it is found thatRealize following mould 2nSubtraction:
WhereinRealize following add operation:
Herein, MS (), sign (), mod 2nAs shown in formula (1).
By formula (10) it is found that design can realize the mould 2 in formula (12) such as the quantum wire in Figure 12nSubtraction,
It by a n quantum bit quantum mould 2nThe line of subtracter and m quantum bit is constituted.
By formula (11) it is found that being used for the n-1 quantum bit ground state of auxiliary operationWith mould 2nSubtraction stores operation
Quantum state | ψ(a-b)> | a > will not tied up in knots, therefore in mould 2nIt is removable after subtraction.
Quantum wire in analysis chart 12 can obtain the mould 2 based on quantum superposition statenSubtraction network complexity is
14n-13, it can Parallel Implementation 2mA n integer mould 2nSubtraction, this has fully demonstrated realization mould 2 of the inventionnSubtraction route
High efficiency.
Specific implementation of the invention is as follows:
By formula (2) it is found that working as m=3, when n=3, one 23× 1 integer vectors [0 123456 7]TIt can be with
It is stored in following quantum state:
Wherein b (j)=j, j=0,1 ..., 7.
Quantum wire realizes 8 following moulds 2 as shown in fig. 13 that for design3Subtraction:
MS([0 1 2 3 4 5 6 7]T- 5)=[- 3-4-5-6-7 01 2]T (14)
Wherein []TIt is the transposition of matrix.
Quantum wire in Figure 13 dashed box is the quantum adder of 3 quantum bits, it is by 2 quantum full adders, 1 quantum
The restorer of the restorer of full adder, 1 quantum half adder and a quantum half adder is constituted, therefore the complexity of route is
29, it can the mould 2 of 3 digits is realized by 29 quantum basic operations3Subtraction.By formula (11) it is found that the amount in Figure 13
Realize following mould 2 in sub-line road3Subtraction:
Wherein:
By formula (15) it is found that the quantum wire in Figure 13 realizes 8 moulds 2 in formula (14)3Subtraction, and it is auxiliary
Help quantum bitWill not be with | ψ(b-5)> tied up in knots.
Due to by the quantum mould 2 of 3 quantum bits3Subtracter is applied to quantum superposition state and does not need to increase new quantum
Door, because the complexity of the quantum wire in Figure 13 is also 29.
Claims (8)
1. a kind of mould 2 based on quantum superposition statenSubtracter design method, which is characterized in that the method utilizes the controlled door of quantum
It realizes the design method of quantum half-subtracter and restorer, quantum full subtracter and restorer, and is subtracted entirely by quantum half-subtracter, quantum
Device and restorer constitute n quantum moulds 2nThe design method of subtracter；Finally utilize designed mould 2nSubtracter is realized based on amount
The mould 2 of sub- superposition statenSubtraction.
2. a kind of mould 2 based on quantum superposition state according to claim 1nSubtracter design method, which is characterized in that institute
The design method for stating quantum half-subtracter and restorer is as follows:
Quantum half-subtracter designed lines are realized using four controlled doors, are indicated with symbol Q；Four controlled doors include one controlled non-
Door, two controlled V and a controlled V+Door；The order of connection of this four controlled doors are as follows: controlled V+Door, it is V controlled, controlled non-
Door, it is V controlled；
Quantum half-subtracter is applied to quantum state | ci>|bi>|ai>, it obtains:
WhereinIt is xor operation, ci,bi,ai∈ { 0,1 },When | ci0 > when of >=|, from the above equation, we can see that quantum partly subtracts
Device realizes subtraction (bi-ai), wherein first quantum bit exportedStore subtraction (bi-ai) borrow information, output
Second quantum bitWhat is stored is the difference of subtraction；
In order to which the ancillary qubit after subtraction is reset to original state, the restorer of quantum half-subtracter is designed, by five
Controlled door composition, with symbol QoIt indicates, five controlled doors include two controlled not-gates, two controlled V and a controlled V+Door；
The order of connection of this five controlled doors are as follows: controlled V+Door, V controlled, controlled not-gate, V controlled, controlled not-gate；
The restorer of half device of quantum is applied to quantum stateIt obtains:
WhereinIt is xor operation, ci,bi,ai∈ { 0,1 },By formula Q (| ci>|bi>|ai>) know quantum half-subtracter
Restorer willIt is reset to | ci>；
The complexity of the quantum half-subtracter is 4, and corresponding restorer is 5.
3. a kind of mould 2 based on quantum superposition state according to claim 1nSubtracter design method, which is characterized in that institute
The design method for stating quantum full subtracter and restorer is as follows:
Quantum full subtracter designed lines are designed using six controlled doors, quantum full subtracter is indicated with symbol S；Six controlled doors include
Two controlled not-gates, three controlled V and a controlled V+Door；The order of connection of this six controlled doors are as follows: V controlled, controlled
NOT gate, V controlled, controlled not-gate, controlled V+Door, it is V controlled；
Quantum full subtracter is applied to quantum state | ci>|bi>|ai>|ci-1>, it obtains:
WhereinIt is xor operation, ci,bi,ai,ci-1∈ { 0,1 },When | ci0 > when of >=|, from the above equation, we can see that quantum subtracts entirely
Device realizes subtraction (bi-ai-ci-1), wherein first quantum bit exported
Store subtraction (bi-ai-ci-1) borrow information, second quantum bit of outputWhat is stored is the difference of subtraction；
In order to which the ancillary qubit after subtraction is reset to original state, the restorer of the quantum full subtracter, by eight
Controlled door composition, with symbol S1It indicates；Eight controlled doors include four controlled not-gates, three controlled V and a controlled V+Door；
The order of connection of this 8 controlled doors are as follows: V controlled, controlled not-gate, V controlled, controlled not-gate, controlled V+Door, it is V controlled, by
Control NOT gate, controlled not-gate；
The restorer of quantum full subtracter is applied to quantum state?
It arrives:
WhereinIt is xor operation, ci,bi,ai,ci-1∈ { 0,1 },The reset of quantum full subtracter known to formula (6)
Device willIt is reset to | ci>；
The complexity of the quantum full subtracter is 6, and corresponding restorer is 8.
4. a kind of mould 2 based on quantum superposition state according to claim 1nSubtracter design method, which is characterized in that institute
State the quantum mould 2 of n quantum bitnThe design method of subtracter is as follows:
Utilize the mould 2 of quantum half-subtracter, quantum full subtracter and corresponding restorer design n quantum bitnThe route of subtracter, n amount
The mould 2 of sub- bitnSubtracter symbol MUIt indicates；
The mould 2 of n quantum bitnSubtracter is by (n-1) a quantum full subtracter, the restorer of (n-2) a quantum full subtracter, 1 quantum
The restorer of half-subtracter and 1 quantum half-subtracter composition, it realizes the mould 2 of two n integersnSubtraction；
Assuming that n integers a and b are stored in the ground state of following two n quantum bits:
Wherein, an-1an-2...a0And bn-1bn-2...b0It is the binary representation of integer a and b, a respectivelyh,bh∈ { 0,1 }, h=
0,...,n-1；
Add the quantum ground state of n quantum bitThe service bit of subtraction the most, and put in order to obtain | 0bn-1an- 10bn-2an-2...0b0a0> as input；By mould 2nSubtracter is applied to | 0bn-1an-10bn-2an-2...0b0a0>, it obtains:
MU|0bn-1an-10bn-2an-2...0b0a0>=| dndn-1an-10dn-2an-2...0d0a0>；
Wherein dnIndicate sign bit, dn=0 indicates positive number, dn=1 indicates negative, dn-1dn-2...d0It is integer [(b-a) mod2n]
Binary representation, dh∈ { 0,1 }, h=0 ..., n-1；
From the above equation, we can see that mould 2nSubtracter realizes following mould 2nSubtraction:
Realize the quantum mould 2 of a n integersnThe complexity of subtraction is 6 (n-1)+8 (n-2)+4+5=14n-13, n >=2.
5. a kind of mould 2 based on quantum superposition state according to claim 1nSubtracter design method, which is characterized in that institute
State the mould 2 based on quantum superposition statenSubtracter operation implementation method is as follows:
2mThe column vector of a elementIt is stored in the quantum superposition state of following (n+m) quantum bit
Wherein b (j) is a n integers, j=0 ..., 2m- 1, n and m are positive integers；
By mould 2nSubtracter MUWithTensor operation obtains new quantum operationWherein symbolFor tensor operation symbol
Number；It willFollowing formula is applied to,
It obtains:
Wherein an-1an-2...a0、b(j)n-1b(j)n-2…b(j)0With d (j)n-1d(j)n-2…d(j)0Be respectively integer a, b (j) and
The binary representation of d (j)；D (j)=(b (j)-a) mod2n；ah,b(j)h,d(j)h∈{0,1}；H=0,1 ..., n-1, n, m is
Integer；d(j)nIndicate d (j)-a sign bit；d(j)n=0 indicates positive number；d(j)n=1 indicates negative；
From the above equation, we can see thatRealize following mould 2nSubtraction:
Wherein,Realize following subtraction:
6. a kind of mould 2 based on quantum superposition state according to claim 5nSubtracter design method, which is characterized in that institute
State mould 2nSubtraction, by the quantum mould 2 of a n quantum bitnThe line of subtracter and m quantum bit is constituted.
7. a kind of mould 2 based on quantum superposition state according to claim 5nSubtracter design method, which is characterized in that institute
State mould 2nSubtraction, the n-1 quantum bit ground state for auxiliary operationWith mould 2nThe quantum state of subtraction storage operation |
ψ(a-b)> | a > will not tied up in knots, therefore in mould 2nIt is removable after subtraction.
8. a kind of mould 2 based on quantum superposition state according to claim 5nSubtracter design method, which is characterized in that institute
State mould 2nSubtraction network complexity is 14n-13, can Parallel Implementation 2mA n integer mould 2nSubtraction.
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