CN108922868B - Display substrate, manufacturing method thereof and display panel - Google Patents
Display substrate, manufacturing method thereof and display panel Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
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Abstract
The invention discloses a display substrate, a manufacturing method thereof and a display panel, and belongs to the technical field of display. The method comprises the following steps: providing a substrate base plate; forming a source-drain electrode pattern and a flat layer on a substrate, wherein the flat layer is provided with a flat layer through hole, the thickness of the flat layer in a target subregion is greater than that in other subregions, the target subregion is positioned between the flat layer through hole and an adjacent pixel region for the target subregion and the flat layer through hole in each pixel region, and the other subregions are regions except the target subregion in the pixel region; forming a pixel electrode thin film layer on the substrate with the flat layer; the method comprises the steps of carrying out imaging processing on a pixel electrode thin film layer by adopting a photoresist composition process to obtain a plurality of pixel electrodes, wherein the pixel electrodes are respectively and correspondingly arranged in a plurality of pixel areas, and the pixel electrodes in different pixel areas are disconnected at a target sub-area. The pixel electrode on the display panel manufactured by the invention can be disconnected at the target subarea.
Description
Technical Field
The invention relates to the technical field of display, in particular to a display substrate, a manufacturing method thereof and a display panel.
Background
The display panel comprises a source-drain electrode pattern, a flat layer and a pixel electrode which are arranged on a substrate, and a plurality of pixel regions which are arranged in an array mode are arranged on the substrate. In each pixel region, a planarization layer via hole is arranged on the planarization layer, and a pixel electrode arranged in each pixel region is connected with a source drain electrode in the pixel region through the planarization layer via hole. The source and drain electrodes are used for charging the pixel electrode so as to control the pixel region to realize image display. Further, in order to be able to individually control the display state in each pixel region, the pixel electrodes in different pixel regions are insulated.
In the related art, when manufacturing a pixel electrode, a pixel electrode thin film layer is usually formed first, then a photoresist is coated on the pixel electrode thin film layer, the photoresist at a preset position is exposed and developed, and then the pixel electrode thin film layer is etched to obtain a pixel electrode disposed in each pixel region.
However, due to the fluidity of the photoresist, the photoresist is generally deposited at the predetermined position, which results in insufficient exposure of the photoresist at the predetermined position, and thus causes a connection path between the pixel electrodes in different pixel regions at the predetermined position, which affects the display effect of the display panel.
Disclosure of Invention
The invention provides a display substrate, a manufacturing method thereof and a display panel, which can solve the problem that when a pixel electrode is manufactured in the related art, due to insufficient exposure of photoresist, the pixel electrodes in different pixel areas have connecting passages, and the display effect of the display panel is influenced. The technical scheme is as follows:
in a first aspect, a method for manufacturing a display substrate is provided, the method including:
providing a substrate, wherein the substrate is provided with a plurality of pixel regions arranged in an array;
forming a source and drain electrode pattern on the substrate base plate;
forming a flat layer on the substrate with the source and drain electrode patterns, wherein the flat layer is provided with a flat layer through hole, the thickness of the flat layer in a target sub-region is larger than that in other sub-regions, for the target sub-region and the flat layer through hole in each pixel region, the target sub-region is positioned between the flat layer through hole and the pixel region adjacent to the pixel region, and the other sub-regions are regions in the pixel region except the target sub-region;
forming a pixel electrode thin film layer on the substrate with the flat layer;
and patterning the pixel electrode thin film layer by adopting a photoresist composition process to obtain a plurality of pixel electrodes, wherein the pixel electrodes are respectively and correspondingly arranged in the pixel areas, and the pixel electrodes in different pixel areas are disconnected at the target sub-area.
Optionally, the forming a planarization layer on the substrate base plate on which the source and drain patterns are formed includes:
forming a flat film layer on the substrate with the source and drain electrode patterns;
and forming a flat layer through hole on the flat thin film layer to obtain the flat layer, wherein the bottom of the flat layer through hole is in contact with the source and drain electrode pattern, and the orthographic projection of the flat layer through hole on the substrate is overlapped with the orthographic projection of the pixel electrode on the substrate.
Optionally, an orthographic projection of the planar layer via hole on the substrate base plate is adjacent to the target sub-region.
Optionally, the patterning the pixel electrode thin film layer by using a photoresist patterning process to obtain a plurality of pixel electrodes includes:
forming a photoresist layer on one side of the pixel electrode film layer, which is far away from the substrate base plate;
exposing and developing the photoresist layer to completely remove the photoresist in the target sub-area;
processing the pixel electrode thin film layer by adopting an etching process to obtain a plurality of pixel electrodes;
and removing the photoresist in the other sub-area.
In a second aspect, there is provided a display substrate comprising: the pixel structure comprises a substrate, a plurality of pixel regions and a plurality of pixel electrodes, wherein the substrate is provided with a plurality of pixel regions which are arranged in an array;
the display substrate further includes: the pixel electrode layer comprises a plurality of pixel electrodes which are respectively and correspondingly arranged in the pixel areas, and the pixel electrodes in different pixel areas are disconnected at a target sub-area;
the flat layer is provided with a flat layer through hole, the thickness of the flat layer in the target sub-area is larger than the thickness of the flat layer in other sub-areas, for the target sub-area and the flat layer through hole in each pixel area, the target sub-area is located between the flat layer through hole and the pixel area adjacent to the pixel area, and the other sub-areas are areas except the target sub-area in the pixel area.
Optionally, the source-drain pattern includes a source-drain arranged in each pixel region, the source-drain in different pixel regions is insulated, and the source-drain includes a source and a drain;
the pixel electrode in each pixel region is electrically connected with the drain electrode in the pixel region through the planarization layer via hole.
Optionally, an orthographic projection of the planar layer via hole on the substrate base plate is adjacent to the target sub-region.
Optionally, a size of the target sub-region in a first direction is larger than a size of the pixel electrode in the first direction, and the pixel electrodes arranged along a second direction are disconnected at the target sub-region, where the first direction is perpendicular to the second direction.
Optionally, the planarization layer includes: a first flat sub-layer and a second flat sub-layer which are arranged on the substrate in a stacked mode, wherein the orthographic projection of the first flat sub-layer on the substrate is located in the target sub-area, or the orthographic projection of the second flat sub-layer on the substrate is located in the target sub-area;
alternatively, the flat layer is a whole layer structure.
In a third aspect, a display panel is provided, the display panel comprising: a display substrate according to any one of the second aspect.
The technical scheme provided by the invention has the following beneficial effects:
according to the display substrate, the manufacturing method thereof and the display panel provided by the embodiment of the invention, the thickness of the flat layer in the target sub-region is larger than the thickness of the flat layer in the other sub-regions, compared with the related technology, when the photoresist layer is formed, the photoresist in the target sub-region cannot be accumulated in the target region, so that after the patterning processing is carried out on the pixel electrode thin film layer by adopting the photoresist composition process, the obtained pixel electrode can be disconnected at the target sub-region, the insulation of the pixel electrodes in different pixel regions is ensured, and the display effect of the display panel is further improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a schematic diagram illustrating a structure of a display substrate according to a related art;
FIG. 2 is a flow chart of a method for manufacturing a display substrate according to an embodiment of the present invention;
FIG. 3 is a flow chart of another method for manufacturing a display substrate according to an embodiment of the present invention;
FIG. 4 is a schematic structural diagram of a planarization layer provided in an embodiment of the present invention;
fig. 5 is a schematic top view of a first planar sublayer formed on a source/drain pattern according to an embodiment of the present invention;
fig. 6 is a schematic top view of a first planar sublayer and a second planar sublayer formed on a source-drain electrode pattern according to an embodiment of the present invention;
FIG. 7 is a schematic structural diagram of another planarization layer provided in an embodiment of the present invention;
FIG. 8 is a schematic structural diagram of another planarization layer provided in an embodiment of the present invention;
FIG. 9 is a schematic structural diagram of a planar layer obtained after a planar layer via hole is formed in a planar thin film layer according to an embodiment of the present invention;
fig. 10 is a schematic structural diagram of a substrate with a planarization layer formed thereon after a pixel electrode thin film layer is formed thereon according to an embodiment of the present invention;
FIG. 11 is a schematic structural diagram illustrating a photoresist layer formed on a side of a thin film layer of a pixel electrode away from a substrate according to an embodiment of the present invention;
FIG. 12 is a schematic view of a photoresist layer after exposure and development according to an embodiment of the present invention;
fig. 13 is a schematic top view of a pixel electrode according to an embodiment of the invention;
fig. 14 is a schematic structural diagram of a thin film layer of a pixel electrode processed by an etching process according to an embodiment of the present invention;
FIG. 15 is a schematic diagram of a display substrate according to an embodiment of the present invention;
FIG. 16 is a schematic structural diagram of another display substrate according to an embodiment of the present invention;
fig. 17 is a schematic structural diagram of another display substrate according to an embodiment of the disclosure.
Detailed Description
To make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
Currently, liquid Crystal Displays (LCDs) with high pixel density (PPI) are the main development direction of Low Temperature Polysilicon (LTPS) LCDs. In addition, in the display panel of the LCD, the inversion structure in which the pixel electrode is disposed on the substrate and the common electrode is disposed thereon can effectively increase the aperture ratio of the display panel.
In the related art, the manufacturing process of the structure generally includes: the manufacturing method comprises the steps of firstly forming a flat layer on a substrate with an active drain electrode pattern, then forming a flat layer through hole on the flat layer, forming a pixel electrode thin film layer on the substrate with the flat layer, then forming a photoresist layer on the substrate with the pixel electrode thin film layer, exposing and developing the photoresist layer, and etching the pixel electrode thin film layer in a region (the region is positioned around the flat layer through hole) with the photoresist removed through an etching process to obtain a pixel electrode layer, wherein different pixel electrodes in the pixel electrode layer are disconnected in the region.
However, referring to fig. 1, since the planarization layer 101 is formed with the planarization layer via hole and the photoresist has fluidity, during the process of forming the photoresist layer 102, photoresist accumulation may occur in the area around the planarization layer via hole, that is, the thickness H11 of the photoresist in the area is greater than the thickness H12 of the photoresist in other areas, so that the exposure of the photoresist at the position where the photoresist accumulation occurs is insufficient, and further, after the pixel electrode thin film layer 103 at the position is etched, the pixel electrode at the position still has adhesion (that is, there is a connection path), so that the charging effect of the pixel area where the adhered pixel electrode is located is affected, and further, the display effect of the pixel area is affected, that is, the display abnormality of the display panel is caused.
In order to solve the problem, in the related art, the area of the pixel electrode thin film layer to be etched is increased by increasing the gaps between different pixel electrodes, so that the probability that the connecting paths between different pixel electrodes are etched and broken is increased, and the purpose of improving the display effect of the display panel is achieved. However, this approach can cause other problems, such as: the existence of the gap limits the area of the pixel region, resulting in that the pixel density of the display panel cannot be further increased.
To this end, an embodiment of the present invention provides a method for manufacturing a display substrate, as shown in fig. 2, the method including:
The substrate base plate is provided with a plurality of pixel regions which are arranged in an array mode.
And step 203, forming a flat layer on the substrate with the active drain pattern, wherein the flat layer is provided with a flat layer through hole, and the thickness of the flat layer in the target sub-area is larger than that in other sub-areas.
For the target sub-area and the flat layer via hole in each pixel area, the target sub-area is located between the flat layer via hole and the pixel area adjacent to the pixel area, and the other sub-areas are areas except the target sub-area in the pixel area.
And 204, forming a pixel electrode thin film layer on the substrate with the flat layer.
The plurality of pixel electrodes are respectively and correspondingly arranged in the plurality of pixel areas, and the pixel electrodes in different pixel areas are disconnected at the target subarea.
In summary, in the manufacturing method of the display substrate provided by the embodiment of the invention, by setting the thickness of the planarization layer in the target sub-area to be greater than the thicknesses of the planarization layer in the other sub-areas, compared with the related art, when the photoresist layer is formed, the photoresist in the target sub-area is not accumulated in the target area, so that after the patterning process is performed on the pixel electrode thin film layer by using the photoresist patterning process, the obtained pixel electrode can be disconnected in the target sub-area, thereby ensuring the insulation of the pixel electrodes in different pixel areas, and further improving the display effect of the display panel.
Fig. 3 is a flowchart of another method for manufacturing a display substrate according to an embodiment of the present invention, and as shown in fig. 3, the method may include:
The substrate base plate is provided with a plurality of pixel regions which are arranged in an array mode. Alternatively, the substrate may be a transparent substrate, which may be made of a light-guiding and non-metal material with certain robustness, such as glass, quartz, or transparent resin.
And 302, forming a source and drain electrode pattern on the substrate.
A layer of conductive material with a certain thickness can be deposited on a substrate by magnetron sputtering, thermal evaporation or Plasma Enhanced Chemical Vapor Deposition (PECVD) or the like to obtain a conductive material layer, and then the conductive material layer is processed by a one-step composition process to obtain a source/drain electrode pattern. Wherein, the one-time patterning process may include: photoresist coating, exposure, development, etching and photoresist stripping. The conductive material may be formed of molybdenum (Mo), copper (Cu), aluminum (Al) or an alloy thereof, and a value range of the thickness of the source/drain pattern may be set according to actual needs.
And 303, forming a flat thin film layer on the substrate with the active drain pattern, wherein the thickness of the flat thin film layer in the target sub-area is larger than that in other sub-areas.
The target sub-area is an area where a gap between the pixel electrodes in two adjacent pixel areas is located, and the other sub-areas are areas except the target sub-area in the pixel areas. The position of the target sub-region in the pixel region may be a position determined according to actual needs.
The method of magnetron sputtering, thermal evaporation or PECVD or the like can be adopted to form a flat material layer on the substrate with the active drain electrode pattern formed thereon, and then the flat material layer is processed through a one-time composition process to obtain a flat thin film layer. Alternatively, the planar material layer may be made of a silicon dioxide material or a silicon nitride material. The method for forming the flat thin film layer can be various, and the following realizable methods are taken as examples to illustrate the embodiment of the invention:
in a first implementation manner, a first flat sublayer and a second flat sublayer may be sequentially formed on a substrate with an active drain pattern formed thereon, and an orthographic projection of the first flat sublayer on the substrate is located in a target sub-area. For the process of forming the first and second planar sublayers, please refer to the process of forming the source/drain pattern, which is not described herein again.
For example, referring to fig. 4, a first flat sublayer 0031 and a second flat sublayer 0032 are sequentially formed on a substrate 001 on which an active drain pattern (not shown in fig. 4) is formed to obtain a flat thin film layer P, and a forward projection of the first flat sublayer 0031 on the substrate 001 is located in a target sub-region A1. Accordingly, fig. 5 is a schematic top view of the first planar sublayer 0031 formed on the source/drain pattern 002, and fig. 6 is a schematic top view of the first planar sublayer 0031 and the second planar sublayer 0032 formed on the source/drain pattern 002.
In a second implementation manner, a first flat sub-layer and a second flat sub-layer are sequentially formed on a substrate with an active drain pattern formed thereon, and an orthographic projection of the second flat sub-layer on the substrate is located in a target sub-region. For the process of forming the first and second planar sublayers, please refer to the process of forming the source/drain patterns, which is not described herein again.
For example, referring to fig. 7, a first flat sub-layer 0031 and a second flat sub-layer 0032 are sequentially formed on a substrate 001 on which an active drain pattern is formed to obtain a flat thin film layer P, and an orthographic projection of the second flat sub-layer 0032 on the substrate 001 is located in a target sub-region A1.
In a third implementation manner, a flat material layer is formed on a substrate with an active drain pattern formed thereon, and then the flat material layer is processed by a one-step composition process to obtain a flat thin film layer. The processing the planar material layer by the one-time patterning process may include: and forming a photoresist layer on one side of the flat material layer, which is far away from the substrate, then exposing the photoresist layer by adopting a half-tone mask plate, developing and etching the exposed photoresist layer, and removing the undeveloped photoresist to obtain the flat film layer.
For example, referring to fig. 8, a planar thin film layer P is formed on the substrate 001 on which the active drain pattern is formed, and the thickness of the planar thin film layer P in the target sub-area A1 is greater than that in the other sub-areas A2.
Alternatively, a planar layer via may be formed on the planar thin film layer by a one-time patterning process. The bottom of the through hole of the flat layer can be contacted with the source and drain electrode pattern, so that a condition is provided for connecting the pixel electrode and the drain electrode. And, in order to ensure effective connection of the pixel electrode and the drain electrode, an orthogonal projection of the planarization layer via hole on the substrate may overlap with an orthogonal projection of the pixel electrode on the substrate. And for the target sub-region and the planarization via hole in each pixel region, the target sub-region is located between the planarization via hole and the pixel region adjacent to the pixel region.
Further, the orthographic projection of the through hole of the flat layer on the substrate can be adjacent to the target sub-area, so that the pixel electrode formed on one side of the target sub-area belongs to one pixel area, the pixel electrode formed on the other side of the target sub-area belongs to the other pixel area, and the one side and the other side are two sides which are oppositely arranged, so that the target sub-area is used as a gap between the pixel electrodes, a gap between the pixel electrodes does not need to be additionally arranged on the substrate, the area of the pixel areas is favorably reduced, and the pixel density of the display panel is further improved.
For example, please refer to fig. 9, which shows a schematic structural diagram of a planarization layer 003 obtained after a planarization layer via 0033 is formed on a planarization film layer P according to an embodiment of the present invention, as shown in fig. 9, an orthographic projection of the planarization layer via 0033 on a substrate 001 is adjacent to a target sub-area A1.
A layer of pixel electrode material with a certain thickness can be deposited on the substrate with the flat layer by adopting methods such as magnetron sputtering, thermal evaporation or PECVD and the like to obtain a pixel electrode thin film layer. The thickness of the pixel electrode thin film layer and the material for manufacturing the pixel electrode thin film layer can be set according to actual needs. For example: the thin film layer of the pixel electrode can be made of Indium Tin Oxide (ITO) or Indium Zinc Oxide (IZO).
For example, please refer to fig. 10, which shows a schematic structural diagram of a pixel electrode thin film layer X formed on a substrate 001 with a planarization layer 003 formed thereon, wherein the pixel electrode thin film layer X can be connected to a drain through a planarization layer via.
And step 306, forming a photoresist layer on one side of the pixel electrode film layer far away from the substrate.
Optionally, a photoresist layer with a certain thickness may be coated on a side of the pixel electrode thin film layer away from the substrate. The thickness of the photoresist layer may be set according to actual needs, and the photoresist layer may be a positive photoresist layer or a negative photoresist layer, which is not limited in the embodiment of the present invention. The embodiment of the invention takes the photoresist layer as a positive photoresist layer as an example for explanation.
For example, please refer to fig. 11, which shows a schematic structural diagram of a pixel electrode thin film layer X after a photoresist layer G is formed on a side away from a substrate 001 according to an embodiment of the present invention, and it can be seen from fig. 11 that: since the thickness of the flat layer 003 in the target sub-area A1 is greater than that in the other sub-areas A2, when the photoresist layer G is formed on the side of the pixel electrode thin film layer X away from the substrate 001, the thickness of the photoresist formed in the target sub-area A1 is reduced under the action of the flowing of the photoresist, that is, the thickness H21 of the photoresist in the target sub-area A1 is less than the thickness H22 of the photoresist in the other sub-areas A2.
The photoresist layer may be exposed by using a mask plate, and the exposed photoresist layer may be developed to remove the photoresist in the target sub-region and to retain the photoresist in the other sub-regions. The opening area of the mask plate corresponds to the target sub-area, and the non-opening area of the mask plate corresponds to other sub-areas. And, since the thickness of the photoresist in the target sub-area is smaller than that of the photoresist in the other sub-areas, the photoresist in the target sub-area can be fully exposed through the exposure and development process, and the photoresist in the target sub-area can be completely removed through the development process.
For example, fig. 12 shows a schematic structural diagram of a photoresist layer G after exposure and development according to an embodiment of the present invention, please refer to fig. 12, after the exposure and development process, the photoresist in the target sub-area A1 is completely removed.
And 308, processing the pixel electrode thin film layer by adopting an etching process to obtain a plurality of pixel electrodes.
Optionally, in the etching process, the pixel electrode thin film layer in the target sub-area may be etched to obtain a plurality of pixel electrodes. The plurality of pixel electrodes are respectively and correspondingly arranged in the plurality of pixel areas. And because the photoresist in the target subarea is completely removed, the pixel electrodes in different pixel areas can be disconnected at the target subarea through the etching process, so that the insulation of the pixel electrodes in different pixel areas is ensured.
Further, referring to fig. 13, in order to ensure that the pixel electrode 004 can be effectively disconnected at the target sub-area A1, the size of the target sub-area A1 in the first direction F1 may be set to be larger than the size of the pixel electrode 004 in the first direction F1, and the pixel electrode 004 arranged along the second direction F2 is disconnected at the target sub-area A1, where the first direction F1 is perpendicular to the second direction F2.
For example, please refer to fig. 14, which shows a schematic structural diagram of a thin film layer of a pixel electrode processed by an etching process according to an embodiment of the present invention, as can be seen from fig. 14, after the thin film layer of the pixel electrode is etched, a plurality of pixel electrodes 004 respectively and correspondingly disposed in a plurality of pixel regions can be obtained, and the pixel electrodes 004 in different pixel regions are disconnected at the target sub-region A1. Accordingly, referring to fig. 13, the schematic top view of the pixel electrode 004, it can be seen that the pixel electrode 004 in different pixel regions is broken at the target region A1.
Alternatively, the photoresist in the other sub-region may be removed by using a process such as developing, ashing, stripping, and the like, which is not limited in this embodiment of the present invention. For an exemplary structure schematic diagram after removing the photoresist in the other sub-area A2, please refer to fig. 15.
In summary, in the manufacturing method of the display substrate provided by the embodiment of the invention, by setting the thickness of the planarization layer in the target sub-area to be greater than the thicknesses of the planarization layer in the other sub-areas, compared with the related art, when the photoresist layer is formed, the photoresist in the target sub-area is not accumulated in the target area, so that after the patterning process is performed on the pixel electrode thin film layer by using the photoresist patterning process, the obtained pixel electrode can be disconnected in the target sub-area, thereby ensuring the insulation of the pixel electrodes in different pixel areas, and further improving the display effect of the display panel.
An embodiment of the present invention further provides a display substrate, and with continued reference to fig. 16, the display substrate 0 may include:
the liquid crystal display device comprises a substrate 001, wherein the substrate 001 is provided with a plurality of pixel regions arranged in an array, and each pixel region comprises: a target sub-area A1 and other sub-areas A2, the other sub-areas A2 being areas of the pixel area other than the target sub-area A1.
The display substrate may further include: a source-drain pattern (not shown in fig. 16) provided on the substrate 001, the planarization layer 003, and a pixel electrode layer are stacked, the pixel electrode layer includes a plurality of pixel electrodes 004, the plurality of pixel electrodes 004 are respectively provided in a plurality of pixel regions, and the pixel electrodes 004 in different pixel regions are disconnected at the target sub-region A1.
The flat layer 003 is provided with a flat layer via 0033, the thickness of the flat layer 003 in the target sub-region A1 is greater than that in the other sub-regions A2, for the target sub-region A1 and the flat layer via 0033 in each pixel region, the target sub-region A1 is located between the flat layer via 0033 and the pixel region adjacent to the pixel region, and the other sub-regions A2 are regions of the pixel region except the target sub-region A1.
In summary, in the display substrate provided in the embodiments of the present invention, the thickness of the planarization layer in the target sub-region is greater than the thickness of the planarization layer in the other sub-regions, and compared with the related art, the photoresist formed on the planarization layer is not accumulated in the target sub-region, so that the pixel electrode obtained by the photoresist patterning process can be disconnected at the target sub-region, thereby ensuring the insulation of the pixel electrodes in different pixel regions, and further improving the display effect of the display panel.
The arrangement of the planarization layer 003 can be varied, and the following realizable manners are taken as examples to illustrate the embodiment of the present invention:
in a first implementation manner, referring to fig. 15, the planarization layer 003 includes: a first flat sublayer 0031 and a second flat sublayer 0032 are stacked on the substrate 001, and an orthographic projection of the first flat sublayer 0031 on the substrate 001 is located in the target sub-area A1.
In a second implementation manner, referring to fig. 17, the planarization layer 003 includes: a first flat sublayer 0031 and a second flat sublayer 0032 are disposed on the substrate 001 in a stacked manner, and the orthographic projection of the second flat sublayer 0032 on the substrate 001 is located in the target sub-area A1.
In a third implementation, referring to fig. 16, the planarization layer 003 is a monolithic structure.
And, the source drain pattern may include a source drain disposed in each pixel region, the source drain in different pixel regions being insulated. The source and drain electrodes comprise a source electrode and a drain electrode. In each pixel region, the pixel electrode 004 may be connected to a drain electrode for charging the pixel electrode 004, so as to control the pixel region to realize image display. As an implementation, the pixel electrode 004 in each pixel region may be electrically connected to the drain electrode in the pixel region through the planarization layer via 0033.
Further, the orthographic projection of the through hole 0033 of the flat layer on the substrate 001 can be adjacent to the target sub-area A1, so that the pixel electrode 004 formed on one side of the target sub-area A1 belongs to one pixel area, the pixel electrode 004 formed on the other side of the target sub-area A1 belongs to another pixel area, and the one side and the other side are two sides oppositely arranged, so that the target sub-area A1 is used as a gap between the pixel electrodes 004, so that the gap between the pixel electrodes 004 does not need to be additionally arranged on the substrate 001, which is beneficial to further reducing the area of the pixel area and further improving the pixel density of the display panel.
Optionally, in order to ensure that the pixel electrode 004 can be effectively disconnected at the target sub-region A1, the size of the target sub-region A1 in the first direction is larger than that of the pixel electrode 004 in the first direction, and the pixel electrodes 004 arranged along the second direction are disconnected at the target sub-region A1, where the first direction is perpendicular to the second direction.
In summary, in the display substrate provided in the embodiments of the present invention, the thickness of the planarization layer in the target sub-region is greater than the thickness of the planarization layer in the other sub-regions, and compared with the related art, the photoresist formed on the planarization layer is not accumulated in the target sub-region, so that the pixel electrode obtained by the photoresist patterning process can be disconnected at the target sub-region, thereby ensuring the insulation of the pixel electrodes in different pixel regions, and further improving the display effect of the display panel.
The embodiment of the invention provides a display panel, which can comprise the display substrate provided by the embodiment of the invention. The display panel may be: liquid crystal panels, electronic paper, organic Light-Emitting Diode (OLED) panels, mobile phones, tablet computers, televisions, displays, notebook computers, digital photo frames, navigators and other products or components with display functions.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and should not be taken as limiting the scope of the present invention, which is intended to cover any modifications, equivalents, improvements, etc. within the spirit and scope of the present invention.
Claims (8)
1. A method of manufacturing a display substrate, the method comprising:
providing a substrate, wherein the substrate is provided with a plurality of pixel regions arranged in an array;
forming a source and drain electrode pattern on the substrate base plate;
sequentially forming a first flat sub-layer and a second flat sub-layer on a substrate base plate on which the source and drain electrode patterns are formed, wherein the first flat sub-layer and the second flat sub-layer form a flat layer, the flat layer is provided with a flat layer through hole, the thickness of the flat layer in a target sub-region is larger than that in other sub-regions, for the target sub-region and the flat layer through hole in each pixel region, the flat layer through hole is positioned between the target sub-region and a pixel region adjacent to the pixel region where the target sub-region is positioned, the other sub-regions are regions except the target sub-region in the pixel region, the orthographic projection of the first flat sub-layer on the substrate is positioned in the target sub-region, or the orthographic projection of the second flat sub-layer on the substrate base plate is positioned in the target sub-region, the flat layer is provided with a curved surface bulge in the target sub-region, and the curved surface bulge is used for preventing photoresist from being accumulated in the target sub-region; the orthographic projection of the flat layer through hole on the substrate base plate is adjacent to the target subarea;
forming a pixel electrode thin film layer on the substrate with the flat layer;
patterning the pixel electrode thin film layer by adopting a photoresist composition process to obtain a plurality of pixel electrodes, wherein the pixel electrodes are respectively and correspondingly arranged in the pixel regions, and the pixel electrodes in different pixel regions are disconnected at the target sub-region; target sub-regions in different pixel regions are independent of each other, the size of the target sub-regions in a first direction is larger than that of the pixel electrodes in the first direction, the pixel electrodes arranged along a second direction are disconnected at the target sub-regions, and the first direction is perpendicular to the second direction; the thickness of the flat layer in the target sub-area is smaller than the sum of the thicknesses of the pixel electrode and the flat layer in the other sub-areas.
2. The method of claim 1, wherein the forming a planarization layer on the substrate with the source and drain patterns comprises:
forming a flat film layer on the substrate with the source and drain electrode patterns;
and forming a flat layer through hole on the flat thin film layer to obtain the flat layer, wherein the bottom of the flat layer through hole is in contact with the source and drain electrode patterns, and the orthographic projection of the flat layer through hole on the substrate base plate is overlapped with the orthographic projection of the pixel electrode on the substrate base plate.
3. The method of claim 2, wherein an orthographic projection of the planar layer via on the substrate base plate is adjacent to the target sub-region.
4. The method of any one of claims 1 to 3, wherein the patterning the pixel electrode thin film layer by a photoresist patterning process to obtain a plurality of pixel electrodes comprises:
forming a photoresist layer on one side of the pixel electrode film layer, which is far away from the substrate base plate;
exposing and developing the photoresist layer to completely remove the photoresist in the target sub-area;
processing the pixel electrode thin film layer by adopting an etching process to obtain a plurality of pixel electrodes;
and removing the photoresist in the other sub-regions.
5. A display substrate, comprising: the pixel structure comprises a substrate, a plurality of pixel regions and a plurality of pixel electrodes, wherein the substrate is provided with a plurality of pixel regions arranged in an array;
the display substrate further includes: the pixel electrode layer comprises a plurality of pixel electrodes, the pixel electrodes are respectively and correspondingly arranged in the pixel areas, and the pixel electrodes in different pixel areas are disconnected at a target sub-area;
the flat layer is provided with a flat layer through hole, the thickness of the flat layer in the target sub-area is larger than that of the flat layer in other sub-areas, for the target sub-area and the flat layer through hole in each pixel area, the flat layer through hole is positioned between the target sub-area and a pixel area adjacent to the pixel area where the target sub-area is located, and the other sub-areas are areas except the target sub-area in the pixel area; the orthographic projection of the flat layer through hole on the substrate base plate is adjacent to the target subarea;
the flat layer comprises a first flat sub-layer and a second flat sub-layer which are arranged on the substrate base plate in a laminated mode, wherein the orthographic projection of the first flat sub-layer on the substrate base plate is located in the target sub-area, or the orthographic projection of the second flat sub-layer on the substrate base plate is located in the target sub-area, the flat layer is provided with a curved surface bulge in the target sub-area, and the curved surface bulge is used for enabling photoresist not to be accumulated in the target sub-area;
target sub-regions in different pixel regions are independent of each other, the size of the target sub-regions in a first direction is larger than that of the pixel electrodes in the first direction, the pixel electrodes arranged along a second direction are disconnected at the target sub-regions, and the first direction is perpendicular to the second direction; the thickness of the flat layer in the target sub-area is smaller than the sum of the thicknesses of the pixel electrode and the flat layer in the other sub-areas.
6. The display substrate according to claim 5, wherein the source and drain patterns comprise source and drain electrodes disposed in each pixel region, the source and drain electrodes in different pixel regions are insulated, and the source and drain electrodes comprise a source electrode and a drain electrode;
the pixel electrode in each pixel area is electrically connected with the drain electrode in the pixel area through the flat layer through hole.
7. The display substrate of claim 6, wherein an orthographic projection of the planar layer via on the substrate base is adjacent to the target sub-region.
8. A display panel, comprising: a display substrate according to any one of claims 5 to 7.
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