CN108900205B - Digital transmitter based on numerical control attenuator amplitude control - Google Patents
Digital transmitter based on numerical control attenuator amplitude control Download PDFInfo
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- CN108900205B CN108900205B CN201810711250.4A CN201810711250A CN108900205B CN 108900205 B CN108900205 B CN 108900205B CN 201810711250 A CN201810711250 A CN 201810711250A CN 108900205 B CN108900205 B CN 108900205B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/02—Transmitters
- H04B1/04—Circuits
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/02—Transmitters
- H04B1/04—Circuits
- H04B2001/0408—Circuits with power amplifiers
- H04B2001/0416—Circuits with power amplifiers having gain or transmission power control
Abstract
The invention discloses a digital transmitter based on numerical control attenuator amplitude control, which comprises a baseband signal module, a Delta-sigma modulation module, a digital up-conversion module, a parallel-serial conversion module, an amplitude control module, a power amplifier and a band-pass filter which are connected in sequence, wherein the amplitude control module adopts a numerical control attenuator to control the amplitude of an output signal so as to improve the coding efficiency.
Description
Technical Field
The invention relates to the field of all-digital radio frequency transmitters, in particular to a digital transmitter based on numerical control attenuator amplitude control.
Background
In recent years, mobile communication system design using digital radio frequency transmitter architectures based on Delta-sigma modulation is on the rise. Compared with the traditional analog radio frequency transmitter architecture, the architecture has the advantages of wide frequency band, flexible frequency conversion, high efficiency, simple system, easy integration and the like, and is expected to become a support technology for large-scale MIMO, multi-band transceiver and millimeter wave communication. However, there are several obstacles that limit the application of Delta Sigma transmitters. One obstacle is that the Delta Sigma modulation of the signal produces a significant amount of quantization noise outside the band of the signal. This quantization noise accounts for a major portion of the Delta Sigma modulated output signal. Therefore, when the subsequent power amplifier of the system amplifies the signal, a large part of the power amplifier is dissipated because of the amplified quantization noise, so that the overall efficiency is very poor after the quantization noise is filtered at the output of the power amplifier.
How to improve the coding efficiency of Delta-Sigma modulation, namely how to reduce the quantization noise after Delta-Sigma modulation, is an important problem for the application of the transmitter based on Delta-Sigma modulation at present. In order to improve the coding efficiency, the proposed solution is implemented in the analog domain, and noise reduction is implemented by adding an analog rf device (combiner), thereby improving the coding efficiency.
The architecture of a conventional digital radio frequency transmitter based on Delta-sigma modulation is shown in fig. 1, and comprises amplitude normalization, Delta-sigma modulation, digital up-conversion, parallel-serial conversion, a power amplifier and a band-pass filter. The amplitude normalization realizes normalization of the input baseband signal according to the maximum amplitude of the signal, so that the amplitude of the baseband signal is normalized to be between 1 and-1; delta-sigma modulation converts a multi-bit wide signal into a 1-bit wide digital signal representation; the digital up-conversion converts the modulated digital baseband signal to a digital radio frequency carrier frequency; the parallel-serial conversion enables a plurality of low-speed clocks to form high-speed digital radio frequency signals through parallel-to-serial conversion; the power amplifier realizes the power amplification of the digital radio frequency small signal; and the band-pass filtering realizes the filtering of quantization noise and takes out the radio frequency signal.
The main problems with the above digital rf transmitter architecture are: because the digital radio frequency output under the framework has only 1-bit wide representation and contains a large amount of quantization noise, the actual coding efficiency is very low, and the overall efficiency of the digital transmitter is also very low. And the highest amplitude response of the quantization noise outside the band is very high, which also brings great design difficulty to the design of the band-pass filter at the back end of the transmitter.
Disclosure of Invention
In order to overcome the defects and shortcomings of the prior art, the invention provides the digital transmitter based on numerical control attenuator amplitude control, and the digital transmitter has the advantages of easy structure design, low complexity and simple debugging, simultaneously reduces quantization noise and greatly improves coding efficiency.
The invention adopts the following technical scheme:
a digital transmitter based on numerical control attenuator amplitude control comprises sequentially connected
The baseband signal processing module comprises data segmentation and amplitude normalization and is used for segmenting the baseband signals and carrying out amplitude normalization according to the maximum amplitude value in each segmented signal;
the Delta-sigma modulation module is used for converting each normalized segmented multi-bit wide baseband signal into a digital square wave signal with 1-bit width;
the digital up-conversion module is used for carrying out frequency conversion operation on the converted digital square wave signal in a digital domain and carrying the signal to FCAt carrier frequency of/N, where FCIs a radio frequency carrier frequency, and N is an integer;
the parallel-serial conversion module is used for converting the N paths of parallel input signals into 1 path of serial output signals, namely the speed of the output signals is N times of that of the input signals;
the amplitude control module is used for controlling the amplitude of the output signal by adopting a numerical control attenuator so that the amplitude of the output signal corresponds to the peak value of the input signal section;
the power amplifier and the band-pass filter obtain an output signal.
The parallel-serial conversion module adopts a serdes interface, and the serdes interface comprises a serializer.
And N in the digital up-conversion module is 4.
The numerical control attenuator is formed by connecting a plurality of attenuation units in series, each attenuation unit is formed by two single-pole double-throw switches and an attenuator with a fixed attenuation value, and the numerical control attenuator controls the single-pole double-throw switches through external digital input.
The invention has the beneficial effects that:
the invention carries out the subsection amplitude normalization on the input signal and determines the amplitude of the output signal according to the subsection amplitude normalization, thereby reducing the quantization noise after Delta-Sigma modulation, improving the coding efficiency of Delta-Sigma modulation and reducing the power loss of the power amplifier. The existing method is to perform multi-level Delta-Sigma modulation, and then to realize noise reduction by adding an analog radio frequency device (combiner), thereby improving the coding efficiency to more than 30%. Compared with the prior art, the invention is simpler and more convenient, and has stronger operability.
Drawings
FIG. 1 is a block diagram of a conventional digital radio frequency transmitter based on Delta-sigma modulation;
FIG. 2 is a schematic structural view of the present invention;
fig. 3 is a diagram of the Delta-sigma modulation scheme of the present invention.
Detailed Description
The present invention will be described in further detail with reference to examples and drawings, but the present invention is not limited to these examples.
Examples
As shown in fig. 2 and fig. 3, a digital transmitter based on amplitude control of a digital control attenuator includes a baseband signal processing module, a Delta-sigma modulation module, a digital up-conversion module, a parallel-serial conversion module, an amplitude control module, a power amplifier and a band-pass filter, which are connected in sequence, and finally outputs a signal.
The baseband signal processing module comprises data segmentation and amplitude normalization, wherein an input baseband signal is segmented into N segments, and then normalization operation is performed according to the range of the maximum amplitude value in each segmented signal. In the embodiment, every 100 digital sections, if the maximum amplitude value of the 100 signals is 85, which is in the range of 80 to 90, the amplitude of the section of signal is all divided by 90 for normalization, and then multiplied by 2^ n to become the n-bit wide baseband signal.
The Delta-sigma modulation module is used for converting each normalized segmented multi-bit wide baseband signal into a digital square wave signal with 1-bit width; the specific modulation principle is shown in FIG. 3, wherein
Y(z)＝X(z)+(1+αz-1+z-2)Eq(z) (1)
＝STF(z)X(z)+NTF(z)Eq(z) (2)
The signal transfer function stf (z) is 1, and the noise transfer function ntf (z) is ntf (z) ═ 1+ α z-1+z-2). X5 obtained after quantization is a 1-bit wide output signal, and the conversion of a multi-bit wide baseband signal into a 1-bit wide digital square wave signal is realized.
The digital up-conversion module is used for carrying out frequency conversion operation on the converted digital square wave signal in a digital domain and carrying the signal to FCAt carrier frequency of/N, where FCIs a radio frequency carrier frequency, and N is an integer;
for example, when N is 4, and Delta-sigma is modulated, Z ═ Z is obtainedi+j*ZqAccording to
The format of (A) is subjected to digital up-conversion to reach FCA frequency of/4.
The parallel-serial conversion module is used for converting the N paths of parallel input signals into 1 path of serial output signals, namely the speed of the output signals is N times of that of the input signals;
and a serdes interface is adopted, wherein the serdes interface comprises a serializer which has a parallel-serial conversion function, and the output of the serializer is used as the input of the numerical control attenuator. The serializer converts N paths of parallel digital signals into one path of serial digital signal for outputAnd (6) discharging. If the frequency of the one-way parallel signal is Fcand/N, after parallel-to-serial conversion, the frequency of the serially output signal is N Fc/N＝Fc. For example, suppose FcRepeat 4 times at 4GHz
Then N is 16 and the frequency of the digital intermediate frequency signal is FcAnd the frequency of each path of input signal of the serializer is 250MHz, namely the Delta-sigma modulation frequency is 250 MHz.
The amplitude control module is used for controlling the amplitude of the output signal by adopting a numerical control attenuator so that the amplitude of the output signal corresponds to the peak value of the input signal section;
for example, if the input signal is divided by 100 as a reference, if the amplitude of a section of input signal is all divided by 90 for normalization, the control is performed through the I/O port of the FPGA, so that when the section of input signal is output, the amplitude of the section of input signal is attenuated by 10% by the digitally controlled attenuator. I.e. assuming that the output signal is 1V, it is only 0.9V after passing through the digitally controlled attenuator. By giving different output amplitude values to the signals using different normalization weights, the coding efficiency is improved. The more segments, the better the coding efficiency.
The numerical control attenuator is a single-pole double-throw switch which utilizes an external coding signal to control each stage, and the step or the superposition of attenuation is realized according to requirements. The numerical control attenuator is composed of a plurality of attenuation units which are connected in series, and each attenuation unit is composed of two single-pole double-throw switches and an attenuator with a fixed attenuation value. For each attenuation unit, if the external coding control signal is 1, the signal is straight, if the single-pole double-throw switch is connected with the channel, the signal is connected with the attenuator, and if the external coding control signal is 0, the signal is attenuated by a fixed value.
And the power amplifier amplifies the power of the output signal of which the amplitude is adjusted by the numerical control attenuator.
The band-pass filter filters out the out-of-band noise of the amplified signal through the band-pass filter, and only the lower signal part is reserved.
The above embodiments are preferred embodiments of the present invention, but the present invention is not limited to the above embodiments, and any other changes, modifications, substitutions, combinations, and simplifications which do not depart from the spirit and principle of the present invention should be construed as equivalents thereof, and all such changes, modifications, substitutions, combinations, and simplifications are intended to be included in the scope of the present invention.
Claims (3)
1. A digital transmitter based on numerical control attenuator amplitude control is characterized by comprising baseband signal processing modules which are connected in sequence, wherein the digital transmitter comprises
The data segmentation and amplitude normalization are used for segmenting baseband signals, dividing the baseband signals into N segments with the same data number, performing amplitude normalization according to the maximum amplitude value in each segmented signal, and multiplying the amplitude value by 2^ N to obtain N-bit wide baseband signals;
the Delta-sigma modulation module is used for converting each normalized segmented multi-bit wide baseband signal into a digital square wave signal with 1-bit width;
the digital up-conversion module synthesizes N paths of parallel 1-bit-wide digital square wave signals into one path and inputs the path, carries out frequency conversion operation in a digital domain and carries out frequency conversion on the signals to FCAt carrier frequency of/M, becomes a multi-bit wide signal of 1-way serial output, wherein FCIs a radio frequency carrier frequency, M is an integer;
the parallel-serial conversion module is used for carrying out parallel-serial conversion on the 1-path multi-bit wide signal and then outputting the signal, namely the speed of an output signal of the parallel-serial conversion module is M times of the speed of an input signal of the parallel-serial conversion module;
the amplitude control module is used for controlling the amplitude of the output signal by adopting a numerical control attenuator so that the amplitude of the output signal of the amplitude control module corresponds to the peak value of the N input signal sections;
the output signal of the amplitude control module sequentially passes through a power amplifier and a band-pass filter to obtain the output signal of the digital transmitter;
the numerical control attenuator controls single-pole double-throw switches of all stages by using an external coding signal to realize the stepping or superposition of attenuation as required, the numerical control attenuator is formed by connecting a plurality of attenuation units in series, each attenuation unit consists of two single-pole double-throw switches and an attenuator with a fixed attenuation value, for each attenuation unit, if the external coding control signal is 1, the single-pole double-throw switch is connected with a circuit, the signal is in a straight-through way, and if the external coding control signal is 0, the single-pole double-throw switch is connected with the attenuator, and the signal is attenuated by a fixed value.
2. The digital transmitter based on the amplitude control of the numerical control attenuator according to claim 1, wherein the parallel-to-serial conversion module adopts a serdes interface, and the serdes interface comprises a serializer.
3. The digital transmitter according to claim 1, wherein M in the digital up-conversion module is 4.
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