CN108896132B - Level gauging unit and material level gauge in a kind of RF admittance level meter - Google Patents

Abstract

The invention discloses a material level measuring unit and a material level meter in a radio frequency admittance level meter, the said material level measuring unit comprises: a first measuring electrode, a second measuring electrode and an electrical connection with the first and second measuring electrodes. Connected measurement circuit, the lower ends of the first and second measurement electrodes are inserted into the material container to be measured, and the upper ends are electrically connected to the measurement circuit; the measurement circuit includes: the first frequency selection network, the second frequency selection network, the second Three frequency selection network, excitation signal generation circuit, π/4 phase shift narrow pulse generation circuit, and π/4 phase point amplitude signal acquisition circuit; excitation signal generation circuit generates sine wave excitation signal S1, π/4 phase shift narrow pulse The pulse generation circuit is electrically connected to the output end of the excitation signal generation circuit to receive the excitation signal S1; the π/4 phase shift narrow pulse generation circuit is also electrically connected to the acquisition circuit of the π/4 phase point amplitude signal, and the acquisition circuit receives the narrow pulse signal S4, outputting the amplitude signal S5 of the signal to be measured at the π/4 phase point.

Description

Level measuring unit and level meter in a radio frequency admittance level meter

technical field

The invention relates to the field of material level measurement, in particular to a material level measurement unit in a radio frequency admittance level meter which is based on a T-type frequency selection network to assist value acquisition and eliminate the influence of material hanging.

Background technique

The current contact level meter (level switch) is widely used in the field of industrial production, with various principles and varieties. Among them, level detection devices such as tuning fork level meters, capacitive level meters, radar level meters, and mechanical level meters account for the vast majority of the market share. However, these current contact level meters still have defects in industrial production. When the material to be measured is attached to the surface of the measuring electrode, it will bring errors to the measurement, and cannot be used reliably in the measurement environment for a long time. An important factor that restricts safe production; or the limited scope of application and high cost bring inconvenience to production.

The radio frequency admittance level meter is a new type of level measuring device developed from the capacitive level meter, which is anti-hanging, more reliable, more accurate, and has wider applicability. It is an upgrade of the capacitive level technology. The so-called radio frequency admittance, the meaning of admittance is the reciprocal of impedance in electricity, it is composed of resistive components, capacitive components, and inductive components, and radio frequency is the high-frequency radio spectrum, so radio frequency admittance can be understood as Radio waves measure admittance. When the meter is working, the two electrodes used for sensing (one of the electrodes can be the filling wall) and the measured medium form an admittance value. When the material level changes, the admittance value changes accordingly, and the circuit unit converts the measured admittance value The material level signal is output to realize the material level measurement. The following methods are often used:

1. The MCU performs zero point detection, takes the position between 3π/4 and 7π/4 for chopper integration, and controls the signal through the photoelectric switch; this method has more value points and the operation is more complicated.

2. Use a combination of capacitors and resistors to shift the signal phase by π/4; although this method is simple in circuit, the measurement results are poor. When the material level changes, the capacitance value to be measured changes, causing the phase shift to change accordingly. The error will be larger.

3. Use the MCU to calculate the impedance and capacitive reactance of the capacitive sensor, and use the principle of radio frequency admittance to invert the capacitive reactance of the material to obtain the actual capacitance value; this method is complex to calculate, and there are large unknown errors in the data.

Contents of the invention

In the actual industrial site, there will always be hanging material on the sensing electrode, forming a false level; the attached hanging material part can be regarded as a capacitive resistance network composed of capacitors and resistors. The technical problem to be solved by the invention is: how to truly eliminate the measurement error caused by the material hanging on the measuring electrode when measuring the material level.

According to the radio frequency admittance theory, "when the coating layer is long enough, the real part (resistance R) and the imaginary part (capacitive reactance X) of the equivalent impedance Z brought by the coating layer are equal." In short, the impedance angle formed by the adhered substance is π/4, that is, 45°, and a high-frequency excitation signal (15-400KHz) is applied to both ends of the detection electrode, and at the same time, the level signal at the electrode end is actually measured π/4 The value is taken at the phase point, so that it can theoretically eliminate the false level information generated by the adhered substance on the electrode.

In order to solve the above-mentioned technical problems, the technical scheme adopted in the present invention is: by the circuit that is made up of single-chip microcomputer, select the amplitude value of π/4 phase point in the signal to be measured, carry out A/D conversion by this point amplitude value, obtain Accurate level height. specifically,

The invention provides a level measurement unit in a radio frequency admittance level meter, comprising: a first measurement electrode, a second measurement electrode, and a measurement circuit electrically connected to the first and second measurement electrodes, the first and second measurement electrodes The lower ends of the two measuring electrodes are inserted into the material container whose level is to be measured, and the upper ends are electrically connected to the measuring circuit; wherein,

The first and second measuring electrodes are respectively equivalent to two plates of a capacitor, the material between the first and second measuring electrodes is a dielectric, and the capacitance is measured as the capacitance C to be _measured ;

The measurement circuit includes: a first frequency selection network, a second frequency selection network, a third frequency selection network, an excitation signal generation circuit, a π/4 phase shift narrow pulse generation circuit, and a collection of π/4 phase point amplitude signals circuit;

The first frequency selection network includes a parallel capacitor C1 and an inductor L1, the second frequency selection network includes a parallel capacitor C2 and an inductor L2, and the third frequency selection network includes a parallel capacitor C3 and an inductor L3; The first frequency selection network is electrically connected to the first output end of the excitation signal generation circuit through a resistor R1, and the second frequency selection network is electrically connected to the second output end of the excitation signal generation circuit through a resistance R2. The first end of the third frequency selection network is grounded through a resistor R3; the first frequency selection network is electrically connected to the second frequency selection network through a parallel capacitor C4 and resistor R4, and then a parallel capacitor C5 and resistor R5 ; Assume that the electrical connection between the parallel capacitor C4, the resistor R4 and the parallel capacitor C5 and the resistor R5 is Q1, after the capacitor C to be _measured is connected in parallel with the resistor R0, one end is electrically connected to Q1, and the other end is electrically connected to the The second end of the 3rd frequency-selective network, the electric connection between the capacitor C _measured in parallel, the resistance R0 and the 3rd frequency-selective network is the point to be measured Q0, the acquisition circuit of the π/4 phase point amplitude signal Electrically connected to the point under test Q0, receiving the signal under test S0 drawn from the point under test Q0;

The excitation signal generating circuit is used to generate and output a sine wave excitation signal S1;

The π/4 phase shift narrow pulse generation circuit is electrically connected to the third output end of the excitation signal generation circuit, and receives the sine wave excitation signal S1 from the excitation signal generation circuit; the π/4 phase shift narrow The pulse generation circuit is also electrically connected to the acquisition circuit of the π/4 phase point amplitude signal, and the acquisition circuit of the π/4 phase point amplitude signal receives from the π/4 phase shift narrow pulse generation circuit, and The signal at point Q0 is compared with the narrow pulse signal S4 with a phase shift of π/4, and the amplitude signal S5 of the signal to be measured at the π/4 phase point is output.

On the basis of the above technical solutions, the present invention can also be improved as follows.

Preferably, the π/4 phase shift narrow pulse generation circuit is provided with: digital potentiometer U1, operational amplifier U2, operational amplifier U3, monostable trigger U4, resistors R6-R13, capacitors C6-C10, and the The power supply of the π/4 phase shift narrow pulse generating circuit is a DC power supply Vcc; wherein,

The input terminal of the digital potentiometer U1 is electrically connected to the external single-chip microcomputer, the ground terminal is grounded, the power supply terminal is electrically connected to the power supply Vcc, and the power supply terminal is also grounded through the capacitor C10; the W output terminal of the digital potentiometer U1 is electrically connected to The non-inverting input terminal of the operational amplifier U2 is also electrically connected to the power supply Vcc through the resistor R13, and grounded through the capacitor C9; the L output terminal of the digital potentiometer U1 is grounded;

The inverting input terminal of the operational amplifier U2 is electrically connected to the output terminal of the operational amplifier U2 through a resistor R12; the power supply terminal of the operational amplifier U2 is electrically connected to the power supply Vcc, and the ground terminal is grounded; the output of the operational amplifier U2 terminal is electrically connected to the non-inverting input terminal of the operational amplifier U3 through a resistor R11 and then a resistor R10, wherein the electrical connection between the resistor R11 and the resistor R10 is grounded through a capacitor C8;

The non-inverting input terminal of the operational amplifier U3 is also electrically connected to the output terminal of the operational amplifier U3 through a resistor R7; the inverting input terminal of the operational amplifier U3 is grounded through a resistor R9, and is also electrically connected to the power supply Vcc through a resistor R8, And it is electrically connected to the output terminal of the excitation signal generation circuit through the capacitor C7, and receives the sine wave excitation signal S1 from the excitation signal generation circuit; the power supply terminal of the operational amplifier U3 is electrically connected to the power supply Vcc, and the ground terminal is grounded ; The output terminal of the operational amplifier U3 is electrically connected to the input terminal of the monostable trigger U4;

The Rext terminal of the monostable trigger U4 is electrically connected to the power supply Vcc through the resistor R6, and is also electrically connected to the Cext terminal through the capacitor C6; the output terminal of the monostable trigger U4 is phase shifted compared with the Q0 point signal The narrow pulse signal S4 of π/4 is sent to the acquisition circuit; the power supply terminal of the monostable trigger U4 is electrically connected to the power supply Vcc, and the ground terminal is grounded.

Preferably, the acquisition circuit of the π/4 phase point amplitude signal is provided with: operational amplifier U5, operational amplifier U6, analog switch U7, operational amplifier U8, resistors R14-R21, capacitors C11-C13, and the π The power supply of the acquisition circuit of the /4 phase point amplitude signal is a DC power supply Vcc; wherein,

The non-inverting input end of the operational amplifier U5 is electrically connected to the point to be measured Q0 through a resistor R21, and receives the signal S0 to be measured drawn from the point to be measured Q0; the inverting input end of the operational amplifier U5 is electrically connected to the operational amplifier The output terminal of U5; the power supply terminal of the operational amplifier U5 is electrically connected to the power supply Vcc, and the ground terminal is grounded; the output terminal of the operational amplifier U5 is electrically connected to the non-inverting input of the operational amplifier U6 through the capacitor C13 and the resistor R20 end;

The non-inverting input end of the operational amplifier U6 is also electrically connected to the power supply Vcc through the resistor R18, and grounded through the resistor R19; the inverting input end of the operational amplifier U6 is electrically connected to the output end of the operational amplifier U6 through the resistor R17; The power supply terminal of the operational amplifier U6 is electrically connected to the power supply Vcc, and the ground terminal is grounded; the output terminal of the operational amplifier U6 is electrically connected to the input terminal of the analog switch U7;

The control end of the analog switch U7 is electrically connected to the output end of the monostable trigger U4, and receives a narrow pulse signal S4 with a phase shift of π/4 compared with the Q0 point signal; the normally open output of the analog switch U7 terminal is grounded through the capacitor C12; the power supply terminal of the analog switch U7 is electrically connected to the power supply Vcc, and the ground terminal is grounded; the normally open output terminal of the analog switch U7 is also electrically connected to the non-inverting input terminal of the operational amplifier U8 through the resistor R16 ;

The inverting input terminal of the operational amplifier U8 is electrically connected to the output terminal of the operational amplifier U8 through a parallel resistor R14 and a capacitor C11, and the inverting input terminal of the operational amplifier U8 is also grounded through a resistor R15; the operational amplifier The output terminal of U8 outputs π/4 phase point amplitude signal S5, which is sent to an external microcontroller; the power supply terminal of the operational amplifier U8 is electrically connected to the power supply Vcc, and the ground terminal is grounded.

Preferably, the digital potentiometer U1 is MAX540IEKA-T.

Preferably, the operational amplifiers U2 and/or U8 are TLV2451.

Preferably, the operational amplifiers U3, U5 and/or U6 are OPA835.

Preferably, the monostable flip-flop U4 is SN74LVC1G123.

Preferably, the analog switch U7 is TS5A3160DCUR.

The present invention provides a radio frequency admittance level meter, comprising the above-mentioned level measurement unit, and,

a single-chip microcomputer electrically connected to the level measuring unit;

A housing for accommodating the level measuring unit and the single-chip microcomputer;

A display unit embedded on the surface of the casing and electrically connected to the single chip electromechanical device.

Preferably, the single-chip microcomputer is provided with a communication interface for wired communication with the upper computer, or a communication module for wireless communication with the upper computer.

Compared with the prior art, the present invention has the following technical effects:

1. It can accurately collect the signal data of the measurement point signal at π/4, that is, the 45° phase point, and can effectively eliminate the influence of hanging material on the measurement;

2. The T-type frequency selection network in the measurement circuit filters out the harmonic interference from all directions, conducts the fundamental wave, and selects the required π/4 phase point signal more stably, making the measurement more accurate.

Description of drawings

Fig. 1 is a schematic diagram of the use state of the level measuring unit of the present invention;

Fig. 2 is the circuit structure diagram of the level measuring unit of the present invention;

Fig. 3 is a curve diagram of the relationship between the natural resonance frequency and the amplitude caused by the change of the material level;

Fig. 4 is π/4 phase-shift narrow pulse generation circuit structural diagram of the present invention;

Fig. 5 shows the waveform diagram of narrow pulse signal S4;

Fig. 6 shows the comparison effect diagram of the signal to be measured and the π/4 phase-shifted narrow pulse signal S4;

Fig. 7 is a circuit structure diagram of the acquisition circuit of the π/4 phase point amplitude signal of the present invention.

In the accompanying drawings, the names of the parts represented by each label are listed as follows:

100 Material containers whose level is to be tested

101 First measuring electrode

102 Second measuring electrode

200 measuring circuit

201 The first frequency selection network

202 Second selective frequency network

203 Third frequency selection network

204 excitation signal generating circuit

205 π/4 phase shift narrow pulse generating circuit

206 π/4 Phase Point Amplitude Signal Acquisition Circuit

Detailed ways

The principles and features of the present invention are described below in conjunction with the accompanying drawings, and the examples given are only used to explain the present invention, and are not intended to limit the scope of the present invention.

Please refer to FIG. 1 , which is a schematic diagram of the use state of the level measuring unit of the present invention. The level measurement unit includes: a first measurement electrode 101, a second measurement electrode 102, and a measurement circuit 200 electrically connected to the first and second measurement electrodes, wherein the lower ends of the first and second measurement electrodes are inserted In the material container 100 to be tested, the upper end is electrically connected to the measurement circuit 200; optionally, the second measurement electrode can also be the metal wall of the material container 100;

The level measurement unit of the present invention uses the first and second measurement electrodes to measure the height of the level, which can be equivalent to: the first and second measurement electrodes are respectively two plates of a capacitor, and the first and second measurement The material between the electrodes is the dielectric, and the capacitance is taken as the capacitance C to be _measured . By _measuring the size of C, the height of the material level can be obtained.

Please refer to shown in Fig. 2 again, and it is the circuit structure diagram of the level measuring unit of the present invention; In Fig. 2, the first and second measuring electrodes are represented by the capacitance C to be _measured , because the level of the material will be change, so the capacitance C to be _measured is a variable capacitance; the measurement circuit 200 includes: the first frequency selection network 201, the second frequency selection network 202, the third frequency selection network 203, the excitation signal generation circuit 204, π/ 4 phase shift narrow pulse generation circuit 205, and the acquisition circuit 206 of π/4 phase point amplitude signal, wherein,

The first frequency selection network 201 includes a capacitor C1 and an inductor L1 connected in parallel, the second frequency selection network 202 includes a capacitor C2 and an inductor L2 connected in parallel, and the third frequency selection network 203 includes a capacitor C3 and an inductor L3 connected in parallel ; The first frequency selection network 201 is electrically connected to the first output end of the excitation signal generation circuit 204 via a resistor R1, and the second frequency selection network 202 is electrically connected to the excitation signal generation circuit 204 via a resistor R2 The second output terminal, the first end of the third frequency selection network 203 is grounded through a resistor R3; the first frequency selection network 201 is electrically connected through a parallel capacitor C4 and resistor R4, and then a parallel capacitor C5 and resistor R5. Connect to the second frequency selection network 202; set the electrical connection between the parallel capacitor C4, the resistor R4 and the parallel capacitor C5, the resistor R5 as Q1, after the capacitor C to be _measured is connected in parallel with the resistor R0, one end is electrically connected To Q1, the other end is electrically connected to the second end of the third frequency selection network 203, that is, L3 and C3 are not connected to the terminals of R3, and the electrical connection between the capacitor C _measured in parallel, the resistance R0 and the third frequency selection network is set. The connection is the point to be measured Q0, the acquisition circuit 206 of the π/4 phase point amplitude signal is electrically connected to the point to be measured Q0, and receives the signal to be measured S0 drawn from the point to be measured Q0; three frequency selection networks form T Type frequency selection network structure, its electrical characteristics filter out the harmonics from all directions, conduct the fundamental wave, and help to select the signal for measurement more stably.

What needs to be explained is: the natural resonant frequency of the whole circuit changes with the change of the capacitance to be measured; the amplitude of the signal to be measured changes with the natural resonant frequency of the circuit in a shape similar to a quadratic function, as shown in Figure 3, which is determined by The relationship between the natural resonance frequency and the amplitude of the change caused by the change of material level. It is known that the more materials, the greater the equivalent capacitance, and the relationship between the natural resonance frequency and capacitance is That is, the frequency decreases as the capacitance increases. In order to obtain accurate values and ensure the uniqueness of the results, the part close to linear in Figure 3 is taken as the calculation range of the natural resonance frequency, that is, f1~f2 as shown in Figure 3; in practical applications, it can be based on this frequency range , combined with the size of the material container, that is, the variation range of the capacitance to be measured (for example, 0-45000pF), design the specific sizes of the capacitance, inductance and external resistance in the three frequency selection networks.

Further, the excitation signal generation circuit 204 is used to generate and output the sine wave excitation signal S1, that is, the excitation signal generation circuit is a sine wave generation circuit; the sine wave generation circuit is a common circuit in the art, such as a Wien bridge, a digital A sine wave generator, etc., can all realize the function of generating a sine wave. As an existing technology in this field, those skilled in the art can select according to actual needs, and will not repeat them here.

Further, the π/4 phase shift narrow pulse generation circuit 205 is electrically connected to the third output end of the excitation signal generation circuit 204, and receives the sine wave excitation signal S1 from the excitation signal generation circuit 204; the π The /4 phase shift narrow pulse generation circuit 205 is also electrically connected to the acquisition circuit 206 of the π/4 phase point amplitude signal (hereinafter referred to as the acquisition circuit 206 for short), and the acquisition circuit 206 receives signals from the π/4 phase The narrow pulse signal S4 of the shifted narrow pulse generating circuit 205, compared with the Q0 point signal with a phase shift of π/4; specifically,

Please refer to shown in Fig. 4, Fig. 4 is the structural diagram of the π/4 phase shift narrow pulse generation circuit of the present invention; The described π/4 phase shift narrow pulse generation circuit is provided with: digital potentiometer U1, operational amplifier U2, operation Amplifier U3, monostable trigger U4, resistors R6-R13, capacitors C6-C10, and the power supply of the π/4 phase shift narrow pulse generating circuit is a DC power supply Vcc; wherein,

The input terminal of the digital potentiometer U1 is electrically connected to the external single-chip microcomputer, the ground terminal is grounded, the power supply terminal is electrically connected to the power supply Vcc, and the power supply terminal is also grounded through the capacitor C10; the W output terminal of the digital potentiometer U1 is electrically connected to The non-inverting input terminal of the operational amplifier U2 is also electrically connected to the power supply Vcc through the resistor R13, and grounded through the capacitor C9; the L output terminal of the digital potentiometer U1 is grounded; that is, the digital potentiometer U1 is connected in series with the resistor R13 It is then connected between the power supply and the ground, and the intermediate connection point between the two is electrically connected to the non-inverting input terminal of the operational amplifier U2. The inverting input terminal of the operational amplifier U2 is electrically connected to the output terminal of the operational amplifier U2 through the resistor R12; the power supply terminal of the operational amplifier U2 is electrically connected to the power supply Vcc, and the ground terminal is grounded; forming a voltage follower circuit. The output terminal of the operational amplifier U2 is electrically connected to the non-inverting input terminal of the operational amplifier U3 through the resistor R11 and then the resistor R10, wherein the electrical connection between the resistor R11 and the resistor R10 is grounded through the capacitor C8; The noninverting input terminal of the amplifier U3 is also electrically connected to the output terminal of the operational amplifier U3 through a resistor R7; the inverting input terminal of the operational amplifier U3 is grounded through a resistor R9, and is also electrically connected to the power supply Vcc through a resistor R8, and is connected to the power supply Vcc through a capacitor. C7 is electrically connected to the output end of the excitation signal generation circuit 204, and receives the sine wave excitation signal S1 from the excitation signal generation circuit 204; the power supply terminal of the operational amplifier U3 is electrically connected to the power supply Vcc, and the ground terminal is grounded; The output end of the operational amplifier U3 is electrically connected to the input end of the monostable trigger U4; the Rext terminal of the monostable trigger U4 is electrically connected to the power supply Vcc through a resistor R6, and is also electrically connected to the power supply Vcc through a capacitor C6. Cext terminal, since the pulse signal output by the monostable trigger U4 is used to control the analog switch, the amplitude of the signal to be tested when the phase of the signal to be tested is accurately obtained when the phase of the signal to be tested is π/4 requires a small duty cycle of the pulse signal Ratio, the pulse width can be 100ns, so R6 should be a large resistor, and C6 should be a small capacitor, such as 1kΩ for resistor R6, and 20pF for capacitor C6; the output of the monostable trigger U4 is compared with the Q0 point signal The narrow pulse signal S4 with a phase shift of π/4 is sent to the acquisition circuit 206; the power supply terminal of the monostable flip-flop U4 is electrically connected to the power supply Vcc, and the ground terminal is grounded.

Thus, the MCU inputs the data matching the current capacitance to be measured to the digital potentiometer U1, adjusts the resistance of U1, and then makes the operational amplifier U2 output a reference DC voltage signal that matches the current capacitance to be measured as the operational amplifier U3 The reference voltage; the rectangular wave signal output by U3 is input to the input terminal pin 1 of the monostable trigger U4, and the falling edge of the rectangular wave signal S3 triggers the monostable trigger, so that the monostable trigger output leads Pin output narrow pulse signal; adjust the size of capacitor C6 and resistor R6 connected to pins 6 and 7 of the monostable trigger to change the pulse width, so that the pulse width is about 100ns, and output a narrow pulse at the output pin of the monostable trigger Signal S4, as shown in Figure 5; the obtained narrow pulse signal S4 has a phase difference of π/4 phase shift compared with the signal to be tested, and the comparison effect diagram of the signal to be tested and the π/4 phase shifted narrow pulse signal S4 is shown in Figure 6 shown.

Preferably, the digital potentiometer U1 can be MAX540IEKA-T;

Preferably, the operational amplifier U2 can be TLV2451;

Preferably, the operational amplifier U3 can be OPA835;

Preferably, the monostable flip-flop U4 can be selected from SN74LVC1G123.

Next, please refer to shown in Fig. 7 again, it is the circuit structural diagram of the acquisition circuit of π/4 phase point amplitude signal of the present invention; Described acquisition circuit is provided with: operational amplifier U5, operational amplifier U6, analog switch U7, operational amplifier U8, resistors R14-R21, capacitors C11-C13, and the power supply of the acquisition circuit is a DC power supply Vcc; wherein,

The non-inverting input end of the operational amplifier U5 is electrically connected to the point to be measured Q0 through a resistor R21, and receives the signal S0 to be measured drawn from the point to be measured Q0; the inverting input end of the operational amplifier U5 is electrically connected to the operational amplifier The output terminal of U5; the power supply terminal of the operational amplifier U5 is electrically connected to the power supply Vcc, and the ground terminal is grounded; the output terminal of the operational amplifier U5 is electrically connected to the non-inverting input of the operational amplifier U6 through the capacitor C13 and the resistor R20 terminal, the non-inverting input terminal of the operational amplifier U6 is also electrically connected to the power supply Vcc through the resistor R18, and grounded through the resistor R19; the inverting input terminal of the operational amplifier U6 is electrically connected to the output of the operational amplifier U6 through the resistor R17 terminal; the power supply terminal of the operational amplifier U6 is electrically connected to the power supply Vcc, and the ground terminal is grounded; the output terminal of the operational amplifier U6 is electrically connected to the input terminal of the analog switch U7, and the control terminal of the analog switch U7 is electrically connected To the output end of the monostable trigger U4, receive a narrow pulse signal S4 with a phase shift of π/4 compared with the Q0 point signal; the normally open output end of the analog switch U7 is grounded through a capacitor C12; the analog switch The power supply terminal of U7 is electrically connected to the power supply Vcc, and the ground terminal is grounded; the normally open output terminal of the analog switch U7 is also electrically connected to the non-inverting input terminal of the operational amplifier U8 through a resistor R16; the inverting input terminal of the operational amplifier U8 terminal is electrically connected to the output terminal of the operational amplifier U8 through a parallel resistor R14 and a capacitor C11, and the inverting input terminal of the operational amplifier U8 is also grounded through a resistor R15; the output terminal of the operational amplifier U8 outputs π/4 phase The point amplitude signal S5 is sent to an external microcontroller; the power supply terminal of the operational amplifier U8 is electrically connected to the power supply Vcc, and the ground terminal is grounded.

Therefore, the signal S0 to be tested is input to the pin 3 of the operational amplifier U5 in Fig. 7 as the input of the voltage follower, and the signal S0 to be tested is superimposed with a DC potential after a voltage follower, and then input to the operational amplifier U6 The composed voltage follower is output by the operational amplifier U6 and then input to the input pin 4 of the analog switch U7 as an input signal, and the pin 6 control pin of the analog switch U7 is connected to the narrow pulse signal generated by the monostable trigger U4 S4, the high level control analog switch U7 of the narrow pulse is turned on at the π/4 phase of the signal to be tested every time, so that the signal S0 to be tested charges the capacitor C12 at the π/4 phase every time, maintaining π /4 the magnitude of the phase point. The above is the whole process of data collection, so that the collected data is closer to the real value.

Preferably, OPA835 can be selected for both the operational amplifiers U5 and U6;

Preferably, the analog switch U7 can be selected from TS5A3160DCUR;

Preferably, the operational amplifier U8 can be TLV2451.

Next, the external single-chip microcomputer analyzes and processes the collected π/4 phase point amplitude signal S5; the single-chip microcomputer can also send the analyzed and processed data to the host computer for further data analysis and processing.

In the actual product production, the level measurement unit is combined with an external microcontroller and put into a casing. The surface of the casing can be embedded with a display unit electrically connected to the microcontroller. After the microcontroller performs data analysis and processing, the results are displayed Presented on the display unit; if you want to make the operation more humanized, you can also configure the necessary switch buttons, etc.

The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included in the protection of the present invention. within range.

Claims (10)

1. A level measurement unit in a radio frequency admittance level meter, comprising: a first measurement electrode, a second measurement electrode and a measurement circuit electrically connected to the first and second measurement electrodes, the first and second measurement electrodes The lower ends of the measuring electrodes are all inserted into the material container whose level is to be measured, and the upper ends are electrically connected to the measuring circuit; wherein, the first and second measuring electrodes are respectively equivalent to two plates of a capacitor, the first, The material between the second measuring electrodes is a dielectric, and the capacitance is measured as the capacitance C to be _measured ; it is characterized in that, The measurement circuit includes: a first frequency selection network, a second frequency selection network, a third frequency selection network, an excitation signal generation circuit, a π/4 phase shift narrow pulse generation circuit, and a collection of π/4 phase point amplitude signals circuit; The first frequency selection network includes a parallel capacitor C1 and an inductor L1, the second frequency selection network includes a parallel capacitor C2 and an inductor L2, and the third frequency selection network includes a parallel capacitor C3 and an inductor L3; The first frequency selection network is electrically connected to the first output end of the excitation signal generation circuit through a resistor R1, and the second frequency selection network is electrically connected to the second output end of the excitation signal generation circuit through a resistance R2. The first end of the third frequency selection network is grounded through a resistor R3; the first frequency selection network is electrically connected to the second frequency selection network through a parallel capacitor C4 and resistor R4, and then a parallel capacitor C5 and resistor R5 ; Assume that the electrical connection between the parallel capacitor C4, the resistor R4 and the parallel capacitor C5 and the resistor R5 is Q1, after the capacitor C to be _measured is connected in parallel with the resistor R0, one end is electrically connected to Q1, and the other end is electrically connected to the The second end of the 3rd frequency-selective network, the electric connection between the capacitor C _measured in parallel, the resistance R0 and the 3rd frequency-selective network is the point to be measured Q0, the acquisition circuit of the π/4 phase point amplitude signal Electrically connected to the point under test Q0, receiving the signal under test S0 drawn from the point under test Q0; The excitation signal generating circuit is used to generate and output a sine wave excitation signal S1; The π/4 phase shift narrow pulse generation circuit is electrically connected to the third output end of the excitation signal generation circuit, and receives the sine wave excitation signal S1 from the excitation signal generation circuit; the π/4 phase shift narrow The pulse generation circuit is also electrically connected to the acquisition circuit of the π/4 phase point amplitude signal, and the acquisition circuit of the π/4 phase point amplitude signal receives from the π/4 phase shift narrow pulse generation circuit, and The signal at point Q0 is compared with the narrow pulse signal S4 with a phase shift of π/4, and the amplitude signal S5 of the signal to be measured at the π/4 phase point is output. 2. The level measuring unit according to claim 1, characterized in that, the π/4 phase shift narrow pulse generation circuit is provided with: digital potentiometer U1, operational amplifier U2, operational amplifier U3, monostable trigger U4, resistors R6-R13, capacitors C6-C10, and the power supply of the π/4 phase shift narrow pulse generating circuit is a DC power supply Vcc; wherein, The input terminal of the digital potentiometer U1 is electrically connected to the external single-chip microcomputer, the ground terminal is grounded, the power supply terminal is electrically connected to the power supply Vcc, and the power supply terminal is also grounded through the capacitor C10; the W output terminal of the digital potentiometer U1 is electrically connected to The non-inverting input terminal of the operational amplifier U2 is also electrically connected to the power supply Vcc through the resistor R13, and grounded through the capacitor C9; the L output terminal of the digital potentiometer U1 is grounded; The inverting input terminal of the operational amplifier U2 is electrically connected to the output terminal of the operational amplifier U2 through a resistor R12; the power supply terminal of the operational amplifier U2 is electrically connected to the power supply Vcc, and the ground terminal is grounded; the output of the operational amplifier U2 terminal is electrically connected to the non-inverting input terminal of the operational amplifier U3 through a resistor R11 and then a resistor R10, wherein the electrical connection between the resistor R11 and the resistor R10 is grounded through a capacitor C8; The non-inverting input terminal of the operational amplifier U3 is also electrically connected to the output terminal of the operational amplifier U3 through a resistor R7; the inverting input terminal of the operational amplifier U3 is grounded through a resistor R9, and is also electrically connected to the power supply Vcc through a resistor R8, And it is electrically connected to the output terminal of the excitation signal generation circuit through the capacitor C7, and receives the sine wave excitation signal S1 from the excitation signal generation circuit; the power supply terminal of the operational amplifier U3 is electrically connected to the power supply Vcc, and the ground terminal is grounded ; The output terminal of the operational amplifier U3 is electrically connected to the input terminal of the monostable trigger U4; The Rext terminal of the monostable trigger U4 is electrically connected to the power supply Vcc through the resistor R6, and is also electrically connected to the Cext terminal through the capacitor C6; the output terminal of the monostable trigger U4 is phase shifted compared with the Q0 point signal The narrow pulse signal S4 of π/4 is sent to the acquisition circuit; the power supply terminal of the monostable trigger U4 is electrically connected to the power supply Vcc, and the ground terminal is grounded. 3. The level measuring unit according to claim 1 or 2, characterized in that, the acquisition circuit of the π/4 phase point amplitude signal is provided with: operational amplifier U5, operational amplifier U6, analog switch U7, computing Amplifier U8, resistors R14-R21, capacitors C11-C13, and the power supply of the acquisition circuit of the π/4 phase point amplitude signal is a DC power supply Vcc; wherein, The non-inverting input end of the operational amplifier U5 is electrically connected to the point to be measured Q0 through a resistor R21, and receives the signal S0 to be measured drawn from the point to be measured Q0; the inverting input end of the operational amplifier U5 is electrically connected to the operational amplifier The output terminal of U5; the power supply terminal of the operational amplifier U5 is electrically connected to the power supply Vcc, and the ground terminal is grounded; the output terminal of the operational amplifier U5 is electrically connected to the non-inverting input of the operational amplifier U6 through the capacitor C13 and the resistor R20 end; The non-inverting input end of the operational amplifier U6 is also electrically connected to the power supply Vcc through the resistor R18, and grounded through the resistor R19; the inverting input end of the operational amplifier U6 is electrically connected to the output end of the operational amplifier U6 through the resistor R17; The power supply terminal of the operational amplifier U6 is electrically connected to the power supply Vcc, and the ground terminal is grounded; the output terminal of the operational amplifier U6 is electrically connected to the input terminal of the analog switch U7; The control end of the analog switch U7 is electrically connected to the output end of the monostable trigger U4, and receives a narrow pulse signal S4 with a phase shift of π/4 compared with the Q0 point signal; the normally open output of the analog switch U7 terminal is grounded through the capacitor C12; the power supply terminal of the analog switch U7 is electrically connected to the power supply Vcc, and the ground terminal is grounded; the normally open output terminal of the analog switch U7 is also electrically connected to the non-inverting input terminal of the operational amplifier U8 through the resistor R16 ; The inverting input terminal of the operational amplifier U8 is electrically connected to the output terminal of the operational amplifier U8 through a parallel resistor R14 and a capacitor C11, and the inverting input terminal of the operational amplifier U8 is also grounded through a resistor R15; the operational amplifier The output terminal of U8 outputs π/4 phase point amplitude signal S5, which is sent to an external microcontroller; the power terminal of the operational amplifier U8 is electrically connected to the power supply Vcc, and the ground terminal is grounded. 4. The level measuring unit according to claim 2, wherein the digital potentiometer U1 is a MAX540IEKA-T. 5. The level measuring unit according to claim 2, characterized in that, the operational amplifiers U2 and/or U8 are TLV2451. 6. The level measuring unit according to claim 2, characterized in that, the operational amplifiers U3, U5 and/or U6 are OPA835. 7. The level measuring unit according to claim 2, wherein the monostable flip-flop U4 is SN74LVC1G123. 8. The level measuring unit according to claim 3, characterized in that, the analog switch U7 is TS5A3160DCUR. 9. A radio frequency admittance level meter, characterized in that it comprises the level measurement unit according to any one of claims 1 to 8, and, a single-chip microcomputer electrically connected to the level measuring unit; A housing for accommodating the level measuring unit and the single-chip microcomputer; A display unit embedded on the surface of the casing and electrically connected to the single chip electromechanical device. 10 . The radio frequency admittance level meter according to claim 9 , wherein the single-chip microcomputer is provided with a communication interface for wired communication with the host computer, or a communication module for wireless communication with the host computer. 11 .