CN108896132B - Level gauging unit and material level gauge in a kind of RF admittance level meter - Google Patents
Level gauging unit and material level gauge in a kind of RF admittance level meter Download PDFInfo
- Publication number
- CN108896132B CN108896132B CN201810431138.5A CN201810431138A CN108896132B CN 108896132 B CN108896132 B CN 108896132B CN 201810431138 A CN201810431138 A CN 201810431138A CN 108896132 B CN108896132 B CN 108896132B
- Authority
- CN
- China
- Prior art keywords
- electrically connected
- operational amplifier
- resistor
- capacitor
- power supply
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000000463 material Substances 0.000 title claims abstract description 39
- 230000010363 phase shift Effects 0.000 claims abstract description 27
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims abstract description 5
- 239000003990 capacitor Substances 0.000 claims description 75
- 230000005284 excitation Effects 0.000 claims description 36
- 238000005259 measurement Methods 0.000 claims description 14
- 238000004891 communication Methods 0.000 claims description 8
- 238000002360 preparation method Methods 0.000 claims 1
- 238000005086 pumping Methods 0.000 abstract 4
- 238000010586 diagram Methods 0.000 description 7
- 238000000034 method Methods 0.000 description 7
- 238000001514 detection method Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000004364 calculation method Methods 0.000 description 2
- 238000009776 industrial production Methods 0.000 description 2
- 239000002904 solvent Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000007405 data analysis Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000012887 quadratic function Methods 0.000 description 1
- 238000001228 spectrum Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01F—MEASURING VOLUME, VOLUME FLOW, MASS FLOW OR LIQUID LEVEL; METERING BY VOLUME
- G01F23/00—Indicating or measuring liquid level or level of fluent solid material, e.g. indicating in terms of volume or indicating by means of an alarm
- G01F23/22—Indicating or measuring liquid level or level of fluent solid material, e.g. indicating in terms of volume or indicating by means of an alarm by measuring physical variables, other than linear dimensions, pressure or weight, dependent on the level to be measured, e.g. by difference of heat transfer of steam or water
- G01F23/26—Indicating or measuring liquid level or level of fluent solid material, e.g. indicating in terms of volume or indicating by means of an alarm by measuring physical variables, other than linear dimensions, pressure or weight, dependent on the level to be measured, e.g. by difference of heat transfer of steam or water by measuring variations of capacity or inductance of capacitors or inductors arising from the presence of liquid or fluent solid material in the electric or electromagnetic fields
- G01F23/263—Indicating or measuring liquid level or level of fluent solid material, e.g. indicating in terms of volume or indicating by means of an alarm by measuring physical variables, other than linear dimensions, pressure or weight, dependent on the level to be measured, e.g. by difference of heat transfer of steam or water by measuring variations of capacity or inductance of capacitors or inductors arising from the presence of liquid or fluent solid material in the electric or electromagnetic fields by measuring variations in capacitance of capacitors
- G01F23/266—Indicating or measuring liquid level or level of fluent solid material, e.g. indicating in terms of volume or indicating by means of an alarm by measuring physical variables, other than linear dimensions, pressure or weight, dependent on the level to be measured, e.g. by difference of heat transfer of steam or water by measuring variations of capacity or inductance of capacitors or inductors arising from the presence of liquid or fluent solid material in the electric or electromagnetic fields by measuring variations in capacitance of capacitors measuring circuits therefor
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Thermal Sciences (AREA)
- Fluid Mechanics (AREA)
- General Physics & Mathematics (AREA)
- Measurement Of Resistance Or Impedance (AREA)
Abstract
The invention discloses the level gauging units and material level gauge in a kind of RF admittance level meter, the level gauging unit includes: the first measuring electrode, the second measuring electrode and the measuring circuit being electrically connected with the first, second measuring electrode, the lower end of first, second measuring electrode is all inserted into level material container to be measured, and upper end is electrically connected to measuring circuit；Measuring circuit includes: the Acquisition Circuit of the first frequency-selective network, the second frequency-selective network, third frequency-selective network, pumping signal generation circuit, the phase shift of π/4 narrow-pulse generation circuit and the phase point amplitude signal of π/4；Pumping signal generation circuit generates sine wave exciting signal S1, and the phase shift narrow-pulse generation circuit of π/4 is electrically connected to the output end of pumping signal generation circuit, receives pumping signal S1；The phase shift narrow-pulse generation circuit of π/4 is also electrically connected to the Acquisition Circuit of the phase point amplitude signal of π/4, and Acquisition Circuit receives narrow pulse signal S4, amplitude signal S5 of the output measured signal in the phase point of π/4.
Description
Technical Field
The invention relates to the field of material level measurement, in particular to a material level measurement unit in a radio frequency admittance material level instrument based on auxiliary value taking of a T-shaped frequency selection network for eliminating the influence of hanging materials.
Background
The existing contact type level meter (level switch) is widely applied to the field of industrial production, and has various principles and various varieties. Among them, level detection devices such as a tuning fork level gauge, a capacitive level gauge, a radar level gauge, and a mechanical level gauge occupy most of market shares. However, these current contact level meters still have defects in industrial production, and when the measured material is attached to the surface of the measuring electrode, errors are brought to measurement, and the contact level meters cannot be reliably used in a measuring environment for a long time, so that the contact level meters become an important factor for restricting safe production; or the application range is limited, the cost is high, and inconvenience is brought to production.
The radio frequency admittance type level meter is a novel level measuring device which is developed from a capacitance type level meter, is more reliable, more accurate and has wider applicability, and is an upgrade of capacitance type level technology. By admittance, the meaning of admittance is the inverse of the impedance in the electrical system, which is a combination of resistive, capacitive and inductive components, whereas radio frequency, i.e. the high frequency radio spectrum, is understood to mean that the admittance is measured by high frequency radio waves. When the instrument works, two electrodes (one of the electrodes can be a filling wall) used for sensing of the instrument and a measured medium form an admittance value, when the material level changes, the admittance value changes correspondingly, and the circuit unit converts the measured admittance value into a material level signal to be output, so that the material level measurement is realized. The following methods are commonly used:
1. the MCU carries out zero point detection, chopping integration is carried out between 3 pi/4 and 7 pi/4 positions, and signals are controlled through the photoelectric switch; the method has more value points and more complex operation.
2. The combination of capacitance and resistance is used to make the signal phase shift pi/4 value; although the circuit is simple, the method has poor measurement results, and the capacitance value to be measured changes when the material level changes, so that the phase shift changes along with the change of the capacitance value, and the measurement error is larger.
3. Calculating impedance and capacitive reactance of the capacitive sensor by using the MCU, and reversely pushing the hanging material capacitive reactance by using a radio frequency admittance principle to obtain an actual capacitance value; the method is complex in calculation, and large unknown errors exist in data.
Disclosure of Invention
In an actual industrial field, hanging materials are always adhered to a sensing electrode to form a false material level; the adhered hanging material part can be regarded as a capacitance-resistance network formed by capacitance and resistance. The technical problem to be solved by the invention is as follows: the measuring error caused by the hanging of the material on the measuring electrode is really eliminated when the material level is measured.
The theory of radio frequency admittance states that "the real part (resistance R) and the imaginary part (capacitive reactance X) of the equivalent impedance Z brought by the hang-up layer are equal when the hang-up layer is sufficiently long". In short, the impedance angle formed by the adhered substances is pi/4, namely 45 degrees, a high-frequency excitation signal (15-400KHz) is added at two ends of the detection electrode, and meanwhile, the value is taken at the pi/4 phase point of the material level signal at the actually measured electrode end, so that the false material level information generated on the electrode due to the adhered substances can be theoretically eliminated.
In order to solve the technical problems, the technical scheme adopted by the invention is as follows: the amplitude of a pi/4 phase point in a signal to be detected is selected through a circuit consisting of a single chip microcomputer, and the accurate material level height is obtained through A/D conversion of the amplitude of the point. In particular, the amount of the solvent to be used,
the invention provides a level measuring unit in a radio frequency admittance level meter, comprising: the measuring device comprises a first measuring electrode, a second measuring electrode and a measuring circuit electrically connected with the first measuring electrode and the second measuring electrode, wherein the lower ends of the first measuring electrode and the second measuring electrode are both inserted into a material container to be measured by a material level, and the upper ends of the first measuring electrode and the second measuring electrode are electrically connected with the measuring circuit; wherein,
the first and second measuring electrodes are equivalent to two electrode plates of a capacitor respectively, the material between the first and second measuring electrodes is dielectric medium, and the capacitor is used as capacitor C to be measuredMeasuring；
The measurement circuit includes: the device comprises a first frequency selection network, a second frequency selection network, a third frequency selection network, an excitation signal generation circuit, a pi/4 phase shift narrow pulse generation circuit and a pi/4 phase point amplitude signal acquisition circuit;
the first frequency-selecting network comprises a capacitor C1 and an inductor L1 which are connected in parallel, the second frequency-selecting network comprises a capacitor C2 and an inductor L2 which are connected in parallel, and the third frequency-selecting network comprises a capacitor C3 and an inductor L3 which are connected in parallel; the first frequency-selecting network is electrically connected to the first output end of the excitation signal generating circuit through a resistor R1, the second frequency-selecting network is electrically connected to the second output end of the excitation signal generating circuit through a resistor R2, and the first end of the third frequency-selecting network is grounded through a resistor R3; the first frequency-selecting network is electrically connected to the second frequency-selecting network through a capacitor C4 and a resistor R4 which are connected in parallel, and then through a capacitor C5 and a resistor R5 which are connected in parallel; the electric connection position between the capacitor C4 and the resistor R4 which are connected in parallel and the capacitor C5 and the resistor R5 which are connected in parallel is set as Q1, and the capacitor C to be tested is set asMeasuringA capacitor C connected in parallel with the resistor R0 and having one end electrically connected to Q1 and the other end electrically connected to the second end of the third frequency-selecting networkMeasuringThe electric connection part between the resistor R0 and the third frequency-selective network is a point Q0 to be measured, the acquiring circuit of the pi/4 phase point amplitude signal is electrically connected to the point Q0 to be measured, and receives a signal S0 to be measured led out from the point Q0 to be measured;
the excitation signal generating circuit is used for generating and outputting a sine wave excitation signal S1;
the pi/4 phase shift narrow pulse generating circuit is electrically connected to the third output end of the excitation signal generating circuit and receives a sine wave excitation signal S1 sent by the excitation signal generating circuit; the pi/4 phase shift narrow pulse generating circuit is also electrically connected to an acquisition circuit of the pi/4 phase point amplitude signal, the acquisition circuit of the pi/4 phase point amplitude signal receives a narrow pulse signal S4 which is from the pi/4 phase shift narrow pulse generating circuit and is shifted by pi/4 compared with a signal at a point Q0, and an amplitude signal S5 of a signal to be detected at the pi/4 phase point is output.
On the basis of the technical scheme, the invention can be further improved as follows.
Preferably, the pi/4 phase shift narrow pulse generating circuit is provided with: the circuit comprises a digital potentiometer U1, an operational amplifier U2, an operational amplifier U3, a monostable trigger U4, resistors R6-R13 and capacitors C6-C10, wherein a power supply of the pi/4 phase-shift narrow pulse generating circuit is a direct-current power supply Vcc; wherein,
the input end of the digital potentiometer U1 is electrically connected to an external singlechip, the grounding end is grounded, the power supply end is electrically connected to a power supply Vcc, and the power supply end is grounded through a capacitor C10; the W output end of the digital potentiometer U1 is electrically connected to the non-inverting input end of the operational amplifier U2, and the W output end is also electrically connected to a power supply Vcc through a resistor R13 and is grounded through a capacitor C9; the L output end of the digital potentiometer U1 is grounded;
the inverting input end of the operational amplifier U2 is electrically connected to the output end of the operational amplifier U2 through a resistor R12; the power end of the operational amplifier U2 is electrically connected to a power supply Vcc, and the grounding end is grounded; the output end of the operational amplifier U2 is electrically connected to the non-inverting input end of the operational amplifier U3 through a resistor R11 and a resistor R10, wherein the electric connection between the resistor R11 and the resistor R10 is grounded through a capacitor C8;
the non-inverting input end of the operational amplifier U3 is also electrically connected to the output end of the operational amplifier U3 through a resistor R7; the inverting input end of the operational amplifier U3 is grounded through a resistor R9, is also electrically connected to a power supply Vcc through a resistor R8, is electrically connected to the output end of the excitation signal generating circuit through a capacitor C7, and receives a sine wave excitation signal S1 sent by the excitation signal generating circuit; the power end of the operational amplifier U3 is electrically connected to a power supply Vcc, and the grounding end is grounded; the output end of the operational amplifier U3 is electrically connected to the input end of the monostable trigger U4;
the Rext terminal of the monostable flip-flop U4 is electrically connected to the power supply Vcc through a resistor R6 and also to the Cext terminal through a capacitor C6; the output end of the monostable trigger U4 outputs a narrow pulse signal S4 which is phase-shifted by pi/4 compared with a signal at a point Q0 to the acquisition circuit; the power supply end of the monostable trigger U4 is electrically connected to the power supply Vcc, and the ground end is grounded.
Preferably, the collecting circuit of the pi/4 phase point amplitude signal is provided with: the analog-digital converter comprises an operational amplifier U5, an operational amplifier U6, an analog switch U7, an operational amplifier U8, resistors R14-R21 and capacitors C11-C13, wherein a power supply of the pi/4 phase point amplitude signal acquisition circuit is a direct-current power supply Vcc; wherein,
the non-inverting input end of the operational amplifier U5 is electrically connected to the point Q0 to be tested through a resistor R21 and receives a signal S0 to be tested, which is led out from the point Q0 to be tested; the inverting input of the operational amplifier U5 is electrically connected to the output of the operational amplifier U5; the power end of the operational amplifier U5 is electrically connected to a power supply Vcc, and the grounding end is grounded; the output end of the operational amplifier U5 is electrically connected to the non-inverting input end of the operational amplifier U6 through a capacitor C13 and a resistor R20;
the non-inverting input terminal of the operational amplifier U6 is also electrically connected to the power supply Vcc through a resistor R18 and grounded through a resistor R19; the inverting input end of the operational amplifier U6 is electrically connected to the output end of the operational amplifier U6 through a resistor R17; the power end of the operational amplifier U6 is electrically connected to a power supply Vcc, and the grounding end is grounded; the output end of the operational amplifier U6 is electrically connected to the input end of the analog switch U7;
the control end of the analog switch U7 is electrically connected to the output end of the monostable trigger U4 and receives a narrow pulse signal S4 which is shifted by pi/4 compared with a signal at the point Q0; the normally-open output end of the analog switch U7 is grounded through a capacitor C12; the power end of the analog switch U7 is electrically connected to a power supply Vcc, and the grounding end is grounded; the normally-open output end of the analog switch U7 is also electrically connected to the non-inverting input end of the operational amplifier U8 through a resistor R16;
the inverting input end of the operational amplifier U8 is electrically connected to the output end of the operational amplifier U8 through a resistor R14 and a capacitor C11 which are connected in parallel, and the inverting input end of the operational amplifier U8 is also grounded through a resistor R15; the output end of the operational amplifier U8 outputs a pi/4 phase point amplitude signal S5 to be sent to an external singlechip; the power supply end of the operational amplifier U8 is electrically connected to the power supply Vcc, and the ground end is grounded.
Preferably, the digital potentiometer U1 is MAX540 IEKA-T.
Preferably, the operational amplifier U2 and/or U8 is TLV 2451.
Preferably, the operational amplifier U3, U5, and/or U6 is OPA 835.
Preferably, the monostable flip-flop U4 is SN74LVC1G 123.
Preferably, the analog switch U7 is TS5a3160 DCUR.
The invention provides a radio frequency admittance level meter, which comprises the level measuring unit and a level sensor,
the single chip microcomputer is electrically connected with the material level measuring unit;
the shell is used for accommodating the level measuring unit and the single chip microcomputer;
and the display unit is embedded on the surface of the shell and electrically connected with the single chip microcomputer.
Preferably, the single chip microcomputer is provided with a communication interface for performing wired communication with an upper computer or a communication module for performing wireless communication with the upper computer.
Compared with the prior art, the invention has the following technical effects:
1. the device can accurately acquire signal data of a measuring point signal at a phase point of pi/4, namely 45 degrees, and can effectively eliminate the influence of hanging materials on measurement;
2. the T-shaped frequency-selecting network in the measuring circuit filters out the interference of harmonic waves from all directions, conducts the fundamental waves, and more stably selects signals of required pi/4 phase points, so that the measurement is more accurate.
Drawings
FIG. 1 is a schematic view of a fill level gauging unit according to the present invention in use;
FIG. 2 is a circuit block diagram of the level gauging unit according to the present invention;
FIG. 3 is a graph of natural resonant frequency versus amplitude for changes caused by level changes;
FIG. 4 is a schematic diagram of the circuit for generating the narrow pulse with pi/4 phase shift according to the present invention;
fig. 5 is a waveform diagram showing the narrow pulse signal S4;
FIG. 6 is a graph showing the effect of comparing the signal to be measured with the pi/4 phase-shifted narrow pulse signal S4;
FIG. 7 is a circuit diagram of the circuit for acquiring the pi/4 phase point amplitude signal according to the present invention.
In the drawings, the parts names represented by the respective reference numerals are listed as follows:
material container with 100 material level to be measured
101 first measuring electrode
102 second measuring electrode
200 measurement circuit
201 first frequency selective network
202 second frequency selective network
203 third frequency selective network
204 excitation signal generating circuit
205 pi/4 phase shift narrow pulse generating circuit
Acquisition circuit of 206 pi/4 phase point amplitude signal
Detailed Description
The principles and features of this invention are described below in conjunction with the following drawings, which are set forth by way of illustration only and are not intended to limit the scope of the invention.
FIG. 1 is a schematic view of a fill level gauge according to the present invention in a usage state. The level gauging cell comprises: a first measuring electrode 101, a second measuring electrode 102 and a measuring circuit 200 electrically connected to the first and second measuring electrodes, wherein the lower ends of the first and second measuring electrodes are inserted into a material container 100 to be measured, and the upper ends are electrically connected to the measuring circuit 200; alternatively, the second measuring electrode may also be a metal wall of the material container 100;
the level measuring unit of the present invention measures the level of the level using the first and second measuring electrodes, which is equivalent to: the first and second measuring electrodes are two plates of a capacitor, the material between the first and second measuring electrodes is dielectric medium, and the capacitor is used as capacitor C to be measuredMeasuringBy measuring CMeasuringAnd then the height of the material level is obtained.
Referring to FIG. 2, it is a circuit diagram of the level measuring unit according to the present invention; in FIG. 2, a capacitor C to be measured is usedMeasuringTo show the first and second measuring electrodes, the capacitance C to be measured is due to the variable material levelMeasuringIs a variable capacitance; the measurement circuit 200 includes: a first frequency-selective network 201, a second frequency-selective network 202, a third frequency-selective network 203, an excitation signal generating circuit 204, a pi/4 phase-shifted narrow pulse generating circuit 205, and a pi/4 phase point amplitude signal collecting circuit 206, wherein,
the first frequency-selecting network 201 comprises a capacitor C1 and an inductor L1 which are connected in parallel, the second frequency-selecting network 202 comprises a capacitor C2 and an inductor L2 which are connected in parallel, and the third frequency-selecting network 203 comprises a capacitor C3 and an inductor L3 which are connected in parallel; the first frequency-selecting network 201 is electrically connected to the first output terminal of the excitation signal generating circuit 204 through a resistor R1, the second frequency-selecting network 202 is electrically connected to the second output terminal of the excitation signal generating circuit 204 through a resistor R2, and the first terminal of the third frequency-selecting network 203 is grounded through a resistor R3; the first frequency-selecting network 201 is electrically connected to the second frequency-selecting network 202 through a capacitor C4 and a resistor R4 which are connected in parallel, and then through a capacitor C5 and a resistor R5 which are connected in parallel; the electric connection position between the capacitor C4 and the resistor R4 which are connected in parallel and the capacitor C5 and the resistor R5 which are connected in parallel is set as Q1, and the capacitor C to be tested is set asMeasuringAfter being connected with the resistor R0 in parallel, one end is electrically connected to Q1, the other end is electrically connected to the second end of the third frequency-selecting network 203, namely L3 and C3 are not connected with the terminals of R3, and a capacitor C is arranged in parallelMeasuringThe electric connection part between the resistor R0 and the third frequency-selective network is a point Q0 to be measured, the acquiring circuit 206 of the pi/4 phase point amplitude signal is electrically connected to the point Q0 to be measured and receives the signal from the point Q0 to be measuredLeading out a signal to be tested S0; the three frequency-selecting networks form a T-shaped frequency-selecting network structure, the electrical characteristics of the T-shaped frequency-selecting network structure filter out harmonic waves from all directions, the fundamental waves are conducted, and signals for measurement can be selected more stably.
It should be noted that: the natural resonant frequency of the whole circuit changes along with the change of the capacitance to be measured; the amplitude of the signal to be measured changes with the natural resonant frequency of the circuit in a shape similar to a quadratic function, as shown in fig. 3, which is a graph of the natural resonant frequency and amplitude of the change caused by the level change. The more materials are known, the larger the equivalent capacitance is, and the relationship between the natural resonant frequency and the capacitance isI.e. the frequency decreases with increasing capacitance. In order to obtain accurate values and ensure the uniqueness of results, the part close to linearity in fig. 3 is taken as the calculation range of the natural resonant frequency values, namely f 1-f 2 shown in fig. 3; in practical application, the specific sizes of the capacitor, the inductor and the external resistor in the three frequency-selecting networks can be designed according to the frequency range and by combining the size of the material container, namely the variation range (such as 0-45000 pF) of the capacitor to be measured.
Further, the excitation signal generating circuit 204 is configured to generate and output a sine wave excitation signal S1, that is, the excitation signal generating circuit is a sine wave generating circuit; the sine wave generating circuit is a circuit commonly found in the art, such as a venturi bridge, a digital sine wave generator, etc., and can generate a sine wave.
Further, the pi/4 phase shift narrow pulse generating circuit 205 is electrically connected to the third output terminal of the excitation signal generating circuit 204, and receives the sine wave excitation signal S1 sent from the excitation signal generating circuit 204; the pi/4 phase shift narrow pulse generation circuit 205 is further electrically connected to an acquisition circuit 206 (hereinafter, both are simply referred to as acquisition circuit 206) of the pi/4 phase point amplitude signal, and the acquisition circuit 206 receives a narrow pulse signal S4 which is phase-shifted by pi/4 compared with a signal at Q0 from the pi/4 phase shift narrow pulse generation circuit 205; in particular, the amount of the solvent to be used,
referring to FIG. 4, FIG. 4 is a schematic diagram of a pi/4 phase shift narrow pulse generation circuit according to the present invention; the pi/4 phase shift narrow pulse generating circuit is provided with: the circuit comprises a digital potentiometer U1, an operational amplifier U2, an operational amplifier U3, a monostable trigger U4, resistors R6-R13 and capacitors C6-C10, wherein a power supply of the pi/4 phase-shift narrow pulse generating circuit is a direct-current power supply Vcc; wherein,
the input end of the digital potentiometer U1 is electrically connected to an external singlechip, the grounding end is grounded, the power supply end is electrically connected to a power supply Vcc, and the power supply end is grounded through a capacitor C10; the W output end of the digital potentiometer U1 is electrically connected to the non-inverting input end of the operational amplifier U2, and the W output end is also electrically connected to a power supply Vcc through a resistor R13 and is grounded through a capacitor C9; the L output end of the digital potentiometer U1 is grounded; namely, the digital potentiometer U1 is connected in series with the resistor R13 and then connected between the power supply and the ground, and the middle connection point of the two is electrically connected to the non-inverting input end of the operational amplifier U2. The inverting input end of the operational amplifier U2 is electrically connected to the output end of the operational amplifier U2 through a resistor R12; the power end of the operational amplifier U2 is electrically connected to a power supply Vcc, and the grounding end is grounded; forming a voltage follower circuit. The output end of the operational amplifier U2 is electrically connected to the non-inverting input end of the operational amplifier U3 through a resistor R11 and a resistor R10, wherein the electric connection between the resistor R11 and the resistor R10 is grounded through a capacitor C8; the non-inverting input end of the operational amplifier U3 is also electrically connected to the output end of the operational amplifier U3 through a resistor R7; the inverting input terminal of the operational amplifier U3 is grounded via the resistor R9, is electrically connected to the power supply Vcc via the resistor R8, is electrically connected to the output terminal of the excitation signal generating circuit 204 via the capacitor C7, and receives the sine wave excitation signal S1 sent from the excitation signal generating circuit 204; the power end of the operational amplifier U3 is electrically connected to a power supply Vcc, and the grounding end is grounded; the output end of the operational amplifier U3 is electrically connected to the input end of the monostable trigger U4; the Rext terminal of the monostable trigger U4 is electrically connected to a power supply Vcc through a resistor R6 and is also electrically connected to a Cext terminal through a capacitor C6, and because a pulse signal output by the monostable trigger U4 is used for controlling an analog switch, the amplitude of a signal to be detected when the phase of the signal to be detected is pi/4 is accurately obtained, the pulse signal is required to have a smaller duty ratio, and the pulse width can be 100ns, so that R6 is a large resistor, C6 is a small capacitor, for example, a resistor R6 is 1k omega, and a capacitor C6 is 20 pF; the output end of the monostable flip-flop U4 outputs a narrow pulse signal S4 which is phase-shifted by pi/4 compared with a signal at the point Q0 to the acquisition circuit 206; the power supply end of the monostable trigger U4 is electrically connected to the power supply Vcc, and the ground end is grounded.
Therefore, the singlechip inputs data matched with the current capacitor to be tested to the digital potentiometer U1, adjusts the resistance value of the U1, and further enables the operational amplifier U2 to output a reference direct-current voltage signal matched with the current capacitor to be tested as the reference voltage of the operational amplifier U3; a rectangular wave signal output by the U3 is input to the pin 1 of the input end of the monostable trigger U4, and the falling edge of the rectangular wave signal S3 triggers the monostable trigger to enable the output pin of the monostable trigger to output a narrow pulse signal; adjusting the sizes of the capacitor C6 and the resistor R6 connected to the pins 6 and 7 of the monostable flip-flop to change the pulse width, so that the pulse width is about 100ns, and outputting a narrow pulse signal S4 at the output pin of the monostable flip-flop as shown in fig. 5; the phase difference between the obtained narrow pulse signal S4 and the signal to be measured is pi/4 phase shift, and the comparison effect graph of the signal to be measured and the pi/4 phase shift narrow pulse signal S4 is shown in FIG. 6.
Preferably, the digital potentiometer U1 can be selected from MAX540 IEKA-T;
preferably, the operational amplifier U2 can be selected from TLV 2451;
preferably, the operational amplifier U3 may be implemented with OPA 835;
preferably, the monostable flip-flop U4 can be selected from SN74LVC1G 123.
Next, please refer to fig. 7, which is a circuit structure diagram of the pi/4 phase point amplitude signal acquisition circuit according to the present invention; the acquisition circuit is provided with: the circuit comprises an operational amplifier U5, an operational amplifier U6, an analog switch U7, an operational amplifier U8, resistors R14-R21 and capacitors C11-C13, wherein the power supply of the acquisition circuit is a direct-current power supply Vcc; wherein,
the non-inverting input end of the operational amplifier U5 is electrically connected to the point Q0 to be tested through a resistor R21 and receives a signal S0 to be tested, which is led out from the point Q0 to be tested; the inverting input of the operational amplifier U5 is electrically connected to the output of the operational amplifier U5; the power end of the operational amplifier U5 is electrically connected to a power supply Vcc, and the grounding end is grounded; the output end of the operational amplifier U5 is electrically connected to the non-inverting input end of the operational amplifier U6 through a capacitor C13 and a resistor R20, the non-inverting input end of the operational amplifier U6 is also electrically connected to a power supply Vcc through a resistor R18 and is grounded through a resistor R19; the inverting input end of the operational amplifier U6 is electrically connected to the output end of the operational amplifier U6 through a resistor R17; the power end of the operational amplifier U6 is electrically connected to a power supply Vcc, and the grounding end is grounded; the output end of the operational amplifier U6 is electrically connected to the input end of the analog switch U7, the control end of the analog switch U7 is electrically connected to the output end of the monostable trigger U4, and the narrow pulse signal S4 with the phase shift of pi/4 compared with the signal at the point Q0 is received; the normally-open output end of the analog switch U7 is grounded through a capacitor C12; the power end of the analog switch U7 is electrically connected to a power supply Vcc, and the grounding end is grounded; the normally-open output end of the analog switch U7 is also electrically connected to the non-inverting input end of the operational amplifier U8 through a resistor R16; the inverting input end of the operational amplifier U8 is electrically connected to the output end of the operational amplifier U8 through a resistor R14 and a capacitor C11 which are connected in parallel, and the inverting input end of the operational amplifier U8 is also grounded through a resistor R15; the output end of the operational amplifier U8 outputs a pi/4 phase point amplitude signal S5 to be sent to an external singlechip; the power supply end of the operational amplifier U8 is electrically connected to the power supply Vcc, and the ground end is grounded.
Therefore, a signal to be detected S0 is input to a pin 3 of an operational amplifier U5 in fig. 7 as input of voltage following, a direct current potential is superposed on the signal to be detected S0 after the signal to be detected passes through a voltage following, the signal to be detected S0 is input to a voltage follower formed by the operational amplifier U6, the signal to be detected is output by the operational amplifier U6 and then input to an input pin 4 of an analog switch U7 as an input signal, a pin 6 of an analog switch U7 controls a pin to be connected to a narrow pulse signal S4 generated by a monostable trigger U4, and a high level of a narrow pulse controls an analog switch U7 to be conducted at a pi/4 phase position of the signal to be detected every time, so that the signal to be detected S0 charges a capacitor C12 at the pi/4 phase position every time, and the amplitude value of the pi/4. The whole process of data acquisition is carried out, so that the acquired data is closer to the true value.
Preferably, the OPA835 is used for each of the operational amplifiers U5 and U6;
preferably, the analog switch U7 can be selected from TS5a3160 DCUR;
preferably, the operational amplifier U8 can be selected as TLV 2451.
Then, the external singlechip analyzes and processes the data of the collected pi/4 phase point amplitude signal S5; the singlechip can also send the analyzed and processed data to an upper computer for further data analysis and processing.
In the actual production of products, the level measuring unit is combined with an external singlechip and is arranged in a shell, a display unit electrically connected with the singlechip can be embedded on the surface of the shell, and after the singlechip analyzes and processes data, the result is displayed on the display unit; if the operation is more humanized, necessary switch keys and the like can be configured.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.
Claims (10)
1. A level gauge in a radio frequency admittance level gauge, comprising: the measuring device comprises a first measuring electrode, a second measuring electrode and a measuring circuit electrically connected with the first measuring electrode and the second measuring electrode, wherein the lower ends of the first measuring electrode and the second measuring electrode are both inserted into a material container to be measured by a material level, and the upper ends of the first measuring electrode and the second measuring electrode are electrically connected with the measuring circuit; the first and second measuring electrodes are equivalent to two electrode plates of a capacitor respectively, the material between the first and second measuring electrodes is dielectric medium, and the capacitor is used as capacitor C to be measuredMeasuring(ii) a It is characterized in that the preparation method is characterized in that,
the measurement circuit includes: the device comprises a first frequency selection network, a second frequency selection network, a third frequency selection network, an excitation signal generation circuit, a pi/4 phase shift narrow pulse generation circuit and a pi/4 phase point amplitude signal acquisition circuit;
the first frequency-selecting network comprises a capacitor C1 and an inductor L1 which are connected in parallel, the second frequency-selecting network comprises a capacitor C2 and an inductor L2 which are connected in parallel, and the third frequency-selecting network comprises a capacitor C3 and an inductor L3 which are connected in parallel; the first frequency-selecting network is electrically connected to the first output end of the excitation signal generating circuit through a resistor R1, the second frequency-selecting network is electrically connected to the second output end of the excitation signal generating circuit through a resistor R2, and the first end of the third frequency-selecting network is grounded through a resistor R3; the first frequency-selecting network is electrically connected to the second frequency-selecting network through a capacitor C4 and a resistor R4 which are connected in parallel, and then through a capacitor C5 and a resistor R5 which are connected in parallel; the electric connection position between the capacitor C4 and the resistor R4 which are connected in parallel and the capacitor C5 and the resistor R5 which are connected in parallel is set as Q1, and the capacitor C to be tested is set asMeasuringA capacitor C connected in parallel with the resistor R0 and having one end electrically connected to Q1 and the other end electrically connected to the second end of the third frequency-selecting networkMeasuringThe electric connection part between the resistor R0 and the third frequency-selective network is a point Q0 to be measured, the acquiring circuit of the pi/4 phase point amplitude signal is electrically connected to the point Q0 to be measured, and receives a signal S0 to be measured led out from the point Q0 to be measured;
the excitation signal generating circuit is used for generating and outputting a sine wave excitation signal S1;
the pi/4 phase shift narrow pulse generating circuit is electrically connected to the third output end of the excitation signal generating circuit and receives a sine wave excitation signal S1 sent by the excitation signal generating circuit; the pi/4 phase shift narrow pulse generating circuit is also electrically connected to an acquisition circuit of the pi/4 phase point amplitude signal, the acquisition circuit of the pi/4 phase point amplitude signal receives a narrow pulse signal S4 which is from the pi/4 phase shift narrow pulse generating circuit and is shifted by pi/4 compared with a signal at a point Q0, and an amplitude signal S5 of a signal to be detected at the pi/4 phase point is output.
2. Level gauging cell according to claim 1, wherein said pi/4 phase shifted narrow pulse generating circuit is provided with: the circuit comprises a digital potentiometer U1, an operational amplifier U2, an operational amplifier U3, a monostable trigger U4, resistors R6-R13 and capacitors C6-C10, wherein a power supply of the pi/4 phase-shift narrow pulse generating circuit is a direct-current power supply Vcc; wherein,
the input end of the digital potentiometer U1 is electrically connected to an external singlechip, the grounding end is grounded, the power supply end is electrically connected to a power supply Vcc, and the power supply end is grounded through a capacitor C10; the W output end of the digital potentiometer U1 is electrically connected to the non-inverting input end of the operational amplifier U2, and the W output end is also electrically connected to a power supply Vcc through a resistor R13 and is grounded through a capacitor C9; the L output end of the digital potentiometer U1 is grounded;
the inverting input end of the operational amplifier U2 is electrically connected to the output end of the operational amplifier U2 through a resistor R12; the power end of the operational amplifier U2 is electrically connected to a power supply Vcc, and the grounding end is grounded; the output end of the operational amplifier U2 is electrically connected to the non-inverting input end of the operational amplifier U3 through a resistor R11 and a resistor R10, wherein the electric connection between the resistor R11 and the resistor R10 is grounded through a capacitor C8;
the non-inverting input end of the operational amplifier U3 is also electrically connected to the output end of the operational amplifier U3 through a resistor R7; the inverting input end of the operational amplifier U3 is grounded through a resistor R9, is also electrically connected to a power supply Vcc through a resistor R8, is electrically connected to the output end of the excitation signal generating circuit through a capacitor C7, and receives a sine wave excitation signal S1 sent by the excitation signal generating circuit; the power end of the operational amplifier U3 is electrically connected to a power supply Vcc, and the grounding end is grounded; the output end of the operational amplifier U3 is electrically connected to the input end of the monostable trigger U4;
the Rext terminal of the monostable flip-flop U4 is electrically connected to the power supply Vcc through a resistor R6 and also to the Cext terminal through a capacitor C6; the output end of the monostable trigger U4 outputs a narrow pulse signal S4 which is phase-shifted by pi/4 compared with a signal at a point Q0 to the acquisition circuit; the power supply end of the monostable trigger U4 is electrically connected to the power supply Vcc, and the ground end is grounded.
3. Level gauging cell according to claim 1 or 2, wherein said pi/4 phase point amplitude signal acquisition circuit is provided with: the analog-digital converter comprises an operational amplifier U5, an operational amplifier U6, an analog switch U7, an operational amplifier U8, resistors R14-R21 and capacitors C11-C13, wherein a power supply of the pi/4 phase point amplitude signal acquisition circuit is a direct-current power supply Vcc; wherein,
the non-inverting input end of the operational amplifier U5 is electrically connected to the point Q0 to be tested through a resistor R21 and receives a signal S0 to be tested, which is led out from the point Q0 to be tested; the inverting input of the operational amplifier U5 is electrically connected to the output of the operational amplifier U5; the power end of the operational amplifier U5 is electrically connected to a power supply Vcc, and the grounding end is grounded; the output end of the operational amplifier U5 is electrically connected to the non-inverting input end of the operational amplifier U6 through a capacitor C13 and a resistor R20;
the non-inverting input terminal of the operational amplifier U6 is also electrically connected to the power supply Vcc through a resistor R18 and grounded through a resistor R19; the inverting input end of the operational amplifier U6 is electrically connected to the output end of the operational amplifier U6 through a resistor R17; the power end of the operational amplifier U6 is electrically connected to a power supply Vcc, and the grounding end is grounded; the output end of the operational amplifier U6 is electrically connected to the input end of the analog switch U7;
the control end of the analog switch U7 is electrically connected to the output end of the monostable trigger U4 and receives a narrow pulse signal S4 which is shifted by pi/4 compared with a signal at the point Q0; the normally-open output end of the analog switch U7 is grounded through a capacitor C12; the power end of the analog switch U7 is electrically connected to a power supply Vcc, and the grounding end is grounded; the normally-open output end of the analog switch U7 is also electrically connected to the non-inverting input end of the operational amplifier U8 through a resistor R16;
the inverting input end of the operational amplifier U8 is electrically connected to the output end of the operational amplifier U8 through a resistor R14 and a capacitor C11 which are connected in parallel, and the inverting input end of the operational amplifier U8 is also grounded through a resistor R15; the output end of the operational amplifier U8 outputs a pi/4 phase point amplitude signal S5 to be sent to an external singlechip; the power supply end of the operational amplifier U8 is electrically connected to the power supply Vcc, and the ground end is grounded.
4. Level gauging cell according to claim 2, wherein said digital potentiometer U1 is MAX540 IEKA-T.
5. Level gauging cell according to claim 2, wherein said operational amplifier U2 and/or U8 is a TLV 2451.
6. Level gauging cell according to claim 2, wherein said operational amplifiers U3, U5 and/or U6 are OPA 835.
7. Level gauging cell according to claim 2, characterized in that said monostable flip-flop U4 is SN74LVC1G 123.
8. Level gauging cell according to claim 3, wherein said analog switch U7 is TS5A3160 DCUR.
9. A radio frequency admittance level meter, comprising a level measurement cell according to any of claims 1 to 8, and,
the single chip microcomputer is electrically connected with the material level measuring unit;
the shell is used for accommodating the level measuring unit and the single chip microcomputer;
and the display unit is embedded on the surface of the shell and electrically connected with the single chip microcomputer.
10. The rf admittance level meter of claim 9, wherein the single chip microcomputer is provided with a communication interface for wired communication with an upper computer or a communication module for wireless communication with the upper computer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810431138.5A CN108896132B (en) | 2018-05-08 | 2018-05-08 | Level gauging unit and material level gauge in a kind of RF admittance level meter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810431138.5A CN108896132B (en) | 2018-05-08 | 2018-05-08 | Level gauging unit and material level gauge in a kind of RF admittance level meter |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108896132A CN108896132A (en) | 2018-11-27 |
| CN108896132B true CN108896132B (en) | 2019-11-26 |
Family
ID=64342630
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810431138.5A Active CN108896132B (en) | 2018-05-08 | 2018-05-08 | Level gauging unit and material level gauge in a kind of RF admittance level meter |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108896132B (en) |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2566951B2 (en) * | 1987-04-17 | 1996-12-25 | 株式会社東芝 | Automatic chemical analyzer |
| CN1330945C (en) * | 2005-04-30 | 2007-08-08 | 刘国桐 | Material level sensor in radio frequency medium measure type |
| CN101210838A (en) * | 2006-12-27 | 2008-07-02 | 德菲电气（北京）有限公司 | Four-wire radio frequency admittance level gauge and material level meter and its method |
| CN101281052A (en) * | 2007-04-02 | 2008-10-08 | 周建明 | High precision low-power consumption radar liquid level instrument system |
| CN201331365Y (en) * | 2008-12-26 | 2009-10-21 | 天津市耐特测控仪器技术有限公司 | Three-terminal radio-frequency admittance continuous level gauge |
| US8134469B2 (en) * | 2010-10-27 | 2012-03-13 | Ford Global Technologies, Llc | Wireless fuel level sensor for a vehicle fuel tank |
| CN102538905A (en) * | 2010-12-08 | 2012-07-04 | 上海自动化仪表股份有限公司 | Capacitive radio-frequency admittance level transmitter and operating method thereof |
| CN104457909A (en) * | 2014-12-23 | 2015-03-25 | 上海雄风自控工程有限公司 | Intelligent radio frequency admittance controller |
| CN106202627B (en) * | 2016-06-23 | 2023-09-22 | 南京展芯通讯科技有限公司 | Transistor small signal equivalent circuit model containing intrinsic inductance and parameter extraction method |
-
2018
- 2018-05-08 CN CN201810431138.5A patent/CN108896132B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN108896132A (en) | 2018-11-27 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US11209480B2 (en) | Non-contact DC voltage measurement device with oscillating sensor | |
| TW442655B (en) | Laplace transform impedance spectrometer and its measurement method | |
| CN100582808C (en) | Measurement method of ferroelectric materials electric hysteresis loop wire | |
| CN101629925A (en) | Method and device for measuring the conductivity of a pure or ultrarapture liquid | |
| McKubre et al. | Measuring techniques and data analysis | |
| US8390304B2 (en) | Electrical resonance detection of particles and analytes in microfluidic channels | |
| US7772854B2 (en) | High-conductivity contacting-type conductivity measurement | |
| CN102175921A (en) | Portable impedance measurement instrument based on FPGA (field programmable gate array) | |
| CN110231071A (en) | A kind of liquid level emasuring device based on capacitance type sensor | |
| CN108896131B (en) | Level gauging unit and material level gauge in RF admittance level meter based on temperature-compensating | |
| CN108896132B (en) | Level gauging unit and material level gauge in a kind of RF admittance level meter | |
| CA2862183C (en) | Low-conductivity contacting-type conductivity measurement | |
| CN208537465U (en) | A kind of bituminous concrete detecting device for moisture content | |
| Atmanand et al. | A novel method of measurement of L and C | |
| RU2260809C2 (en) | Method for determination of two-terminal network parameters | |
| Flaschke et al. | Dielectric soil water content measurements independent of soil properties | |
| Tejaswini et al. | An auto-balancing signal conditioning scheme for non-contact measurement of conductivity of water | |
| Slomovitz et al. | A power standard system for calibration of power analyzers | |
| RU2449295C1 (en) | Method for bipole parameters determination | |
| Kang et al. | The implementation of the new type impedance measurement system | |
| RU2808957C2 (en) | Device for measuring conductivity and impedance of plasma of glow gas discharge dc | |
| Babu et al. | An FFT based readout scheme for passive LC sensors | |
| CN114705918A (en) | Double-edge detection resonant circuit for measuring dielectric constant | |
| JP2021173585A (en) | Measurement device and measurement method | |
| Carminati et al. | Basic techniques for capacitance and impedance measurements |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| PE01 | Entry into force of the registration of the contract for pledge of patent right |
Denomination of invention: A level measuring unit and level instrument in RF admittance level instrument Effective date of registration: 20211216 Granted publication date: 20191126 Pledgee: Yantai financing guarantee Group Co.,Ltd. Pledgor: LUDONG University Registration number: Y2021980015152 |
|
| PE01 | Entry into force of the registration of the contract for pledge of patent right | ||
| PC01 | Cancellation of the registration of the contract for pledge of patent right |
Date of cancellation: 20220317 Granted publication date: 20191126 Pledgee: Yantai financing guarantee Group Co.,Ltd. Pledgor: LUDONG University Registration number: Y2021980015152 |
|
| PC01 | Cancellation of the registration of the contract for pledge of patent right |